US20040014297A1 - Method for transferring epitaxy layer - Google Patents

Method for transferring epitaxy layer Download PDF

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US20040014297A1
US20040014297A1 US10/253,575 US25357502A US2004014297A1 US 20040014297 A1 US20040014297 A1 US 20040014297A1 US 25357502 A US25357502 A US 25357502A US 2004014297 A1 US2004014297 A1 US 2004014297A1
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layer
method according
epitaxy
substrate
epitaxy layer
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US6686257B1 (en
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YewChung Wu
PeiYan Lin
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National Chiao Tung University
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National Chiao Tung University
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H01L21/2003Characterised by the substrate
    • H01L21/2007Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer

Abstract

A method for transferring an epitaxy layer is provided. The method includes steps of (a) providing a first substrate, (b) forming a first epitaxy layer on the first substrate, (c) forming a masking layer having at least a pattern on the first epitaxy layer, (d) forming a second epitaxy layer on the masking layer, (e) bonding a second substrate to the second epitaxy layer, and (f) removing the masking layer and separating the second epitaxy layer from the first epitaxy layer, thereby the second epitaxy layer being transferred to the second substrate.

Description

    FIELD OF THE INVENTION
  • This invention relates to a method for transferring an epitaxy layer, and more particularly to a method for transferring a GaN (gallium nitride) thin film obtained by epitaxy lateral overgrowth (ELO or ELOG) method. [0001]
  • BACKGROUND OF THE INVENTION
  • Generally, various electronic or optoelectronic devices, such as light emitting diode and semiconductor laser diode, are mainly fabricated from semiconductor material which is grown by the epitaxy growth method. In this fabrication method, an epitaxial substrate is needed to be deposited by the material through its growth. And, lattice constants of the epitaxial substrate and the semiconductor material should match to each other for forming high quality semiconductor material with lower defect so as to obtain the optoelectronic and electronic devices with high performance and efficiency. However, the limited epitaxial substrate restricts the application scope and performance of the semiconductor material which is grown by the epitaxy growth method. Thus, these epitaxial material and structure are usually needed to be separated from the original epitaxial substrate and then be transferred to another substrate having different material properties which dose not allow the epitaxy material to grow thereon or can't get high quality epitaxial crystal, to increase the application. [0002]
  • Take GaN as an example. Recently, because GaN is difficult to grow bulk material, there dose not exist a GaN epitaxial substrate and GaN needs to epitaxy on the substrate made by other material. But, the epitaxial substrate that are usually used for growing GaN actually has some properties which are harmful to the device operation or commercial large-quantity production, such as insulation, hard, low thermal conductivity . . . etc., and all these cause the limitation of usages or efficiency of GaN. Consequently, the wafer bonding technology has been cooperated with substrate removing or substrate transferring to transfer the GaN epitaxy layer to another substrate for increasing the application or decreasing the manufacturing cost thereof. [0003]
  • Presently, the technologies for separating the GaN from the substrate include the laser lift off method and the smart cut method. But, both of them have limitations and disadvantages in applications. Generally, the laser lift off method is restricted by the smaller spot size of the laser beam and only can be used to separate a small portion of the GaN epitaxial layer at a time. Except the disadvantage described above, another drawback with using this method is that the energy of the laser beam is not easy to spread averagely and will then cause different decomposition rate and heat accumulation in different portions of the GaN epitaxy layer. Because it is hard to precisely control the heat transfer and decomposition at the GaN/substrate interface, partial surface of GaN layer therefore will become rough after being separated by this method. Furthermore, because of a thermal shock in the material, the quality of the GaN layer will be reduced, even more the GaN layer will be unusable. Consequently, the expensive laser equipment with smaller production efficiency is inappropriate for large-quantity production and also not suitable for saving the cost. [0004]
  • As to the smart cut method, this method implants ions into the epitaxy layers before wafer bonding being progressed. Thus, the epitaxy layers are heated to vaporize ions to provide pressure for separating. However, the ion implantation process will destroy the crystal structure of the epitaxial layer, and the defect density which influences the device performance and the material quality will also be increased. Consequently, this method is not suitable to transfer semiconductor epitaxy layer for commercial purpose, either. [0005]
  • In addition, both of the methods have some other disadvantages that they are not appropriate for transferring the epitaxial layer in large area, the transferred epitaxial layer owns low quality, the epitaxial substrate can not be recycled, and the cost of the manufacturing process is much higher. [0006]
  • Because of the problems described above, the applicant keeps on carving unflaggingly to develop a “method for transferring epitaxy layer” through wholehearted experience and research. [0007]
  • SUMMARY OF THE INVENTION
  • It is an object of the present invention to provide a method for transferring an epitaxy layer obtained by a lateral overgrowth method to a needed substrate without hurting the original substrate and the epitaxy lateral overgrowth layer. [0008]
  • It is another object of the present invention to transfer a GaN epitaxy layer obtained by the lateral overgrowth method to another selectable substrate for obtaining a high quality GaN with a selectable substrate to providing different usages therefor. [0009]
  • In accordance with an aspect of the present invention, a method for transferring an epitaxy layer includes steps of (a) providing a first substrate, (b) forming a first epitaxy layer on the first substrate, (c) forming a masking layer having at least a pattern on the first epitaxy layer, (d) forming a second epitaxy layer on the masking layer, (e) bonding a second substrate to the second epitaxy layer, and (f) removing the masking layer and separating the second epitaxy layer from the first epitaxy layer, thereby the second epitaxy layer being transferred to the second substrate. [0010]
  • Preferably, the first substrate is one selected from a group consisting of gallium arsenide, sapphire, silicon carbide, and silicon. [0011]
  • Preferably, the first epitaxy layer includes a low-temperature buffer layer (LT-Buffer Layer) and a high-temperature epitaxy layer. [0012]
  • Preferably, the LT-Buffer Layer is one selected from a group consisting of gallium nitride, aluminum nitride, and gallium aluminum nitride. [0013]
  • Preferably, the LT-Buffer layer is formed at a temperature ranged from 600 to 700° C. and has a thickness ranged from 200 to 500 Å. [0014]
  • Preferably, the high-temperature epitaxy layer includes gallium nitride. [0015]
  • Preferably, the high-temperature layer is formed at a temperature ranged from 1000 to 1100° C. and has a thickness about 1.5 μm. [0016]
  • Preferably, the masking layer is one of a metal and a ceramic. [0017]
  • Preferably, the metal includes tungsten. [0018]
  • Preferably, the ceramic includes one of silicon nitride and silica. [0019]
  • Preferably, at least a pattern includes one of dot opening and line opening. [0020]
  • Preferably, the step (d) further includes a step (d[0021] 1) of forming a bonding medium layer on the second epitaxy layer.
  • Preferably, the bonding medium layer is one selected from a group consisting of palladium (Pd), titanium (Ti), indium (In), nickel (Ni), gold (Au), and a mixture thereof. [0022]
  • Preferably, the second epitaxy layer is an epitaxy lateral overgrowth layer. [0023]
  • Preferably, the second epitaxy layer includes gallium nitride (GaN). [0024]
  • Preferably, the step (e) further comprises a step (e[0025] 1) of forming a bonding medium layer on the second substrate.
  • Preferably, the bonding medium layer is one selected from a group consisting of palladium (Pd), titanium (Ti), indium (In), nickel (Ni), gold (Au), and a mixture thereof. [0026]
  • Preferably, the second substrate includes silicon. [0027]
  • Preferably, the step (e) is implemented by a wafer bonding process. [0028]
  • Preferably, the wafer bonding process further includes a thermal annealing process. [0029]
  • Preferably, the step (f) is executed by a wet etching. [0030]
  • In accordance with another aspect of the present invention, a method for transferring an epitaxy layer includes steps of (a) providing a first substrate, (b) forming a first epitaxy layer on the first substrate, (c) forming a masking layer on the first epitaxy layer and then etching the masking layer to form at least a pattern, (d) forming a second epitaxy layer on the masking layer, (e) removing the masking layer, and (f) bonding a second substrate to the second epitaxy layer and separating the second epitaxy layer from the first epitaxy layer so as to obtain the second substrate with the second epitaxy layer. [0031]
  • Preferably, the first epitaxy layer includes a low-temperature buffer layer (LT-Buffer Layer) and a high-temperature epitaxy layer. [0032]
  • Preferably, the step (d) further comprises a step (d[0033] 1) of forming a bonding medium layer on the second epitaxy layer.
  • Preferably, the second epitaxy layer is an epitaxy lateral overgrowth layer. [0034]
  • Preferably, the step (e) is executed by a wet etching. [0035]
  • Preferably, the step (f) further comprises a step (f[0036] 1) of forming a bonding medium layer on the second substrate.
  • Preferably, the step (f) is implemented by a wafer bonding process. [0037]
  • Preferably, the wafer bonding process further includes a thermal annealing process. [0038]
  • The above objects and advantages of the present invention will become more readily apparent to those ordinarily skilled in the art after reviewing the following detailed descriptions and accompanying drawings, in which:[0039]
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIGS. [0040] 11D are the schematic views of the manufacturing methods and steps for transferring a GaN epitaxy layer in a preferred embodiment according to the present invention.
  • FIGS. [0041] 22F are the schematic views of the manufacturing methods and steps for transferring a GaN epitaxy layer in the other preferred embodiment according to the present invention.
  • DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
  • The present invention will now be described more specifically with reference to the following embodiments. It is to be noted that the following descriptions of preferred embodiments of this invention are presented herein for purpose of illustration and description only; it is not intended to be exhaustive or to be limited to the precise form disclosed. [0042]
  • Please refer to FIGS. [0043] 11D which illustrate the schematic views of the manufacturing methods and steps for transferring a GaN epitaxy layer in a preferred embodiment according to the present invention. As shown in FIG. 1A, a first GaN epitaxy layer 112 is formed on a first substrate 111. Generally, the substrate for forming the GaN epitaxy layer is mostly a sapphire substrate which has a suitable lattice constant and crystal structure for forming a high quality GaN epitaxy layer. However, uneasy to be cut and not conductive are the disadvantages thereof. In the preferred embodiment according to the present invention, the first GaN epitaxy layer 112 includes a low-temperature GaN epitaxy layer 1121 (Low-Temperature Buffer Layer, LT-Buffer Layer) and a high-temperature GaN epitaxy layer 1122. The LT-buffer layer 1121 is a GaN or a sapphire layer deposited on the first substrate 111 with a thickness ranged from 200 to 500 Å and is formed at a temperature ranged from 600 to 700° C. And the high-temperature GaN epitaxy layer 1122 is a GaN layer deposited on the low-temperature epitaxy layer 1121 with a thickness about 1.5 μm and is formed at a temperature ranged from 1000 to 1100° C. In this preferred embodiment of the present invention, the first substrate, the low-temperature GaN epitaxy layer, and the high-temperature GaN epitaxy layer constitute an epitaxial combination substrate.
  • Sequentially, a masking layer [0044] 113 is formed on the first GaN epitaxy layer 112, and at least a pattern 114 is formed on the masking layer 113 by etching, wherein the masking layer 113 can be made of metal or ceramic such as silica, silicon nitride, and tungsten, and the at least a pattern 114 includes one of dot opening and line opening. Then, as shown in FIG. 1B, a second GaN epitaxy layer 121 is formed on the masking layer 113, wherein the second GaN epitaxy layer 121 is formed by an epitaxy lateral overgrowth process until the grown epitaxy lateral overgrowth crystal is smooth and parallel to the surface of the substrate (however, in the process, the lateral epitaxy overgrowth crystal can be coalescence to complete, or be not coalescence and only let the surface of the individual die become smooth), and is formed at a temperature ranged from 1000 to 1100° C. Moreover, a second substrate 122 (the substrate wanted to be transferred thereon) is connected to the second GaN epitaxy lateral overgrowth layer 121 by a wafer bonding process, wherein the material of the second substrate 122 is not limited and is determined by the purposes and demands after transferring, and the bonding temperature is depended on the materials of the second substrate 122 and the second epitaxy layer 121. At the same time, if needed, a bonding medium layer 131 can respectively be covered on the second substrate 122 and the second GaN epitaxy lateral overgrowth layer 121 for assisting the wafer bonding. The bonding medium layer 131 can be a single or multiple layers which are made of metals, such as palladium (Pd), titanium (Ti), indium (In), nickel (Ni), and gold (Au).
  • Continuously, a wet etching is employed to etch the masking layer [0045] 113 and to form a suspended structure, as shown in FIG. 1C, by immersing the wafer bonding assembly 10 in an etching liquid. The selection of the etching liquid is depended on the materials of the masking layer 113 and the second substrate 122, for which can rapidly etch the masking layer 113 without hurting the substrates and the epitaxy layers. Finally, as shown in FIG. 1D, the first GaN epitaxy layer 112 and the second GaN epitaxy layer 121 can be separated, thereby the second epitaxy layer 121 being transferred to the second substrate 122.
  • In this preferred embodiment according to the present invention, the wafer bonding process not only provides a new supporting substrate, but also accelerates the separation between the epitaxial combination substrate and the second epitaxy layer with the second substrate. And because the wafer bonding process further includes a thermal annealing process and pressure adding process, it will cause the stress concentration on the connecting point through the different thermal expansion coefficients of the substrate and GaN. Otherwise, the selective wet etching possesses some advantages, such as high selective ratio, won't destroy the epitaxy layers, low cost, and suitable for large area, and is a suitable method for the present invention to remove the masking layer. Furthermore, after separating, the epitaxial combination substrate constituted by the first substrate, the low-temperature GaN epitaxy layer, and the high-temperature GaN epitaxy layer will not be destroyed by the wet etching process and can be recycled so as to reduce the cost. Most importantly, after transferring, the epitaxy lateral overgrowth layer owns low defect density which can increase the life and efficiency thereof when being applied to the devices. [0046]
  • Otherwise, the steps sequence for transferring the epitaxy layer to another substrate would not be limited in the sequence described above. It can be altered as etching the masking layer ahead for forming the suspended structure before wafer bonding the second substrate to the second epitaxy lateral overgrowth layer, as shown in FIGS. [0047] 22C. And then the wafer bonding process is proceeded, as shown in FIGS. 22F, and simultaneously the separating process is promoted through the thermal annealing or pressure adding in the wafer bonding process.
  • In view of the aforesaid, the manufacturing process in the present invention can transfer the epitaxy lateral overgrowth layer to every kind of substrate and still maintain in high quality. According to this, the process not only can provide various usages of the epitaxy layer but also can solve the problems of the existing substrates in the manufacturing process and in the utilization, such as not conductive, uneasy being cut, uneasy to transfer the heat, and high cost of the material or device. At the same time, it also solves the disadvantage of the existing substrate transferring method, for example: damaging the epitaxy layer, unsuitable for the commercial large size, and high cost. Furthermore, the improvement to the manufacturing process can be achieved without expansive equipment; even more the epitaxial combination substrate can be recycled to reduce the cost. Consequently, the present invention owns the value for industrial development. [0048]
  • While the invention has been described in terms of what is presently considered to be the most practical and preferred embodiments, it is to be understood that the invention needs not be limited to the disclosed embodiment. On the contrary, it is intended to cover various modifications and similar arrangements included within the spirit and scope of the appended claims which are to be accorded with the broadest interpretation so as to encompass all such modifications and similar structures. [0049]

Claims (29)

What is claimed is:
1. A method for transferring an epitaxy layer comprising steps of:
(a) providing a first substrate;
(b) forming a first epitaxy layer on said first substrate;
(c) forming a masking layer having at least a pattern on said first epitaxy layer;
(d) forming a second epitaxy layer on said masking layer;
(e) bonding a second substrate to said second epitaxy layer; and
(f) removing said masking layer and separating said second epitaxy layer from said first epitaxy layer, thereby said second epitaxy layer being transferred to said second substrate.
2. A method according to claim 1 wherein said first substrate is one selected from a group consisting of gallium arsenide, sapphire, silicon carbide, and silicon.
3. A method according to claim 1 wherein said first epitaxy layer comprises a low-temperature buffer layer (LT-Buffer Layer) and a high-temperature epitaxy layer.
4. A method according to claim 3 wherein said LT-Buffer Layer is one selected from a group consisting of gallium nitride, aluminum nitride, and gallium aluminum nitride.
5. A method according to claim 3 wherein said LT-Buffer layer is formed at a temperature ranged from 600 to 700° C. and has a thickness ranged from 200 to 500 Å.
6. A method according to claim 3 wherein said high-temperature epitaxy layer includes gallium nitride.
7. A method according to claim 3 wherein said high-temperature layer is formed at a temperature ranged from 1000 to 1100° C. and has a thickness about 1.5 μm.
8. A method according to claim 1 wherein said masking layer is one of a metal and a ceramic.
9. A method according to claim 8 wherein said metal includes tungsten.
10. A method according to claim 8 wherein said ceramic includes one of silicon nitride and silica.
11. A method according to claim 1 wherein said at least a pattern includes one of dot opening and line opening.
12. A method according to claim 1 wherein said step (d) further comprises a step (d1) of forming a bonding medium layer on said second epitaxy layer.
13. A method according to claim 12 wherein said bonding medium layer is one selected from a group consisting of palladium (Pd), titanium (Ti), indium (In), nickel, gold, and a mixture thereof.
14. A method according to claim 1 wherein said second epitaxy layer is an epitaxy lateral overgrowth layer.
15. A method according to claim 1 wherein said second epitaxy layer includes gallium nitride (GaN).
16. A method according to claim 1 wherein said step (e) further comprises a step (e1) of forming a bonding medium layer on said second substrate.
17. A method according to claim 16 wherein said bonding medium layer is one selected from a group consisting of palladium (Pd), titanium (Ti), indium (In), nickel, gold, and a mixture thereof.
18. A method according to claim 1 wherein said second substrate includes silicon.
19. A method according to claim 1 wherein said step (e) is implemented by a wafer bonding process.
20. A method according to claim 19 wherein said wafer bonding process further comprises a thermal annealing process.
21. A method according to claim 1 wherein said step (f) is executed by a wet etching.
22. A method for transferring an epitaxy layer comprising steps of:
(a) providing a first substrate;
(b) forming a first epitaxy layer on said first substrate;
(c) forming a masking layer on said first epitaxy layer and then etching said masking layer to form at least a pattern;
(d) forming a second epitaxy layer on said masking layer;
(e) removing said masking layer; and
(f) bonding a second substrate to said second epitaxy layer and separating said second epitaxy layer from said first epitaxy layer so as to obtain said second substrate with said second epitaxy layer.
23. A method according to claim 22 wherein said first epitaxy layer comprises a low-temperature buffer layer (LT-Buffer Layer) and a high-temperature epitaxy layer.
24. A method according to claim 22 wherein said step (d) further comprises a step (d1) of forming a bonding medium layer on said second epitaxy layer.
25. A method according to claim 22 wherein said second epitaxy layer is an epitaxy lateral overgrowth layer.
26. A method according to claim 22 wherein said step (e) is executed by a wet etching.
27. A method according to claim 22 wherein said step (f) further comprises a step (f1) of forming a bonding medium layer on said second substrate.
28. A method according to claim 22 wherein said step (f) is implemented by a wafer bonding process.
29. A method according to claim 28 wherein said wafer bonding process further comprises a thermal annealing process.
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US20050037595A1 (en) * 2003-08-11 2005-02-17 Sumitomo Electric Industries, Ltd Method of recovering and reproducing substrates and method of producing semiconductor wafers
US20060194360A1 (en) * 2005-02-22 2006-08-31 Kunio Takeuchi Method for manufacturing nitride-base semiconductor element and nitride-base semiconductor element
WO2010059131A1 (en) * 2008-11-19 2010-05-27 Agency For Science, Technology And Research Method of at least partially releasing an epitaxial layer

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US20050186757A1 (en) * 2004-02-20 2005-08-25 National Chiao Tung University Method for lift off GaN pseudomask epitaxy layer using wafer bonding way
US20050186764A1 (en) * 2004-02-20 2005-08-25 National Chiao Tung University Method for lifting offGaN pseudomask epitaxy layerusing wafer bonding way
JP2007134388A (en) * 2005-11-08 2007-05-31 Sharp Corp Nitride based semiconductor element and process for fabricating same
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US20050037595A1 (en) * 2003-08-11 2005-02-17 Sumitomo Electric Industries, Ltd Method of recovering and reproducing substrates and method of producing semiconductor wafers
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US20100190318A1 (en) * 2003-08-11 2010-07-29 Sumitomo Electric Industries, Ltd. Method of recovering and reproducing substrates and method of producing semiconductor wafers
US20060194360A1 (en) * 2005-02-22 2006-08-31 Kunio Takeuchi Method for manufacturing nitride-base semiconductor element and nitride-base semiconductor element
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WO2010059131A1 (en) * 2008-11-19 2010-05-27 Agency For Science, Technology And Research Method of at least partially releasing an epitaxial layer
US8859399B2 (en) 2008-11-19 2014-10-14 Agency For Science, Technology And Research Method of at least partially releasing an epitaxial layer

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