WO2010054529A1 - 单周期控制的功率因数校正方法 - Google Patents

单周期控制的功率因数校正方法 Download PDF

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Publication number
WO2010054529A1
WO2010054529A1 PCT/CN2009/001026 CN2009001026W WO2010054529A1 WO 2010054529 A1 WO2010054529 A1 WO 2010054529A1 CN 2009001026 W CN2009001026 W CN 2009001026W WO 2010054529 A1 WO2010054529 A1 WO 2010054529A1
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Prior art keywords
duty
switch
value
cycle
sampling
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PCT/CN2009/001026
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English (en)
French (fr)
Inventor
米雪涛
郭清风
许敏
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珠海格力电器股份有限公司
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Application filed by 珠海格力电器股份有限公司 filed Critical 珠海格力电器股份有限公司
Priority to JP2011535855A priority Critical patent/JP5543975B2/ja
Priority to ES09825704.1T priority patent/ES2686343T3/es
Priority to BRPI0921346-5A priority patent/BRPI0921346B1/pt
Priority to NZ592969A priority patent/NZ592969A/xx
Priority to EP09825704.1A priority patent/EP2355320B1/en
Priority to US13/128,610 priority patent/US8335095B2/en
Priority to KR1020117013136A priority patent/KR101294898B1/ko
Priority to RU2011122684/07A priority patent/RU2475806C1/ru
Priority to AU2009316166A priority patent/AU2009316166B2/en
Publication of WO2010054529A1 publication Critical patent/WO2010054529A1/zh

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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/70Regulating power factor; Regulating reactive current or power
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/42Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H02M1/4208Arrangements for improving power factor of AC input
    • H02M1/4225Arrangements for improving power factor of AC input using a non-isolated boost converter
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/42Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the present invention relates to the field of 3 ⁇ 4 source technologies, and more particularly to a single-cycle power factor correction method based on a boos t boost circuit. Background technique
  • a Power Factor Correction (PFC) circuit In order to reduce the input harmonic current, a Power Factor Correction (PFC) circuit is required.
  • PFC Power Factor Correction
  • the conventional power factor correction circuit is complicated in technology, complicated in design steps, requires many components, is bulky, and has high cost. It often has to trade off between performance and cost.
  • single-cycle PFC research has focused on how to simplify the traditional PFC control circuit structure, avoid sampling the input voltage and use complex analog multipliers.
  • the single-cycle PFC circuit solves this problem well.
  • a single-cycle PFC control chip has been successfully developed and applied, such as the single-cycle controlled continuous conduction mode PFC boost converter integrated circuit with power switch and boost converter disclosed in Chinese Patent No. 200380109048. .
  • the single-cycle PFC control chip is simple and reliable, but its use cost is too high.
  • a single-cycle power factor correction method based on boos t boost circuit and system main control chip, boos t boost circuit includes AC input terminal, rectifier circuit, inductor, fast recovery diode, capacitor, DC output terminal, inductor current sampling circuit And an output voltage sampling circuit, a switch tube driving circuit, and a switch tube; wherein the control method comprises the following steps: (1) to determine whether the soft start is over, if yes, go directly to step (2); otherwise increase the output voltage reference value U r and then proceed to step (1);
  • the advantage of the present invention over the prior art is that: instead of using a conventional power factor correction circuit and a dedicated single-cycle PFC chip, the method software can be integrated into the main control chip (such as a DSP chip) of the existing system, and the simple cooperation is simple.
  • the boos t boosting circuit can realize the power factor correction function, which effectively saves cost; in particular, the invention avoids sampling near the switching point by calculating the sampling triggering time, so that the sampling data is more real and effective, and thus the P-control The signal achieves the best results and ensures stable system operation.
  • Figure 1 is a schematic diagram of a single-cycle PFC control system based on a boos t boost circuit
  • Single-cycle power factor correction method of the present invention is provided in FIG. 3 as signal relates ⁇ i, u e, the waveform of the PWM control signal;
  • Figure 4 is a flow chart showing the first mode of calculating the duty cycle of the P ⁇ control signal
  • Figure 5 is a flow chart showing a second way of calculating the duty cycle of the PWM control signal
  • FIG. 6 is a block diagram of the A/D sampling time calculation. detailed description
  • the method provided by the present invention is based on a boost boost circuit and a system main control chip, wherein the boost boost circuit belongs to an existing circuit, and includes an AC input terminal, a rectifier circuit, an inductor, a boost diode, and a capacitor. , DC output, inductor current sampling circuit, bus voltage sampling circuit, drive circuit, switching transistor (IGBT or MOSFET).
  • the dashed box portion is a control module integrated in the main control chip corresponding to the method provided by the present invention.
  • / s follows the rectified input voltage waveform u s while maintaining the output voltage. Stable to a given value. Assuming that the control circuit has satisfied that the inductor current is proportional to the input voltage and the phase is consistent, the entire converter can be equivalent to a resistor.
  • T w 2 (t) is implemented by the DSP counter. When (0 ⁇ (0, the switch is turned on, otherwise, the switch is turned off).
  • step (2) (1) to determine whether the soft start is over, if yes, go directly to step (2); otherwise increase the output voltage reference value I (ie "voltage command slowly increases” in Figure 2), and then proceed to step (2);
  • ⁇ u 2 , 1 ⁇ 2 is completed by the system main control chip such as DSP counter, where ⁇ is the equivalent current sense resistor, which is the output bus voltage reference value and the bus voltage sample value U. The difference is output by the PI regulator; the duty cycle of the PWM signal is obtained;
  • curve 1 is 1 and the pulse generated after comparison, curve 2 is w spicy, (nr), curve 3 is 2 , curve 4 is, it can be seen that in one cycle, when ⁇ is less than w 2 When the P-plane outputs a high level, the output low level, and thus repeatedly generates a pulse, so that the inductor current follows the rectified input voltage waveform.
  • Embodiment 1 provides two ways of calculating the duty ratio of the PWM control signal, and Equation 6 above is Embodiment 1.
  • 4 is a flow chart of the duty cycle calculation of Embodiment 1, wherein /?r_i3 ⁇ 4 ⁇ is the turn-off duty ratio of the switch, and the size of the first calculation is judged "; whether it is greater than the maximum duty-off duty ratio of the switch 1 if If it is greater than 1, then r- is the maximum value of 1, then it is judged whether the pr-duty is less than the minimum value of the off-duty of the switch. If it is less than, the pr- duty is the minimum value of 0.05, otherwise; the value of ⁇ is ⁇ Figure 5 For the implementation of the second duty cycle calculation flow chart, where ?
  • / is the on-duty of the switch, first calculate the size of ⁇ /, to determine whether it is less than the switch's conduction duty The ratio is 0, if it is less than 0, then ⁇ is the minimum value of 0, and then it is judged whether the - ⁇ / " ⁇ is greater than the maximum on-duty of the switch. 0. 95, if greater than, i / Wy is the maximum value of 0. 95, otherwise the value is ⁇ Since the single-cycle PFC control only performs one sampling in one switching cycle, it is necessary to pay attention to the determination of the sampling point when using this method. Since the inductor current has a current spike at the moment of switching operation of the switching tube, it needs to be avoided. Sampling near the switch point, otherwise it will cause instability of the system. The solution is to sample at the middle of the switch when the switch is turned on or off for a long time.
  • Figure 6 is a block diagram of the A/D sampling trigger timing calculation, where For the switch off duty cycle, T3CMPR is the comparison value of a compare register, T 3PER is the period value of the compare register, and AD_ ty is the output of the general-purpose timer of the system master chip.
  • T3CMPR is the comparison value of a compare register
  • T 3PER is the period value of the compare register
  • AD_ ty is the output of the general-purpose timer of the system master chip.
  • the on-time of the switch is determined according to the duty ratio of the switch signal. If the turn-on time is long, sampling is performed at the middle of the turn-on time. If the turn-off time is long, sampling is performed in the middle of the turn-off time.
  • the calculation in Fig. 6 is specifically to take the time in the middle, and may actually be selected in the middle for a period of time.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Dc-Dc Converters (AREA)
  • Rectifiers (AREA)

Description

单周期控制的功率因数校正方法 技术领域
本发明涉及¾源技术领域, 尤其涉及基于 boos t升压电路的单周期功率因数校正 方法。 背景技术
为了减少输入谐波电流,需要采用功率因数校正(PFC, Power Factor Correct ion ) 电路, 然而, 传统功率因数矫正电路技术复杂、 设计步骤繁琐、 所需元件多、 体积大而 且成本高, 因此设计时其往往要在性能和成本之间进行折衷。
近年来单周期 PFC的研究集中于如何简化传统的 PFC控制电路结构, 避免对输入 电压采样和使用复杂的模拟乘法器, 单周期的 PFC 电路很好的解决了这个问题。 目前, 已经有单周期 PFC控制芯片研发成功且被应用, 如中国专利 200380109048. 6号所公开 的具有电源开关和升压变流器的单周期控制连续传导模式的 PFC升压变流器集成电路。 然而, 单周期 PFC控制芯片虽然简便可靠, 但是其使用成本过高。
我们知道, 现有的好多系统都是由主控芯片 (如 DSP等芯片)控制的, 而 DSP等 主控芯片具有强大的软件集成、 兼容及处理功能, 所以在这样的系统中再使用专用单周 期 PFC控制芯片, 那就是增加成本的同时浪费了自身资源。 例如, 在空调器领域, 针对 压缩机的电源广泛地使用了功率因数调节技术,但是压缩机控制主板上已经集成有主控 芯片, 所以有必要开发相应的技术, 避免使用成本高的专用单周期 PFC控制芯片。 发明内容
本发明的目的是提供一种单周期功率因数校正方法, 可以软件集成在系统主控芯 片中, 通过配合简单的 boos t升压电路实现更为有效的单周期 PFC控制策略。
上述目的由以下技术方案实现:
一种单周期功率因数校正方法,基于 boos t升压电路及系统主控芯片, boos t升压 电路包括交流输入端、 整流电路、 电感、 快恢复二极管、 电容器、 直流输出端、 电感电 流采样电路、 输出电压采样电路、 开关管驱动电路、 开关管; 其特征在于, 该控制方法 包括如下步驟: ( 1 )判断是否软启动结束,是则直接进入步骤( 2 );否则增加输出电压参考值 Ur 然后进入步骤( 1 );
( 2 )根据 A/D采样触发时刻读取母线电压采样值 U。和电感电流采样值 Λ;
( 3 )计算驱动开关管 P爾信号占空比:
根据公式
Figure imgf000004_0001
计算 u】 υ2,其中 为等效电流检测电阻, 为输出母线电压参考值 I 与母线电 压采样值 U。之差经 ΡΙ调节器输出的值; 获得 PWM信号占空比;
( 4 )才艮据 PWM信号占空比, 输出 Ρ丽信号;
( 5 )根据 PW 信号占空比, 计算下一次的 A/D采样触发时刻;
( 6 )返回步骤(2 )。
本发明较现有技术的优点在于: 无需使用传统的功率因数校正电路及专用单周期 PFC芯片, 只需将该方法软件集成在现有系统的主控芯片 (如 DSP芯片) 中, 再配合简 单的 boos t升压电路即可实现功率因数校正功能, 有效地节省了成本; 特别是, 本发明 通过计算采样触发时刻, 避免在开关点附近采样, 使得采样数据更真实有效, 进而使得 P丽控制信号达到最佳效果, 保证系统运行稳定。 附图说明
图 1为基于 boos t升压电路的单周期 PFC控制系统示意图;
图 2为本发明提供的单周期功率因数校正方法的流程图;
图 3为本发明提供的单周期功率因数校正方法中所涉及信号 ^ i、 ue、 PWM控制 信号的波形图;
图 4为计算 P観控制信号占空比的第一种方式的流程图;
图 5为计算 PWM控制信号占空比的第二种方式的流程图;
图 6为 A/D采样时刻计算框图。 具体实施方式
如图 1所示, 本发明提供的方法是基于 boost升压电路和系统主控芯片, 其中, boost升压电路属于现有电路, 其包括交流输入端、 整流电路、 电感、 升压二极管、 电 容器、 直流输出端、 电感电流采样电路、 母线电压采样电路、 驱动电路、 开关管(IGBT 或 M0SFET )。 虚线框部分为集成在主控芯片中对应本发明提供方法的控制模块。
下面结合图 1介绍单周期 PFC控制的原理。单周期 PFC控制的目的就是使电感电流
/s跟随整流后的输入电压波形 us , 同时又要保持输出电压 。稳定到给定值。 假定控制 电路已经满足电感电流与输入电压成比例且相位一致,整个变换器可以等效为一个电阻
Re, 则:
"s = R g ( 1 ) 其中 为 PFC变换器的等效电阻, g为电感电流瞬时值, 为整流后的半波正弦 输入电压瞬时值, 对于 Boost型 PFC变换器来说, 在一个周期内, 其输入电压 、 输 出电压 C7。和开关管占空比 的关系为: ug =U0(l-d) (2)
所以可以得到:
RJg =U0(l-d) , 定义 .为 PFC变换器中等效电流检测电阻, 所以可得到: R g =Ua^-(l-d) ( 3) 令¾ =C/ 化简可得:
R,ig =umd. (4) 其中 = 1- ί为开关管的关断占空比, 若占空比 可以满足上式, 则可以保证电感输入 电流 ^与半波正弦输入电压 一致。 设定变换器的开关周期为 Ί 将其数字离散化, 当 载波频率远大于电感输入电压的频率时,可认为在一个开关周期内, 电感电流以及调节 电压基本维持常数。
Figure imgf000005_0001
由于公式 5 中的 ,在不同开关周期内的值是不同的, 用系统主控芯片实现比较麻 烦, 由于在一个开关周期内 ,„和 g的值是固定的, 所以对公式 5进行改进:
g n Rs
um{nT)
0≤t≤T 0≤τ≤ί (6)
u2 (t) =— Idr
T w2(t)通过 DSP计数器来实现, 当 (0< (0时开关导通, 反之, 开关关断。
下面介绍本发明提供单周期功率因数校正方法的具体控制程序。 如图 2所示, 包 括如下步骤:
(1)判断是否软启动结束,是则直接进入步骤(2); 否则增加输出电压参考值 I (即图 2中的 "电压指令緩慢增加"), 然后进入步骤(2);
( 2 )根据 A/D采样触发时刻读取母线电压采样值 U。和电感电流采样值 is
( 3 )计算驱动开关管 PWM信号占空'比:
根据公式 6计算 ^ u2, ½由系统主控芯片如 DSP的计数器来完成, 其中 ^为等效 电流检测电阻, 为输出母线电压参考值 与母线电压采样值 U。之差经 PI调节器输出 的值; 获得 PWM信号占空比;
( 4 )根据 P丽信号占空比, 输出 PWM信号;
( 5 )根据 PWM信号占空比, 计算下一次的 A/D采样触发时刻;
(6)返回步骤(2)。
如图 3所示: 其中曲线 1为 1与 比较后产生的脉冲, 曲线 2为 w„,(nr), 曲线 3 为 2, 曲线 4为 , 可以看出在一个周期内, 当^小于 w2时, P麵输出高电平, 反之输 出低电平, 如此反复产生脉冲后, 使得电感电流 跟随整流后的输入电压波形 。
本实施例提供两种计算 PWM控制信号占空比的方式, 上述公式 6为实施方式一。 图 4为实施方式一占空比计算的流程图, 其中 /?r_i¾^为开关的关断占空比, 首先计算 的大小, 判断 ";是否大于开关的关断占空比最大值 1, 如果大于 1, 则 r— 为最 大值 1 ,接着判断该 pr—duty 否小于开关的关断占空比最小值 0.05 ,如果小于, pr— duty 为最小值 0.05, 否则 ; ^的值为 ^ 图 5为实施方式二占空比计算的流程图, 其 中 ? /为开关的导通占空比, 首先计算 ί/的大小, 判断 是否小于开关的导通占空 比最小值 0 , 如果小于 0 , 则 ^为最小值 0 , 接着判断该 - ί/"^是否大于开关的 导通占空比最大值 0. 95, 如果大于, i/Wy为最大值 0. 95 , 否则 的值为 ^ 由于单周期 PFC控制在一个开关周期内只进行一次采样, 采用该方法时需要注意 的是采样点的确定, 由于电感电流在开关管开关动作瞬间存在电流尖峰, 需要避免在开 关点附近采样, 否则会引起系统的不稳定,解决方法就是在开关管开通或者关断时间较 长的中间时刻进行采样。
图 6为 A/D采样触发时刻计算框图, 其中
Figure imgf000007_0001
为开关关断占空比, T3CMPR为 一比较寄存器的比较值, T 3PER为比较寄存器的周期值, AD— du ty为系统主控芯片一通 用定时器的输出 P丽高电平占空比。首先根据开关信号的占空比来确定开关管的开通时 间长短, 如果开通时间长, 则在开通时间的中间时刻进行采样, 如果关断时间长, 则在 关断时间的中间进行采样。 图 6中的计算具体为取正中间的时刻, 实际上也可以在中间 的一段时间内选择, 本申请主张在开通或关断时间中间的 50% ~ 80%时间段内选择采样 点。 得到的 A/D釆样时刻用以触发下一个周期的 A/D采样。

Claims

权利要 求
1. 一种单周期功率因数校正方法, 基于 boost 升压电路及系统主控芯片, boost 升压电路包括交流输入端、 整流电路、 电感、 快恢复二极管、 电容器、 直流输出端、 电 感电流采样电路、 输出电压采样电路、 开关管驱动电路、 开关管; 其特征在于, 该控制 方法包括如下步骤:
( 1 )判断是否软启动结束,是则直接进入步骤( 2 );否则增加输出电压参考值 I , 然后进入步骤( 2 );
( 2 )根据 A/D采样触发时刻读取母线电压采样值 U。和电感电流采样值
( 3 )计算驱动开关管 PWM信号占空比:
根据公式
ig{nT)Rs
^( )= ( τ
) 0<t≤T 0≤r≤t
u2{t)=-[\dT 计算 及½,其中 为等效电流检测电阻, ½,为输出母线电压参考值^与母线电 压采样值 U。之差经 PI调节器输出的值; 获得 P糧信号占空比;
(4)才艮据 P龍信号占空比, 输出 P醫信号; '
( 5 )根据 PWM信号占空比, 计算下一次的 A/D采样触发时刻;
(6)返回步骤(2)。
2. 如权利要求 1所述的单周期功率因数校正方法, 其特征在于, 步骤(3) 中计算 P舊控制信号的占空比的具体方法为: 判断 ul是否大于开关的关断占空比最大值 1, 如 果大于 1, 则 pr—duty为最大值 1, 接着判断该 pr-duty是否小于开关的关断占空比最 小值 0.05,如果小于, pr-duty为最小值 0.05, 否则 r_duty的值为 ul,其中 r.duty 为开关的关断占空比。
3. 如权利要求 1所述的单周期功率因数校正方法, 其特征在于, 步驟(3) 中计算 P爾控制信号的占空比的具体方法为: 判断 ul是否小于开关的导通占空比最小值 0, 如 果小于 0,则 p-duty为最小值 0,接着判断 ul是否大于开关的导通占空比最大值 0.95, 如果大于, p— duty为最大值 0. 95 , 否则, p_duty的值为 ul , 其中 p-duty为开关的导 通占空比。
4. 如权利要求 2或 3所述的单周期功率因数校正方法, 其特征在于, 步骤(5 ) 中 根据占空比计算下一次的采样触发时刻的具体方法为:首先根据开关信号的占空比来确 定开关管的开通时间长短, 如果开通时间长, 则在开通时间的中间的 50% ~ 80%时间段 内选择采样点, 如果关断时间长, 则在关断时间的中间的 50% - 80%时间段内选择采样 点。
5. 如权利要求 1 所述的单周期功率因数校正方法, 其特征在于, 步骤(3 ) 中的 u2由系统主控芯片如 DSP的计数器来完成。
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