WO2009150741A1 - Procédé de fabrication de dispositif photovoltaïque - Google Patents

Procédé de fabrication de dispositif photovoltaïque Download PDF

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Publication number
WO2009150741A1
WO2009150741A1 PCT/JP2008/060795 JP2008060795W WO2009150741A1 WO 2009150741 A1 WO2009150741 A1 WO 2009150741A1 JP 2008060795 W JP2008060795 W JP 2008060795W WO 2009150741 A1 WO2009150741 A1 WO 2009150741A1
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WIPO (PCT)
Prior art keywords
electrode
conductive paste
insulating film
diffusion layer
forming
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PCT/JP2008/060795
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English (en)
Japanese (ja)
Inventor
昇市 唐木田
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三菱電機株式会社
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Priority to PCT/JP2008/060795 priority Critical patent/WO2009150741A1/fr
Publication of WO2009150741A1 publication Critical patent/WO2009150741A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0216—Coatings
    • H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H01L31/02168—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells the coatings being antireflective or having enhancing optical properties for the solar cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy

Definitions

  • the present invention relates to a method for manufacturing a photovoltaic device.
  • This silicon solar cell As a photovoltaic device, there is a silicon solar cell used for residential use.
  • This silicon solar cell generally includes an n-type diffusion layer formed on one main surface side (hereinafter referred to as a front surface side or a light receiving surface side) of a p-type silicon substrate, and the other main surface side (hereinafter referred to as a back surface).
  • P + layer functioning as a BSF (Back Surface Field) is formed on the side, and electrodes for taking out photovoltaic power output by photoelectric conversion are provided on the front surface side and the back surface side, respectively.
  • the electrode on the surface side blocks incident sunlight, it is desirable to reduce the formation area as much as possible from the viewpoint of improving the power generation efficiency.
  • the contact interface between the front and back electrodes of the solar cell having such a structure and silicon has a high recombination speed, which causes a decrease in the efficiency of the solar cell. Therefore, it is necessary to reduce the area of the electrode-silicon interface as much as possible. Therefore, conventionally, a structure called PERC (the passivated emitter and rear cell) structure has been proposed (for example, see Non-Patent Document 1).
  • the surface electrode has a comb shape, and the other regions are covered with an insulating film such as a silicon nitride film or an oxide film, thereby providing an antireflection effect and a surface recombination speed reduction effect.
  • the back electrode is also covered with an insulating film such as a silicon nitride film or an oxide film, and silicon and the back electrode are directly contacted only in a part of the region to have the effect of reducing the back surface recombination rate. ing.
  • an insulating film such as a silicon nitride film or an oxide film
  • a manufacturing method has been proposed in which electrodes are selectively attached to the silicon surface (laser removal region) on the bottom surface of the contact hole, which is a non-insulating region, by performing plating (see, for example, Patent Document 1).
  • this method conduction is made to the opening region where the underlying silicon substrate is exposed by plating, and the thickness is further increased, so that the plated portion extends in the lateral direction above the insulating film, so that the contact holes are Bond through plating.
  • the surface electrode has a comb-shaped electrode structure, but the actual contact between the silicon and the electrode is removed by the laser. As a result, the surface recombination rate can be further reduced.
  • Patent Document 1 In the method described in Patent Document 1, two processing steps, laser processing and plating, are added to the conventional processing, and the adhesion between the electrode formed by plating and the underlying silicon substrate is increased. However, it is difficult to obtain good performance and increases the contact resistance, so that the efficiency of the solar cell is lowered.
  • the present invention has been made in view of the above, and it is possible to easily reduce the contact area between the surface electrode and the underlying silicon substrate using the conventional photovoltaic device manufacturing method as much as possible. It is an object of the present invention to obtain a method for manufacturing a photovoltaic device capable of improving adhesion to a substrate.
  • a method for manufacturing a photovoltaic device comprises diffusing impurities of a second conductivity type on the light incident surface side of a semiconductor substrate of a first conductivity type.
  • FIG. 1-1 is a top view illustrating an example of a solar cell.
  • FIG. 1-2 is a partially enlarged view of the AA cross section of the solar cell of FIG. 1-1.
  • 1-3 is a partially enlarged view of the BB cross section of FIG. 1-1.
  • FIG. 2-1 is a partial cross-sectional view schematically showing an example of the procedure of the solar cell manufacturing method according to the first embodiment (part 1).
  • FIG. 2-2 is a partial cross-sectional view schematically showing an example of the procedure of the solar cell manufacturing method according to the first embodiment (part 2).
  • FIG. 2-3 is a partial cross-sectional view schematically showing an example of the procedure of the solar cell manufacturing method according to the first embodiment (part 3).
  • FIG. 2-5 is a partial cross-sectional view schematically showing an example of the procedure of the solar cell manufacturing method according to the first embodiment (part 5).
  • FIG. 2-6 is a partial cross-sectional view schematically showing an example of the procedure of the method for manufacturing the solar cell according to the first embodiment (No. 6).
  • FIG. 3A is a diagram showing a top view of the solar cell of FIG. 2-5.
  • FIG. 3-2 is a partially enlarged view of FIG. 3-1.
  • FIG. 4 is a partial cross-sectional view in a direction parallel to the grid electrode in the state of FIG. 2-6.
  • FIG. 5-1 is a diagram illustrating an example of an application state of the electrode forming paste according to the third embodiment.
  • FIG. 5B is a partially enlarged view of FIG.
  • FIG. 5C is a partially enlarged view of the DD cross section of FIG.
  • FIG. 6A is a top view schematically showing a state where the tab line is formed on the bus electrode.
  • FIG. 6B is a partially enlarged view of the EE cross section of FIG. 6A.
  • FIG. 7-1 is a top view showing an example of an application state of the electrode forming paste according to the fourth embodiment.
  • FIG. 7-2 is a partially enlarged view of FIG. 7-1.
  • FIG. 7C is a partially enlarged view of the FF cross section of FIG. FIG.
  • 8-1 is a top view showing an example of an application state of the electrode forming paste according to the fourth embodiment.
  • 8-2 is a partially enlarged cross-sectional view of the GG cross section of FIG. 8-1.
  • FIG. 9A is a partially enlarged cross-sectional view in a direction perpendicular to the grid electrode after the electrode firing process.
  • FIG. 9-2 is a partially enlarged cross-sectional view in a direction parallel to the grid electrode after the electrode firing process.
  • FIG. 1-1 is a top view showing an example of a solar cell
  • FIG. 1-2 is a partially enlarged view of the AA cross section of the solar cell of FIG. 1-1
  • FIG. 3 is a partially enlarged view of a BB cross section of 1-1.
  • This solar cell 10 includes a p-type silicon substrate 12 as a semiconductor substrate, an n-type diffusion layer 13 in which an n-type impurity of a group V element such as phosphorus (P) is diffused on the surface of the p-type silicon substrate 12, A semiconductor layer portion 11 having a photoelectric conversion function including a p + layer 14 containing a p-type impurity of a group III element such as boron (B) at a higher concentration than the p-type silicon substrate, and light reception of the semiconductor layer portion 11 An antireflection film 15 provided on the surface for preventing the reflection of incident light, and a grid provided in parallel in a predetermined direction on the light receiving surface in order to locally collect electricity generated by the semiconductor layer portion 11
  • the electrode 16, the bus electrode 17 provided on the light receiving surface substantially orthogonal to the grid electrode 16 in order to take out the electricity collected by the grid electrode 16, and the electricity generated by the semiconductor layer unit 11 are collected and back surface Back side provided on It includes an aluminum electrode 18.
  • the p-type silicon substrate 12 may be a single crystal substrate or a polycrystalline substrate.
  • a single crystal substrate having a (100) plane orientation is used will be described as an example.
  • at least the light receiving surface side of the semiconductor layer portion 11 is provided with a texture having a concavo-convex structure so as to confine incident light in the semiconductor layer portion 11.
  • the texture structure is formed so that the (111) plane is exposed on the light-receiving surface side of the (100) plane single crystal silicon substrate.
  • the grid electrode 16 has a width of about 100 to 200 ⁇ m, for example, and is arranged at intervals of about 2 mm, and the bus electrode 17 has a width of about 1 to 3 mm, for example.
  • Two to three solar cells 10 are arranged. Since the surface electrode composed of the grid electrode 16 and the bus electrode 17 is disposed on the light receiving surface side, it is desirable to reduce the size as much as possible from the viewpoint of power generation efficiency. As this surface electrode, a material such as silver can be used. The surface electrode is in contact with the surface of the underlying semiconductor layer portion 11 (n-type diffusion layer 13) through the opening 32 formed in the antireflection film 15.
  • the openings 32 formed in the antireflection film 15 are formed in a circular shape or the like at a predetermined interval in the surface electrode formation region by a processing method using laser irradiation, and the grid electrodes are connected so as to connect the openings 32. 16 and bus electrodes 17 are formed. Therefore, as shown in FIG. 1-1, the surface electrode appears to be formed on the semiconductor layer portion 11 from the light receiving surface side, but in actuality, the opening formed on the antireflection film 15 is formed.
  • the semiconductor layer portion 11 is in contact with the semiconductor layer 11 in a spot shape via the portion 32.
  • the p + layer 14 of the semiconductor layer portion 11 expects the BSF effect, and the p-layer electron concentration is applied in a band structure electric field so that electrons in the p layer (p-type silicon substrate 12) of the semiconductor layer portion 11 do not disappear.
  • the back surface aluminum electrode 18 is provided on the entire back surface of the semiconductor layer portion 11 with the expectation of a BSR (Back Surface Reflection) effect that reflects long wavelength light passing through the semiconductor layer portion 11 and reuses it for power generation. .
  • BSR Back Surface Reflection
  • the warp of the p-type silicon substrate 12 becomes remarkable and induces substrate cracking. Therefore, it is often removed after the p + layer 14 is formed by heat treatment. In this case, a silver electrode is formed at a predetermined position as the back electrode.
  • FIGS. 2-1 to 2-6 are partial cross-sectional views schematically showing an example of the procedure of the method for manufacturing the solar cell according to the first embodiment, and FIG. 3-1 shows the solar cell of FIG. 2-5.
  • FIG. 3-2 is a partially enlarged view of FIG. 3-1, and FIG. 4 is a view parallel to the extending direction of the grid electrode in the state of FIG. 2-6.
  • FIG. FIGS. 2-1 to 2-6 schematically show the direction perpendicular to the extending direction of the grid electrode (the direction of the AA cross section in FIG. 1-1).
  • a single crystal p-type silicon substrate 12 is prepared (FIG. 2-1).
  • the p-type silicon substrate 12 is sliced and cut out from a cast ingot. Therefore, in order to remove the damaged layer on the surface of the substrate generated at the time of slicing, the surface of the p-type silicon substrate 12 is removed with a thickness of 10 to 20 ⁇ m using, for example, several to 20 wt% of caustic soda or carbonated caustic soda.
  • anisotropic etching is performed with a solution obtained by adding IPA (isopropyl alcohol) to a similar alkaline low concentration solution, and a texture 31 is formed on the surface of the p-type silicon substrate 12 so that the (111) plane of silicon is exposed ( Fig. 2-2).
  • IPA isopropyl alcohol
  • the p-type silicon substrate 12 on which the texture 31 is formed is treated at a temperature of 800 to 900 ° C./several times in a mixed gas atmosphere of, for example, phosphorus oxychloride (POCl 3 ), nitrogen, and oxygen to obtain the surface of the p-type silicon substrate 12.
  • An n-type diffusion layer 13 is uniformly formed on the entire surface. Since the sheet resistance range of the n-type diffusion layer 13 uniformly formed on the surface of the p-type silicon substrate 12 is 30 to 80 ⁇ / ⁇ , good solar cell electrical characteristics can be obtained. Thus, the n-type diffusion layer 13 is formed.
  • a polymer resist paste is attached and dried by a method such as a screen printing method, and a mask is formed with the resist.
  • the p-type silicon substrate 12 is dipped in a 20 wt% potassium hydroxide solution for several minutes to form an n-type diffusion layer 13 formed on the surface of the p-type silicon substrate 12 outside the desired region (such as the back surface).
  • the mask (resist) is removed with an organic solvent (FIG. 2-3).
  • end face separation may be performed by laser or dry etching at the end of the process.
  • an insulating film made of at least one material such as a silicon oxide film, a silicon nitride film, or a titanium oxide film is formed as a reflection preventing film 15 on the entire surface of the n-type diffusion layer 13 with a uniform thickness (FIG. 2). -4).
  • a silicon nitride film is formed under reduced pressure at a temperature of 300 ° C. or higher using SiH 4 gas and NH 4 gas as raw materials by plasma CVD (Chemical Vapor Deposition).
  • the silicon nitride film thus formed has a refractive index of about 2.0 to 2.2, and the optimum thickness of the antireflection film 15 is 70 to 90 nm.
  • the surface electrode does not contact the n-type diffusion layer 13 simply by forming the surface electrode on the antireflection film 15 in a later step. Therefore, it does not act as a solar cell. Therefore, in the next step, a plurality of holes smaller than the size of the surface electrode are formed in the formation region of the surface electrode (grid electrode 16 and bus electrode 17) of the antireflection film 15 to form the opening 32 (FIG. 2-5).
  • the opening method include laser irradiation, etching paste, and photoengraving. From the viewpoint of simplicity, it is desirable to use laser irradiation or etching paste. Further, in FIG.
  • openings 32 are uniformly formed on the entire surface of the antireflection film 15, but actually, as shown in FIG. Opening 32 is formed only in the region where the surface electrode is formed.
  • opening diameter in the example of FIG. 3B, four openings 32 are provided for the width of the grid electrode 16 of about 100 ⁇ m. However, this is only an example, and for the optimum value of the aperture diameter, it is necessary to determine the conditions regarding the aperture diameter and how far each aperture 32 is separated.
  • the shape of the opening 32 may be any shape such as a circle, a corner, or a line.
  • a silver paste 33 as a conductive paste is applied on the region including the opening 32 on the antireflection film 15 by a screen printing method using a mask pattern for a comb electrode and dried.
  • the antireflection film 15 is melted by the components including the glass material in the baking step described later, All of the surface electrodes have the same structure as the conventional structure in contact with the n-type diffusion layer 13. Therefore, in this Embodiment 1, the silver paste 33 which adjusted the glass component and the other component is used to such an extent that the antireflection film 15 does not melt at the time of baking.
  • FIG. 2-6 shows a partially enlarged view of the CC cross section of FIG. 3-1.
  • the front and back electrode pastes 33 and 35 are simultaneously fired at 600 to 900 ° C. for several minutes, and the solar cell 10 shown in FIGS. 1-1 to 1-3 is manufactured.
  • a part of aluminum constituting the back electrode aluminum paste 35 is diffused on the p-type silicon substrate 12 to form the p + layer 14, and the remaining back electrode aluminum paste 35 is formed from the back surface aluminum electrode.
  • the silver paste 33 in which the glass component and other components are adjusted to such an extent that the antireflection film 15 is not melted is used, the antireflection in which the opening 32 is not formed by baking.
  • the silver paste 33 applied on the film 15 does not melt the antireflection film 15 and come into contact with the underlying n-type diffusion layer 13, and the surface electrode baked only at the opening 32 comes into contact with the n-type diffusion layer 13. To do.
  • a plurality of openings 32 smaller than the width of the electrode are formed in the electrode formation region on the surface side by a method such as laser irradiation. Since the silver paste 33 whose components are adjusted so as not to melt the antireflection film 15 is used, the interface between the fired surface electrode (grid electrode 16, bus electrode 17) and silicon substrate (n-type diffusion layer 13) The surface recombination rate can be reduced, and the surface electrode and the silicon substrate (n-type diffusion layer 13) can be connected with good adhesion, so that the photoelectric conversion efficiency is improved compared to the conventional structure.
  • Embodiment 2 a solar cell manufacturing method capable of reducing the resistance component at the contact portion between the silicon substrate (n-type diffusion layer) and the surface electrode, as compared with the first embodiment, will be described.
  • the p-type silicon substrate 12 is again placed in a mixed gas atmosphere of, for example, phosphorus oxychloride, nitrogen and oxygen at 800 to 900 ° C./several. Sufficient treatment is performed to diffuse n-type impurities into the surface of the silicon substrate (n-type diffusion layer 13) exposed through the opening 32. As a result, phosphorus diffuses only in the silicon substrate (n-type diffusion layer 13) in the region where the antireflection film 15 is opened, so that the surface phosphorus concentration in the region of the n-type diffusion layer 13 exposed in the opening 32 increases. To do. As a result, the contact resistance between the n-type diffusion layer 13 and the surface electrode formed in a later step can be reduced. Thereafter, the processing described in FIG. 2-6 and thereafter in Embodiment 1 is performed to manufacture the solar cell.
  • a mixed gas atmosphere for example, phosphorus oxychloride, nitrogen and oxygen at 800 to 900 ° C./several.
  • Sufficient treatment is performed to
  • the contaminated layer on the outermost surface of the n-type diffusion layer 13 is slightly removed by wet etching or the like to expose a clean surface layer, and then the diagram of the first embodiment.
  • the printing process after 2-6 may be performed.
  • the contact resistance between the n-type diffusion layer 13 and the surface electrode in the opening 32 formed in the antireflection film 15 is reduced. It has the effect that it can reduce rather than the case of the form 1.
  • FIG. 5-1 is a diagram illustrating an example of an application state of the electrode forming paste according to Embodiment 3
  • FIG. 5-2 is a partially enlarged view of FIG. 5-1
  • FIG. FIG. 5 is a partially enlarged view of a DD cross section of FIG. 5-1.
  • the n-type diffusion layer is formed on the main surface on the light-receiving surface side. 13 is formed, and an antireflection film 15 is further formed thereon.
  • a silver paste 34 is applied to the surface by screen printing using a mask pattern for forming a surface electrode.
  • a silver electrode 34 is applied so that a linear electrode pattern is formed on the grid electrode formation region 41 on the antireflection film 15 and a dot electrode pattern is formed on the bus electrode formation region 42. Apply and dry.
  • the silver paste 34 used in the third embodiment is a silver paste in which glass components and other components are adjusted so that the antireflection film 15 can be eroded in a later baking step.
  • the back electrode aluminum paste 35 and the back electrode silver paste (not shown) are applied to the back surface of the semiconductor layer 11 using a back electrode mask pattern and dried. In FIG. 5-3, illustration of the back electrode silver paste is omitted.
  • the front and back electrode pastes 34 and 35 are simultaneously fired at 600 to 900 ° C. for several minutes. Thereby, on the back surface, a part of aluminum constituting the back electrode aluminum paste 35 is diffused on the p-type silicon substrate 12 to form the p + layer 14, and the remaining back electrode aluminum paste 35 is formed on the back surface aluminum electrode 18. It becomes. Further, as described above, since the silver paste 34 in which the glass component for melting the antireflection film 15 and other components are adjusted is used on the surface, at each position of the surface electrode by firing, while the contained glass material melts the antireflection film 15, the silver material comes into contact with silicon and re-solidifies, and conduction between the surface electrode and silicon (n-type diffusion layer 13) is ensured. . Thus, a solar cell is obtained.
  • FIG. 6A is a top view schematically showing a state where the tab line is formed on the bus electrode
  • FIG. 6B is a partially enlarged view of the EE cross section of FIG. 6A.
  • the bus electrode 17 is a dot electrode, so that the output cannot be taken out.
  • a copper foil called a tab wire 22 is uniformly placed on the dot-shaped bus electrode 17, so that this The dots constituting the bus electrode 17 are connected to each other via the tab line 22 and the output can be taken out.
  • the bus electrode 17 having a size larger than that of the grid electrode 16 is formed in a dot shape, the dot-shaped bus electrodes 17 are electrically connected by the tab wire 22 in the modularization process.
  • the output can be taken out while reducing the surface recombination velocity at the interface between the bus electrode 17 and the n-type diffusion layer 13 (silicon substrate).
  • FIG. 7-1 is a top view showing an example of an application state of the electrode forming paste according to Embodiment 4,
  • FIG. 7-2 is a partially enlarged view of FIG. 7-1, and
  • FIG. 7 is a partially enlarged view of the FF cross section of FIG.
  • FIG. 8A is a top view showing an example of the application state of the electrode forming paste according to the fourth embodiment, and
  • FIG. 8B is a partially enlarged view of the GG section of FIG. is there.
  • FIGS. 9-1 to 9-2 are partially enlarged views of a cross section after the electrode firing process,
  • FIG. 9-1 shows a cross section in a direction perpendicular to the grid electrode, and
  • FIG. A cross section in a direction parallel to the grid electrode is shown.
  • the n-type diffusion layer is formed on the main surface on the light-receiving surface side. 13 is formed, and an antireflection film 15 is further formed thereon.
  • the grid electrode formation region 41 and the bus electrode formation region on the antireflection film 15 are formed on the antireflection film 15 by screen printing using a mask pattern for forming the surface electrode.
  • the first silver paste 34 is applied and dried so as to form a dot-like electrode pattern.
  • the first silver paste 34 is a silver paste that erodes the antireflection film 15.
  • the dot-shaped first silver paste 34 is arranged on the electrode formation region of the antireflection film 15.
  • the second silver paste 33 is applied and dried so as to form a continuous linear electrode pattern on the grid electrode formation region 41 and the bus electrode formation region.
  • the second silver paste 33 is a silver paste whose components are adjusted so as not to erode the antireflection film 15. As a result, a linear second silver paste 33 is formed so as to cover the dot-shaped first silver paste 34.
  • the back electrode aluminum paste 35 and the back electrode silver paste are applied to the back surface of the semiconductor layer portion 11 by screen printing using a back electrode mask pattern and dried.
  • the case where the aluminum paste for back electrode 35 and the silver paste for back electrode are performed before forming the silver paste on the surface is shown.
  • the front and back electrode pastes 33 to 35 are simultaneously fired at 600 to 900 ° C. for several minutes (FIGS. 9-1 and 9-2). Thereby, on the back surface, a part of aluminum constituting the back electrode aluminum paste 35 is diffused on the p-type silicon substrate 12 to form the p + layer 14, and the remaining back electrode aluminum paste 35 is formed on the back surface aluminum electrode 18. It becomes. On the surface, at each position where the dot-shaped first silver paste 34 is formed, components such as a glass material contained in the first silver paste 34 melt the antireflection film 15. In the meantime, the silver material comes into contact with silicon, and conduction between the surface electrode and silicon (n-type diffusion layer 13) is ensured.
  • the second silver paste 33 does not have a component such as a glass material that melts the antireflection film 15 by firing, the first silver paste 34 does not penetrate the antireflection film 15 by firing. It functions as an electrode for electrical connection between them.
  • the grid electrode 16 is formed in the grid electrode formation region, and the bus electrode 17 is formed in the bus electrode formation region.
  • a baking process of 600 to 900 ° C. is performed, and then the line of FIGS. 8-1 to 8-2 is performed.
  • firing may be performed again at a lower temperature than in the firing step of the first silver paste 34. .
  • FIG. 5 After the dot-shaped first silver paste is printed in FIGS. 7-1 to 7-3 of the fourth embodiment, a plating process step for forming wirings connecting the dot-shaped silver pastes by plating is introduced. May be.
  • the contact area of the interface between the surface electrode and the n-type diffusion layer 13 (silicon substrate) is reduced by using the plating process without using the laser processing process, and at the interface. This has the effect of reducing the surface recombination rate.
  • the method for manufacturing a photovoltaic device according to the present invention is useful for manufacturing a photovoltaic device such as a solar cell.

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Abstract

L'invention concerne un procédé de fabrication de dispositif photovoltaïque par lequel une aire de contact entre une électrode de surface et un substrat en silicium de base est facilement réduite en utilisant des procédés de fabrication de dispositifs photovoltaïques classiques autant que possible et l’adhérence entre l'électrode de surface et le substrat en silicium est améliorée. Le procédé comprend une étape de formation d'une couche de diffusion de type n (13) en diffusant une impureté de type n sur une surface d'entrée de lumière d'un substrat en silicium de type p (12) ; une étape de formation d'un film anti-réflexion (15) sur la couche de diffusion de type n (13) ; une étape de formation d'une pluralité d'ouvertures (32), chacune ayant un diamètre inférieur à la dimension de l'électrode de surface, dans la région où l'électrode de surface est formée sur le film anti-réflexion (15) de sorte que la couche de diffusion de type n (13) soit exposée ; une étape d'application d'une pâte d'argent (33) dont les composants sont ajustés pour ne pas corroder le film anti-réflexion (15) alors qu’elle est brûlée dans la région où l'électrode de surface comprenant les ouvertures (32) est formée ; et une étape consistant à brûler la pâte d'argent (33).
PCT/JP2008/060795 2008-06-12 2008-06-12 Procédé de fabrication de dispositif photovoltaïque WO2009150741A1 (fr)

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Cited By (1)

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Publication number Priority date Publication date Assignee Title
EP3413346A4 (fr) * 2016-02-01 2019-07-31 Mitsubishi Materials Corporation ÉLÉMENT MÉTALLIQUE AVEC SOUS-COUCHE EN Ag, CARTE DE CIRCUIT ISOLÉE AVEC SOUS-COUCHE EN Ag, DISPOSITIF SEMICONDUCTEUR, CARTE DE CIRCUIT ISOLÉE AVEC DISSIPATEUR DE CHALEUR, ET PROCÉDÉ DE FABRICATION D'UN ÉLÉMENT MÉTALLIQUE AVEC SOUS-COUCHE EN Ag

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JPS63119273A (ja) * 1986-11-06 1988-05-23 Sharp Corp 光電変換素子
JPS6441277A (en) * 1987-08-06 1989-02-13 Sharp Kk Electrode forming method for solar cell
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US10734297B2 (en) 2016-02-01 2020-08-04 Mitsubishi Materials Corporation Ag underlayer-attached metallic member, Ag underlayer-attached insulating circuit substrate,semiconductor device, heat sink-attached insulating circuit substrate, and method for manufacturing Ag underlayer-attached metallic member

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