WO2009119124A1 - 光電変換装置 - Google Patents
光電変換装置 Download PDFInfo
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- WO2009119124A1 WO2009119124A1 PCT/JP2009/050094 JP2009050094W WO2009119124A1 WO 2009119124 A1 WO2009119124 A1 WO 2009119124A1 JP 2009050094 W JP2009050094 W JP 2009050094W WO 2009119124 A1 WO2009119124 A1 WO 2009119124A1
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- crystalline silicon
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0236—Special surface textures
- H01L31/02366—Special surface textures of the substrate or of a layer on the substrate, e.g. textured ITO/glass substrate or superstrate, textured polymer layer on glass substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
- H01L31/075—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PIN type, e.g. amorphous silicon PIN solar cells
- H01L31/077—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PIN type, e.g. amorphous silicon PIN solar cells the devices comprising monocrystalline or polycrystalline materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/548—Amorphous silicon PV cells
Definitions
- the present invention relates to a photoelectric conversion device, and more particularly to a photoelectric conversion device for producing a power generation layer by film formation.
- Photoelectric conversion devices used in solar cells that convert solar energy into electrical energy include p-type silicon-based semiconductors (p-layers), i-type silicon-based semiconductors (i-layers), and n-type silicon-based semiconductors (n-layers).
- p-layers p-type silicon-based semiconductors
- i-layers i-type silicon-based semiconductors
- n-layers n-type silicon-based semiconductors
- the thin-film silicon solar cell include that the area can be easily increased and that the film thickness is as thin as about 1/100 that of a crystalline solar cell, and that the material can be reduced. For this reason, the thin film silicon solar cell can be manufactured at a lower cost than the crystalline solar cell.
- the disadvantages of thin-film silicon solar cells are that the conversion efficiency is lower than that of the crystal system, and that the film-forming speed is slow and the mass productivity is low.
- a tandem solar cell in which a photoelectric conversion layer including an i layer made of amorphous silicon and a photoelectric conversion layer including an i layer made of crystalline silicon are stacked. It is effective. There is a close relationship between the crystallinity of the crystalline silicon i layer and the conversion efficiency of the solar cell. The conversion efficiency is highest when the crystalline silicon i layer is near the boundary between amorphous and crystalline. It is known that this is the case.
- the crystallinity of the crystalline silicon i layer depends on the film forming conditions such as the substrate temperature and the hydrogen dilution rate during film formation. Crystallinity, for example, expressed as the ratio lc / la in the peak intensity of the amorphous silicon of the crystalline silicon peak intensity and 480 cm -1 in the 520 cm -1 in the Raman spectrum.
- a high conversion efficiency solar cell is manufactured by forming a crystalline silicon i layer under the condition that the substrate temperature Tsub and lc / la satisfy the relational expression 700 ⁇ Tsub ⁇ lc / la ⁇ 1600. A method is disclosed.
- One means for improving the mass productivity of solar cells is to form a crystalline silicon i layer having a uniform crystallinity and film thickness to maintain solar cell performance, and to further improve the film formation rate.
- Another means is to manufacture a solar cell module using a large area substrate.
- the crystallinity and the film thickness of the crystalline silicon i layer are distributed in the substrate plane corresponding to the gas flow and the discharge distribution.
- Non-Patent Document 1 reports the formation of a crystalline silicon layer by a short pulse plasma CVD method as a method for uniformly forming the crystallinity and film thickness of a crystalline silicon layer for a large area module.
- the excitation plasma is pulsed to reduce the spatial non-uniformity of the applied electric field when the plasma is ON, and the spatial distribution of the active species becomes uniform, and the crystallinity and film thickness are uniform. Will improve. Thereby, a large area solar cell with high conversion efficiency is realized.
- Non-Patent Document 1 uniform crystallinity and film thickness can be achieved in the plane by plasma pulsing.
- active species are efficiently generated so as not to decrease the film formation speed by pulsing, the film formation speed is lower than that of film formation by general continuous plasma.
- a technique for achieving both high-speed film formation, crystallinity uniformity and film thickness uniformity has not been established.
- the crystalline silicon i layer is formed within the substrate surface so as to have crystallinity that provides high performance. It is extremely difficult to achieve both uniform film formation and high-speed film formation. For this reason, in order to ensure both mass productivity and performance of the solar cell, it is necessary to allow variation in the in-plane distribution of crystallinity in the crystalline silicon i layer and to set the range of the in-plane distribution of crystallinity. .
- the range of the in-plane distribution of crystallinity in the crystalline silicon i layer needs to be set so that there is no low crystalline region.
- the low crystalline region is, for example, a value of the Raman peak ratio, which is a ratio of the Raman peak intensity of the crystalline silicon phase to the Raman peak intensity of the amorphous silicon phase in the crystalline silicon layer, approximately 3 to 4 or less. It is an area.
- the present invention has been made in view of the above problems, and provides a large-area photoelectric conversion device having high conversion efficiency and excellent mass productivity.
- a photoelectric conversion device of the present invention is a photoelectric conversion device in which a photoelectric conversion layer including a crystalline silicon layer is formed on a substrate, wherein the crystalline silicon layer includes a crystalline silicon i layer.
- the average value of the Raman peak ratio which is the ratio of the Raman peak intensity of the crystalline silicon phase to the Raman peak intensity of the amorphous silicon phase in the crystalline silicon i layer, is 4 or more and 8 or less, and the standard of the Raman peak ratio It has a substrate in-plane distribution represented by 0% or more and 15% or less of a region where the deviation is 1 or more and 3 or less and the Raman peak ratio is 4 or less.
- the Raman peak ratio is the ratio of the peak intensity lc of the crystalline silicon phase of 520 cm ⁇ 1 to the peak intensity la of the amorphous silicon phase of 480 cm ⁇ 1 in the Raman spectrum measured using a laser beam having a wavelength of 532 nm, lc / It is represented by la.
- the Raman peak ratio of the crystalline silicon i layer has an appropriate range, and if the Raman peak ratio is low, the sensitivity to long-wavelength light having a wavelength of 700 nm or more decreases, resulting in a conversion efficiency. Decreases. However, it has been found that the conversion efficiency is further increased by the presence of a region having a low Raman peak ratio of 4 or less in the substrate surface. However, when the ratio of the region where the Raman peak ratio is 4 or less exceeds 15%, not only the conversion efficiency is reduced, but also due to the stress generated between the low and high regions of the Raman peak ratio in the substrate plane. Peeling may occur, and there is a problem in terms of long-term stability.
- a photoelectric conversion device having a substrate in-plane distribution in which the Raman peak ratio of the crystalline silicon i layer is expressed by the above distribution is a high-output photoelectric conversion device.
- the photoelectric conversion device of the present invention is a photoelectric conversion device in which a photoelectric conversion layer including a crystalline silicon layer is formed on a substrate, wherein the crystalline silicon layer has a crystalline silicon i layer, Raman peak, which is the ratio of the Raman peak intensity of the crystalline silicon phase to the Raman peak intensity of the amorphous silicon phase in the crystalline silicon i layer, the size of the surface on which the photoelectric conversion layer is formed is 1 m square or more
- the substrate surface represented by an average ratio of 5 to 8, a standard deviation of the Raman peak ratio of 1 to 3 and a ratio of the region where the Raman peak ratio is 4 or less is 0% to 10%. It has an internal distribution.
- the Raman peak ratio of the crystalline silicon i layer has a distribution in the substrate plane represented by the above distribution, whereby a high-output photoelectric conversion device can be obtained.
- the crystalline silicon i layer is preferably a layer formed at a film forming rate of 1.5 nm / sec or more.
- the Raman peak ratio has the above in-plane distribution in the substrate plane even when the crystalline silicon layer i layer is formed at a high speed of 1.5 nm / sec or more. Since the crystalline silicon i layer is used, a high output photoelectric conversion device can be obtained with high productivity.
- the photoelectric conversion layer may further include an amorphous silicon layer, and the thickness of the amorphous silicon i layer of the amorphous silicon layer may be 170 nm or more and 250 nm or less.
- the film thickness of the amorphous silicon i layer in the above range, it is possible to suppress photodegradation of the photoelectric conversion device and obtain a high stabilized output.
- an intermediate contact layer between the crystalline silicon layer and the amorphous silicon layer.
- the short wavelength light that is transmitted without being absorbed by the amorphous silicon layer is reflected by the intermediate contact layer, and the optical path in the amorphous silicon layer is lengthened to efficiently absorb the short wavelength light.
- the contact property between the crystalline silicon layer and the amorphous silicon layer is improved by the intermediate contact layer. Accordingly, the generated current can be increased without increasing the thickness of the amorphous silicon layer, and a photoelectric conversion device with high conversion efficiency can be obtained.
- the crystalline silicon layer is deposited at a high deposition rate on a large area substrate to improve productivity. Even if it makes it, it can be set as the photoelectric conversion apparatus which has high conversion efficiency.
- FIG. 1 is a schematic diagram illustrating a configuration of a photoelectric conversion apparatus according to the present embodiment.
- the photoelectric conversion device 100 is a silicon-based solar cell, and includes a substrate 1, a transparent electrode layer 2, a first battery layer 91 (amorphous silicon system) and a second battery layer 92 (crystalline silicon system) as the photoelectric conversion layer 3. ) And the back electrode layer 4.
- the silicon-based is a generic name including silicon (Si), silicon carbide (SiC), and silicon germanium (SiGe).
- the crystalline silicon system means a silicon system other than the amorphous silicon system, and includes a microcrystalline silicon and a polycrystalline silicon system.
- FIG. 2 As the substrate 1, a soda float glass substrate (for example, 1.4 m ⁇ 1.1 m ⁇ plate thickness: a large area substrate having a side of 3 to 6 mm exceeding 1 m) is used.
- the end face of the substrate is preferably subjected to corner chamfering or R chamfering to prevent damage due to thermal stress or impact.
- FIG. 2 (b) As the transparent electrode layer 2, a transparent electrode film having a thickness of about 500 nm to 800 nm and having tin oxide (SnO 2 ) as a main component is formed at about 500 ° C. with a thermal CVD apparatus. At this time, a texture with appropriate irregularities is formed on the surface of the transparent electrode film.
- an alkali barrier film (not shown) may be formed between the substrate 1 and the transparent electrode film in addition to the transparent electrode film.
- a silicon oxide film (SiO 2 ) having a thickness of 50 nm or more and 150 nm or less is formed at about 500 ° C. using a thermal CVD apparatus.
- FIG. 2 (c) Thereafter, the substrate 1 is placed on an XY table, and the first harmonic (1064 nm) of the YAG laser is incident from the layer surface side of the transparent electrode layer as indicated by the arrow in the figure.
- the laser power is adjusted so that the processing speed is appropriate, and the substrate 10 and the laser beam are moved relative to each other in the direction perpendicular to the series connection direction of the power generation cells so that the groove 10 is formed. And laser etching into a strip shape having a predetermined width of about 6 mm to 15 mm.
- FIG. 2 (d) As the first battery layer 91, a p layer, an i layer, and an n layer made of an amorphous silicon thin film are formed by a plasma CVD apparatus. Using SiH 4 gas and H 2 gas as main raw materials, the amorphous silicon p layer 31 from the side on which sunlight is incident on the transparent electrode layer 2 at a reduced pressure atmosphere: 30 Pa to 1000 Pa and a substrate temperature: about 200 ° C. Then, an amorphous silicon i layer 32 and an amorphous silicon n layer 33 are formed in this order.
- the amorphous silicon p layer 31 is an amorphous B-doped silicon film and has a thickness of 10 nm to 30 nm.
- the amorphous silicon i layer 32 has a film thickness of 170 nm or more and 250 nm or less.
- the amorphous silicon n layer 33 is a p-doped amorphous silicon film and has a thickness of 30 nm to 50 nm.
- a crystalline silicon n layer made of a p-doped crystalline silicon film may be provided.
- a buffer layer may be provided between the amorphous silicon p layer 31 and the amorphous silicon i layer 32 in order to improve interface characteristics.
- p layer, i layer, and n layer which consist of a crystalline silicon thin film as a 2nd battery layer 92 are formed into a film with a plasma CVD apparatus.
- SiH 4 gas and H 2 gas as main raw materials, under reduced pressure atmosphere: 3000 Pa or less, substrate temperature: about 200 ° C., plasma generation frequency: 40 MHz or more and 100 MHz or less, crystalline silicon p layer 41, crystalline silicon i layer 42 Then, the crystalline silicon n layer 43 is formed in this order.
- the crystalline silicon p layer 41 is a B-doped crystalline silicon film having a thickness of 10 nm to 50 nm.
- the film thickness of the crystalline silicon i layer 42 is 1.2 ⁇ m or more and 3.0 ⁇ m or less.
- the crystalline silicon n layer 43 is a p-doped crystalline silicon film having a thickness of 20 nm to 50 nm.
- FIG. 6 shows the relationship between the Raman peak ratio of the crystalline silicon i layer and the photoelectric conversion efficiency in the tandem solar cell.
- the horizontal axis represents the Raman peak ratio lc / la of the crystalline silicon i layer
- the vertical axis represents the photoelectric conversion efficiency (standard value) of the tandem solar cell.
- the distribution of the Raman peak ratio of the crystalline silicon i layer is controlled by the film forming conditions such as the power applied to the plasma electrode during film formation and the hydrogen dilution rate H 2 / SiH 4 .
- the distribution of the Raman peak ratio in the substrate surface of the crystallized silicon i layer has an average value of 4 or more and 8 or less, a standard deviation of 1 or more and 3 or less, and a ratio of regions where the Raman peak ratio is 4 or less is 0% or more. 15% or less, preferably 2% or more and 6% or less.
- the probability that a portion having a low Raman peak ratio is locally concentrated increases, so that the Raman peak ratio is It is desirable to keep the ratio of the area of 4 or less within a predetermined amount. That is, the distribution of the Raman peak ratio in the substrate surface of the crystallized silicon i layer has a ratio of the region where the average value is 5 or more and 8 or less, the standard deviation is 1 or more and 3 or less, and the Raman peak ratio is 4 or less. % To 10%, preferably 1% to 7%, more preferably 2% to 6%.
- the deposition rate of the crystalline silicon i layer determines the productivity of the solar cell module.
- the crystalline silicon i layer 42 is formed at a film forming speed of 1.5 nm / sec or more, preferably 2.0 nm / sec or more.
- the film thickness of the amorphous silicon i layer 32 is set to 170 nm or more and 250 nm to prevent photodegradation of the solar cell.
- the photodegradation rate can be suppressed to 10% or less. As a result, the stabilized output when used for a long time exceeding 1000 hours can be improved.
- the intermediate contact layer 5 serving as a semi-reflective film may be formed in order to improve the contact between the first battery layer 91 and the second battery layer 92 and to ensure current matching.
- a target: Ga-doped ZnO sintered body is used to form a GZO (Ga-doped ZnO) film having a film thickness of 20 nm or more and 100 nm or less using a DC sputtering apparatus.
- FIG. 2 (e) The substrate 1 is placed on an XY table, and the second harmonic (532 nm) of the laser diode-pumped YAG laser is incident from the film surface side of the photoelectric conversion layer 3 as shown by the arrow in the figure.
- Pulse oscillation Laser power is adjusted so as to be suitable for the processing speed from 10 kHz to 20 kHz, and laser etching is performed so that the groove 11 is formed on the lateral side of the laser etching line of the transparent electrode layer 2 from about 100 ⁇ m to 150 ⁇ m. To do.
- the laser may be incident from the substrate 1 side.
- the position of the laser etching line is selected in consideration of positioning tolerances so as not to intersect with the etching line in the previous process.
- FIG. 3 (a) As the back electrode layer 4, an Ag film / Ti film is sequentially formed by a sputtering apparatus at about 150 ° C. in a reduced pressure atmosphere.
- the back electrode layer 4 is formed by laminating an Ag film: 200 nm to 500 nm and a Ti film having a high anticorrosion effect: 10 nm to 20 nm in this order as a protective film.
- a GZO (Ga-doped ZnO) film is formed between the photoelectric conversion layer 3 and the back electrode layer 4.
- the film may be formed to a thickness of 50 nm to 100 nm by a sputtering apparatus. Moreover, it is good also as Al film
- FIG. 3 (b) The substrate 1 is placed on the XY table, and the second harmonic (532 nm) of the laser diode pumped YAG laser is incident from the substrate 1 side as indicated by the arrow in the figure.
- the laser light is absorbed by the photoelectric conversion layer 3, and the back electrode layer 4 is exploded and removed using the high gas vapor pressure generated at this time.
- Laser power is adjusted so as to be suitable for processing speed, and laser etching is performed so that grooves 12 are formed on the lateral side of the laser etching line of the transparent electrode layer 2 from about 250 ⁇ m to 400 ⁇ m. To do.
- FIG. 3 (c) The power generation region is divided to eliminate the influence that the serial connection portion due to laser etching is likely to be short-circuited at the film edge around the substrate edge.
- the substrate 1 is placed on an XY table, and the second harmonic (532 nm) of the laser diode pumped YAG laser is incident from the substrate 1 side. Laser light is absorbed by the transparent electrode layer 2 and the photoelectric conversion layer 3, and the back electrode layer 4 explodes using the high gas vapor pressure generated at this time, and the back electrode layer 4 / photoelectric conversion layer 3 / transparent electrode Layer 2 is removed.
- Pulse oscillation 1 kHz or more and 10 kHz or less
- the laser power is adjusted so as to be suitable for the processing speed, and the position of 5 mm to 20 mm from the end of the substrate 1 is placed in the X-direction insulating groove as shown in FIG.
- Laser etching is performed to form 15.
- the Y-direction insulating groove does not need to be provided because the film surface polishing removal process in the peripheral region of the substrate 1 is performed in a later step.
- the insulating groove 15 has an effective effect in suppressing the intrusion of external moisture into the solar cell module 6 from the end of the solar cell panel by terminating the etching at a position of 5 mm to 10 mm from the end of the substrate 1. Therefore, it is preferable.
- the laser beam in the above steps is a YAG laser
- a YVO4 laser or a fiber laser there are some that can use a YVO4 laser or a fiber laser in the same manner.
- FIG. 4 (a) In order to secure a sound adhesion / seal surface with the back sheet 24 via EVA or the like in a later process, the laminated film around the substrate 1 (peripheral region 14) has a step and is easy to peel off. Remove. 3 mm from the end of the substrate 1 over the entire circumference of the substrate 1, the X direction is closer to the substrate end than the insulating groove 15 provided in the above-described step of FIG. 3C, and the Y direction is a groove near the substrate end side.
- the back electrode layer 4 / photoelectric conversion layer 3 / transparent electrode layer 2 is removed using grinding stone polishing, blast polishing, or the like on the substrate end side with respect to 10. Polishing debris and abrasive grains are removed by cleaning the substrate 1.
- FIG. 4 At the terminal box mounting portion, an opening through window is provided in the back sheet 24 and the current collector plate is taken out. A plurality of layers of insulating materials are installed in the opening through window portion to suppress intrusion of moisture and the like from the outside.
- Processing is performed so that power can be extracted from the terminal box portion on the back side of the solar cell panel by collecting copper foil from the one end solar cell and the other end solar cell.
- the copper foil arranges an insulating sheet wider than the copper foil width.
- an adhesive filler sheet made of EVA (ethylene vinyl acetate copolymer) or the like is disposed so as to cover the entire solar cell module 6 and not protrude from the substrate 1. .
- a back sheet 24 having a high waterproofing effect is installed on the EVA.
- the back sheet 24 has a three-layer structure of PET sheet / Al foil / PET sheet so that the waterproof and moisture-proof effect is high.
- the one with the back sheet 24 arranged at a predetermined position is deaerated inside in a reduced pressure atmosphere by a laminator and pressed at about 150 ° C. to 160 ° C., and EVA is crosslinked and brought into close contact.
- FIG. 5 (a) The terminal box 23 is attached to the back side of the solar cell module 6 with an adhesive.
- FIG. 5 (12) FIG. 5 (b) The copper foil and the output cable of the terminal box 23 are connected with solder or the like, and the inside of the terminal box is filled with a sealing agent (potting agent) and sealed. Thus, the solar cell panel 50 is completed.
- a sealing agent potting agent
- FIG. 5 (c) A power generation inspection and a predetermined performance test are performed on the solar cell panel 50 formed in the steps up to FIG.
- the power generation inspection is performed using a solar simulator of AM1.5 and solar radiation standard sunlight (1000 W / m 2 ).
- FIG. 5 Before and after the power generation inspection (FIG. 5C), a predetermined performance inspection is performed including an appearance inspection.
- Example 1 An amorphous silicon layer as the first battery layer 91 and a crystalline silicon layer as the second battery layer 92 are formed on a glass substrate having a size of 1.4 m ⁇ 1.1 m by a CVD method, and tandem solar A battery module was produced.
- the power applied to the plasma electrode and the hydrogen dilution rate were appropriately adjusted at a deposition rate of 2 nm / sec to control the distribution of the Raman peak ratio in the substrate plane.
- the substrate was divided. After removing the back electrode layer 4 of the sample taken from 24 locations in the plane by wet etching using hydrogen peroxide solution (concentration: 30%) and dilute hydrochloric acid (0.2 molar concentration), the crystalline silicon n layer A Raman spectrum was measured with 43 appearing on the surface to obtain a Raman peak ratio lc / la.
- Table 1 shows the output of the produced solar cell module, the distribution range of the Raman peak ratio of the crystalline silicon i layer, the average value, the standard deviation, and the ratio of the region having the Raman peak ratio of 4 or less.
- the standard deviation was in the range of 1 to 3 in any sample.
- the film thickness distribution of the crystalline silicon i layer was in the range of ⁇ 15% to 25% with respect to the average film thickness.
- FIG. 7 shows the relationship between the average value of the Raman peak ratio of the crystalline silicon i layer and the output of the solar cell module in a solar cell having a substrate size of 1.4 m ⁇ 1.1 m.
- the horizontal axis represents the average value of the Raman peak ratio
- the vertical axis represents the module output. High output was obtained with solar cell modules having an average value of 5 or more and 8 or less.
- FIG. 8 shows the relationship between the ratio of the region of the crystalline silicon i layer having a Raman peak ratio of 4 or less and the solar cell module output in a solar cell having a substrate size of 1.4 m ⁇ 1.1 m.
- the horizontal axis represents the ratio of the region having a Raman peak ratio of 4 or less
- the vertical axis represents the module output. High output was obtained at a ratio of 10% or less. On the other hand, when the ratio exceeded 10%, the output decreased. In some modules, peeling of the crystalline silicon layer was observed.
- crystalline silicon i in which the average value of the Raman peak ratio distribution in the substrate surface is 5 or more and 8 or less, the standard deviation is 1 or more and 3 or less, and the ratio of the region where the Raman peak ratio is 4 or less is 10% or less.
- the initial output of the solar cell module in which the layers were formed was as high as 90% or more of the maximum initial output (160 W).
- Example 2 An amorphous silicon layer as the first battery layer 91 and a crystalline silicon layer as the second battery layer 92 were formed on a glass substrate having a size of 1.4 m ⁇ 1.1 m by a CVD method. Thereafter, the substrate was divided into two to produce a tandem solar cell module having a substrate size of 0.7 m ⁇ 1.1 m.
- the applied power and the hydrogen dilution rate were appropriately adjusted at a deposition rate of 2 nm / sec to control the distribution of crystallinity in the substrate plane.
- Crystallinity lc / la was obtained by measuring the Raman spectrum of samples taken from 24 locations in the plane.
- the collected sample was prepared by removing the back electrode layer 4 using a hydrogen peroxide solution (concentration: 30%) and dilute hydrochloric acid (0.2 molar concentration) before measuring the Raman spectrum, and crystalline silicon n It processed so that the layer 43 might appear in the surface.
- Table 2 shows the output of the produced solar cell module, the distribution range of the Raman peak ratio of the crystalline silicon i layer, the average value, the standard deviation, and the ratio of the region having the Raman peak ratio of 4 or less.
- the standard deviation was in the range of 1 to 3 in any sample.
- the film thickness distribution of the crystalline silicon i layer was in the range of ⁇ 15% to 25% with respect to the average film thickness.
- FIG. 9 shows the relationship between the average value of the Raman peak ratio and the output of the solar cell module.
- the horizontal axis represents the average value of the Raman peak ratio
- the vertical axis represents the module output. High output was obtained with solar cell modules having an average value of 4 or more and 8 or less.
- FIG. 10 the relationship between the ratio of the area
- the horizontal axis represents the ratio of the region having a Raman peak ratio of 4 or less
- the vertical axis represents the module output. High output was obtained at a ratio of 15% or less. On the other hand, when the ratio exceeded 15%, the output decreased. Also, peeling of the crystalline silicon i layer was observed.
- crystalline silicon i in which the average value of the Raman peak ratio distribution in the substrate surface is 4 or more and 8 or less, the standard deviation is 1 or more and 3 or less, and the ratio of the region where the Raman peak ratio is 4 or less is 15% or less.
- a high output of 88% or more of the maximum initial output (84 W) was obtained.
- Example 3 A first battery layer 91 having an amorphous silicon i layer thickness of 220 nm and 320 nm was formed on a glass substrate having a size of 1.4 m ⁇ 1.1 m by a CVD method.
- the film forming process was adjusted so that the amorphous silicon i layer could be stacked in the same film forming time.
- the range of the Raman peak ratio in Example 1 is 3 to 10
- the average value is 6.3
- the standard deviation is 1.7
- the ratio of the region where the Raman peak ratio is 4 or less is 3% or less.
- a second battery layer 92 having the crystalline silicon i layer thus formed was formed by a CVD method, and a tandem solar cell module was obtained.
- Table 3 shows the average film thickness of the amorphous silicon i layer, the average film thickness of the crystalline silicon i layer, and the stabilized output of the solar cell module after 1000 hours from the start of power generation.
- the film thickness distribution of the amorphous silicon i layer and the crystalline silicon i layer was in the range of ⁇ 15% to 25% with respect to the average film thickness.
- Example 4 A solar cell module provided with an intermediate contact layer 5 having an average film thickness of 50 nm and a solar cell module not provided with an intermediate contact layer (each having a substrate size of 1.4 m ⁇ 1.1 m) were produced.
- the film thickness of the amorphous silicon i layer of the first cell layer 91 was 220 nm.
- the thickness of the amorphous silicon i layer was set to 320 nm in order to match the generated current between the first cell layer and the second cell layer.
- the film forming process was adjusted so that the amorphous silicon i layer could be stacked in the same film forming time.
- the range of the Raman peak ratio of the crystalline silicon i layer is 3 to 10, the average value is 6.3, the standard deviation is 1.7, and the ratio of the area where the Raman peak ratio is 4 or less is 3%.
- the 2nd battery layer 92 was formed so that it might become the following.
- Table 4 shows the average film thickness of the intermediate contact layer, the average film thickness of the amorphous silicon i layer, the average film thickness of the crystalline silicon i layer, and the solar cell module after 1000 hours from the start of power generation. Indicates the stabilized output. Note that the film thickness distribution of the amorphous silicon i layer and the crystalline silicon i layer was in the range of ⁇ 15% to 25% with respect to the average film thickness.
- the thickness of the amorphous silicon i layer was reduced by providing the intermediate contact layer. As a result, it was possible to suppress light deterioration and increase the stabilized output.
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Abstract
Description
2 透明電極層
3 光電変換層
4 裏面電極層
5 中間コンタクト層
6 太陽電池モジュール
31 非晶質シリコンp層
32 非晶質シリコンi層
33 非晶質シリコンn層
41 結晶質シリコンp層
42 結晶質シリコンi層
43 結晶質シリコンn層
91 第1電池層
92 第2電池層
100 光電変換装置
図1は、本実施形態に係る光電変換装置の構成を示す概略図である。光電変換装置100は、シリコン系太陽電池であり、基板1、透明電極層2、光電変換層3としての第1電池層91(非晶質シリコン系)及び第2電池層92(結晶質シリコン系)、及び、裏面電極層4を備える。なお、ここで、シリコン系とはシリコン(Si)やシリコンカーバイト(SiC)やシリコンゲルマニウム(SiGe)を含む総称である。また、結晶質シリコン系とは、非晶質シリコン系以外のシリコン系を意味するものであり、微結晶シリコンや多結晶シリコン系も含まれる。
基板1としてソーダフロートガラス基板(例えば、1.4m×1.1m×板厚:3~6mmの一辺が1mを超える大面積基板)を使用する。基板端面は熱応力や衝撃などによる破損防止にコーナー面取りやR面取り加工されていることが望ましい。
透明電極層2として酸化錫(SnO2)を主成分とする膜厚約500nm以上800nm以下の透明電極膜を、熱CVD装置にて約500℃で製膜する。この際、透明電極膜の表面には、適当な凹凸のあるテクスチャーが形成される。透明電極層2として、透明電極膜に加えて、基板1と透明電極膜との間にアルカリバリア膜(図示されず)を形成しても良い。アルカリバリア膜は、膜厚50nm以上150nm以下の酸化シリコン膜(SiO2)を熱CVD装置にて約500℃で製膜する。
その後、基板1をX-Yテーブルに設置して、YAGレーザーの第1高調波(1064nm)を、図の矢印に示すように、透明電極層の層面側から入射する。加工速度が適切となるようにレーザーパワーを調整して、透明電極膜を発電セルの直列接続方向に対して垂直な方向へ、基板1とレーザー光を相対移動して、溝10を形成するように幅約6mmから15mmの所定幅の短冊状にレーザーエッチングする。
第1電池層91として、非晶質シリコン薄膜からなるp層、i層及びn層を、プラズマCVD装置により製膜する。SiH4ガス及びH2ガスを主原料にして、減圧雰囲気:30Pa以上1000Pa以下、基板温度:約200℃にて、透明電極層2上に太陽光の入射する側から非晶質シリコンp層31、非晶質シリコンi層32、非晶質シリコンn層33の順で製膜する。非晶質シリコンp層31は非晶質のBドープシリコン膜であり、膜厚10nm以上30nm以下である。非晶質シリコンi層32は、膜厚170nm以上250nm以下である。非晶質シリコンn層33はpドープ非晶質シリコン膜であり、膜厚30nm以上50nm以下である。非晶質シリコンn層の代わりに、pドープ結晶質シリコン膜からなる結晶質シリコンn層を設けても良い。非晶質シリコンp層31と非晶質シリコンi層32の間には界面特性の向上のためにバッファー層を設けても良い。
基板1をX-Yテーブルに設置して、レーザーダイオード励起YAGレーザーの第2高調波(532nm)を、図の矢印に示すように、光電変換層3の膜面側から入射する。パルス発振:10kHz以上20kHz以下として加工速度に適切となるようにレーザーパワーを調整して、透明電極層2のレーザーエッチングラインの約100μmから150μmの横側を、溝11を形成するようにレーザーエッチングする。またこのレーザーは基板1側から入射しても良い。この場合は光電変換層3の第1電池層91で吸収されたエネルギーで発生する高い蒸気圧を利用できるので、更に安定したレーザーエッチング加工を行うことが可能となる。レーザーエッチングラインの位置は前工程でのエッチングラインと交差しないように位置決め公差を考慮して選定する。
裏面電極層4としてAg膜/Ti膜をスパッタリング装置により減圧雰囲気、約150℃にて順次製膜する。本実施形態では、裏面電極層4はAg膜:200nm以上500nm以下、これを保護するものとして防食効果の高いTi膜:10nm以上20nm以下をこの順に積層させたものとされる。第2電池層92のn層と裏面電極層4との接触抵抗低減と光反射向上を目的に、光電変換層3と裏面電極層4との間にGZO(GaドープZnO)膜を膜厚:50nm以上100nm以下、スパッタリング装置により製膜して設けても良い。また、Ti膜に変えてAl膜:250nm以上350nm以下としてもよい。TiをAlとすることで、防食効果を保持しつつ、材料コストを低減することが可能となる。
基板1をX-Yテーブルに設置して、レーザーダイオード励起YAGレーザーの第2高調波(532nm)を、図の矢印に示すように、基板1側から入射する。レーザー光が光電変換層3で吸収され、このとき発生する高いガス蒸気圧を利用して裏面電極層4が爆裂して除去される。パルス発振:1kHz以上10kHz以下として加工速度に適切となるようにレーザーパワーを調整して、透明電極層2のレーザーエッチングラインの約250μmから400μmの横側を、溝12を形成するようにレーザーエッチングする。
発電領域を区分して、基板端周辺の膜端部においてレーザーエッチングによる直列接続部分が短絡し易い影響を除去する。基板1をX-Yテーブルに設置して、レーザーダイオード励起YAGレーザーの第2高調波(532nm)を、基板1側から入射する。レーザー光が透明電極層2と光電変換層3とで吸収され、このとき発生する高いガス蒸気圧を利用して裏面電極層4が爆裂して、裏面電極層4/光電変換層3/透明電極層2が除去される。パルス発振:1kHz以上10kHz以下として加工速度に適切となるようにレーザーパワーを調整して、基板1の端部から5mmから20mmの位置を、図3(c)に示すように、X方向絶縁溝15を形成するようにレーザーエッチングする。このとき、Y方向絶縁溝は後工程で基板1周囲領域の膜面研磨除去処理を行うので、設ける必要がない。
後工程のEVA等を介したバックシート24との健全な接着・シール面を確保するために、基板1周辺(周囲領域14)の積層膜は、段差があるとともに剥離し易いため、積層膜を除去する。基板1の端から5mmから20mmで基板1の全周囲にわたり、X方向は前述の図3(c)工程で設けた絶縁溝15よりも基板端側において、Y方向は基板端側部付近の溝10よりも基板端側において、裏面電極層4/光電変換層3/透明電極層2を、砥石研磨やブラスト研磨などを用いて除去を行う。研磨屑や砥粒は基板1を洗浄処理して除去する。
端子箱取付け部分はバックシート24に開口貫通窓を設けて集電板を取出す。この開口貫通窓部分には絶縁材を複数層設置して外部からの湿分などの浸入を抑制する。
太陽電池モジュール6の裏側に端子箱23を接着剤で取付ける。
銅箔と端子箱23の出力ケーブルとをハンダ等で接続し、端子箱内部を封止剤(ポッティング剤)で充填して密閉する。これで太陽電池パネル50が完成する。
図5(b)までの工程で形成された太陽電池パネル50について発電検査ならびに、所定の性能試験を行う。発電検査は、AM1.5、全天日射基準太陽光(1000W/m2)のソーラシミュレータを用いて行う。
発電検査(図5(c))に前後して、外観検査をはじめ所定の性能検査を行う。
大きさが1.4m×1.1mのガラス基板上に、第1電池層91としての非晶質シリコン層及び第2電池層92としての結晶質シリコン層をCVD法により形成し、タンデム型太陽電池モジュールを作製した。なお、結晶質シリコンi層42の製膜では、製膜速度2nm/secにて、プラズマ電極への印加電力及び水素希釈率を適宜調整し、基板面内におけるラマンピーク比の分布を制御した。
大きさが1.4m×1.1mのガラス基板上に、第1電池層91としての非晶質シリコン層及び第2電池層92としての結晶質シリコン層をCVD法により形成した。その後、基板を2分割して、基板の大きさが0.7m×1.1mのタンデム型太陽電池モジュールを作製した。なお、結晶質シリコンi層42の製膜では、製膜速度2nm/secにて、印加電力及び水素希釈率を適宜調整し、基板面内における結晶性の分布を制御した。
大きさが1.4m×1.1mのガラス基板上に、それぞれ非晶質シリコンi層の膜厚が220nm及び320nmである第1電池層91をCVD法により形成した。ここで、太陽電池モジュールの生産性を変えないために、非晶質シリコンi層を同一製膜時間で積層出来るように、製膜プロセスを調整した。第1電池層91上に、実施例1においてラマンピーク比の範囲が3~10、平均値が6.3、標準偏差が1.7、ラマンピーク比4以下の領域の割合が3%以下となった結晶質シリコンi層を有する第2電池層92をCVD法により形成し、タンデム型太陽電池モジュールを得た。
平均膜厚50nmの中間コンタクト層5を設けた太陽電池モジュール、及び、中間コンタクト層を設けない太陽電池モジュール(それぞれ、基板の大きさが1.4m×1.1m)を作製した。中間コンタクト層を設けた太陽電池モジュールでは、第1電池層91の非晶質シリコンi層の膜厚を220nmとした。中間コンタクト層を設けない太陽電池モジュールでは、第1電池層と第2電池層との発電電流の整合をとるために、非晶質シリコンi層の膜厚を320nmとした。なお、生産性を変えないために、非晶質シリコンi層を同一製膜時間で積層出来るように、製膜プロセスを調整した。いずれの太陽電池モジュールにおいても、結晶質シリコンi層のラマンピーク比の範囲が3~10、平均値が6.3、標準偏差が1.7、ラマンピーク比4以下の領域の割合が3%以下となるように、第2電池層92を形成した。
Claims (5)
- 基板上に結晶質シリコン層を含む光電変換層を形成した光電変換装置であって、
前記結晶質シリコン層が結晶質シリコンi層を有し、
該結晶質シリコンi層における非晶質シリコン相のラマンピーク強度に対する結晶質シリコン相のラマンピーク強度の比であるラマンピーク比の平均値が4以上8以下、前記ラマンピーク比の標準偏差が1以上3以下、かつ、前記ラマンピーク比が4以下となる領域の割合が0%以上15%以下で表される基板面内分布を有することを特徴とする光電変換装置。 - 基板上に結晶質シリコン層を含む光電変換層を形成した光電変換装置であって、
前記結晶質シリコン層が結晶質シリコンi層を有し、
前記基板の前記光電変換層を形成した面の大きさが、1m角以上であり、
該結晶質シリコンi層における非晶質シリコン相のラマンピーク強度に対する結晶質シリコン相のラマンピーク強度の比であるラマンピーク比の平均値が5以上8以下、前記ラマンピーク比の標準偏差が1以上3以下、かつ、前記ラマンピーク比が4以下となる領域の割合が0%以上10%以下で表される基板面内分布を有することを特徴とする光電変換装置。 - 前記結晶質シリコンi層が、製膜速度1.5nm/sec以上で製膜された層であることを特徴とする請求項1または請求項2に記載の光電変換装置。
- 前記光電変換層が、さらに非晶質シリコン層を備え、該非晶質シリコン層の非晶質シリコンi層の膜厚が、170nm以上250nm以下であることを特徴とする請求項1乃至請求項3のいずれか1項に記載の光電変換装置。
- 前記結晶質シリコン層と前記非晶質シリコン層との間に中間コンタクト層を備えることを特徴とする請求項4に記載の光電変換装置。
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EP09724876A EP2200092A1 (en) | 2008-03-28 | 2009-01-07 | Photoelectric conversion device |
AU2009230531A AU2009230531A1 (en) | 2008-03-28 | 2009-01-07 | Photovoltaic device |
CN2009801001314A CN101779294B (zh) | 2008-03-28 | 2009-01-07 | 光电转换装置 |
US12/670,557 US8481848B2 (en) | 2008-03-28 | 2009-01-07 | Photovoltaic device |
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JP2008088593A JP5330723B2 (ja) | 2008-03-28 | 2008-03-28 | 光電変換装置 |
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EP (1) | EP2200092A1 (ja) |
JP (1) | JP5330723B2 (ja) |
KR (1) | KR20100028113A (ja) |
CN (1) | CN101779294B (ja) |
AU (1) | AU2009230531A1 (ja) |
TW (1) | TWI405346B (ja) |
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Cited By (4)
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WO2011007593A1 (ja) * | 2009-07-13 | 2011-01-20 | 三洋電機株式会社 | 薄膜太陽電池及びその製造方法 |
WO2011065343A1 (ja) * | 2009-11-30 | 2011-06-03 | 三洋電機株式会社 | 光電変換装置及びその製造方法 |
WO2011081195A1 (ja) * | 2009-12-29 | 2011-07-07 | シャープ株式会社 | 半導体膜および光電変換装置 |
WO2011136169A1 (ja) * | 2010-04-28 | 2011-11-03 | 三洋電機株式会社 | 光電変換装置 |
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JP2010114299A (ja) * | 2008-11-07 | 2010-05-20 | Mitsubishi Heavy Ind Ltd | 光電変換装置の製造方法及び光電変換装置 |
JP2011155026A (ja) * | 2009-12-11 | 2011-08-11 | Mitsubishi Heavy Ind Ltd | 光電変換装置の製造方法 |
KR101032270B1 (ko) * | 2010-03-17 | 2011-05-06 | 한국철강 주식회사 | 플렉서블 또는 인플렉서블 기판을 포함하는 광기전력 장치 및 광기전력 장치의 제조 방법 |
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- 2008-03-28 JP JP2008088593A patent/JP5330723B2/ja not_active Expired - Fee Related
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- 2009-01-07 US US12/670,557 patent/US8481848B2/en not_active Expired - Fee Related
- 2009-01-07 AU AU2009230531A patent/AU2009230531A1/en not_active Abandoned
- 2009-01-07 EP EP09724876A patent/EP2200092A1/en not_active Withdrawn
- 2009-01-07 KR KR1020107001569A patent/KR20100028113A/ko not_active Application Discontinuation
- 2009-01-07 CN CN2009801001314A patent/CN101779294B/zh not_active Expired - Fee Related
- 2009-01-07 WO PCT/JP2009/050094 patent/WO2009119124A1/ja active Application Filing
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Also Published As
Publication number | Publication date |
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AU2009230531A1 (en) | 2009-10-01 |
KR20100028113A (ko) | 2010-03-11 |
EP2200092A1 (en) | 2010-06-23 |
TW200947731A (en) | 2009-11-16 |
TWI405346B (zh) | 2013-08-11 |
CN101779294B (zh) | 2013-08-14 |
US20100206373A1 (en) | 2010-08-19 |
JP5330723B2 (ja) | 2013-10-30 |
US8481848B2 (en) | 2013-07-09 |
CN101779294A (zh) | 2010-07-14 |
JP2009246029A (ja) | 2009-10-22 |
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