WO2007148535A1 - 半導体装置及び半導体装置の製造方法 - Google Patents
半導体装置及び半導体装置の製造方法 Download PDFInfo
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- WO2007148535A1 WO2007148535A1 PCT/JP2007/061450 JP2007061450W WO2007148535A1 WO 2007148535 A1 WO2007148535 A1 WO 2007148535A1 JP 2007061450 W JP2007061450 W JP 2007061450W WO 2007148535 A1 WO2007148535 A1 WO 2007148535A1
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- Prior art keywords
- film
- fluorine
- semiconductor device
- copper
- heat treatment
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 31
- 238000004519 manufacturing process Methods 0.000 title claims description 18
- 239000010949 copper Substances 0.000 claims abstract description 65
- 239000010936 titanium Substances 0.000 claims abstract description 54
- 229910052802 copper Inorganic materials 0.000 claims abstract description 45
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 41
- 229910052731 fluorine Inorganic materials 0.000 claims abstract description 32
- 239000011737 fluorine Substances 0.000 claims abstract description 30
- 238000009792 diffusion process Methods 0.000 claims abstract description 20
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 17
- 230000004888 barrier function Effects 0.000 claims abstract description 17
- 229910052799 carbon Inorganic materials 0.000 claims abstract description 17
- 229910052715 tantalum Inorganic materials 0.000 claims abstract description 14
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 claims abstract description 13
- 229910052719 titanium Inorganic materials 0.000 claims abstract description 13
- 239000000758 substrate Substances 0.000 claims abstract description 12
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims abstract description 11
- 238000000034 method Methods 0.000 claims description 17
- 229910052751 metal Inorganic materials 0.000 claims description 10
- 239000002184 metal Substances 0.000 claims description 10
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 claims 1
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 abstract description 29
- 239000010408 film Substances 0.000 description 190
- 239000007789 gas Substances 0.000 description 47
- 235000012431 wafers Nutrition 0.000 description 42
- 238000010438 heat treatment Methods 0.000 description 41
- 238000002474 experimental method Methods 0.000 description 19
- 239000010410 layer Substances 0.000 description 17
- 238000004544 sputter deposition Methods 0.000 description 9
- 239000011229 interlayer Substances 0.000 description 8
- MTPVUVINMAGMJL-UHFFFAOYSA-N trimethyl(1,1,2,2,2-pentafluoroethyl)silane Chemical compound C[Si](C)(C)C(F)(F)C(F)(F)F MTPVUVINMAGMJL-UHFFFAOYSA-N 0.000 description 8
- 238000012545 processing Methods 0.000 description 7
- YRGLXIVYESZPLQ-UHFFFAOYSA-I tantalum pentafluoride Chemical compound F[Ta](F)(F)(F)F YRGLXIVYESZPLQ-UHFFFAOYSA-I 0.000 description 7
- XROWMBWRMNHXMF-UHFFFAOYSA-J titanium tetrafluoride Chemical compound [F-].[F-].[F-].[F-].[Ti+4] XROWMBWRMNHXMF-UHFFFAOYSA-J 0.000 description 6
- 238000006243 chemical reaction Methods 0.000 description 4
- 150000001875 compounds Chemical class 0.000 description 4
- 230000007423 decrease Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 3
- 239000004020 conductor Substances 0.000 description 3
- 238000000921 elemental analysis Methods 0.000 description 3
- 239000010419 fine particle Substances 0.000 description 3
- 150000002500 ions Chemical class 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- USEGOPGXFRQEMV-UHFFFAOYSA-N fluoro hypofluorite titanium Chemical compound [Ti].FOF USEGOPGXFRQEMV-UHFFFAOYSA-N 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- QLOAVXSYZAJECW-UHFFFAOYSA-N methane;molecular fluorine Chemical compound C.FF QLOAVXSYZAJECW-UHFFFAOYSA-N 0.000 description 2
- -1 nitride nitride Chemical class 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 239000002994 raw material Substances 0.000 description 2
- 238000004904 shortening Methods 0.000 description 2
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-M Fluoride anion Chemical compound [F-] KRHYYFGTRYWZRS-UHFFFAOYSA-M 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- NBVXSUQYWXRMNV-UHFFFAOYSA-N fluoromethane Chemical compound FC NBVXSUQYWXRMNV-UHFFFAOYSA-N 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 239000003870 refractory metal Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 230000008016 vaporization Effects 0.000 description 1
- 238000004876 x-ray fluorescence Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
- H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
- H01L21/0212—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC the material being fluoro carbon compounds, e.g.(CFx) n, (CHxFy) n or polytetrafluoroethylene
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
- H01L21/02304—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment formation of intermediate layers, e.g. buffer layers, layers to improve adhesion, lattice match or diffusion barriers
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/312—Organic layers, e.g. photoresist
- H01L21/3127—Layers comprising fluoro (hydro)carbon compounds, e.g. polytetrafluoroethylene
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76846—Layer combinations
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/5329—Insulating materials
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/5329—Insulating materials
- H01L23/53295—Stacked insulating layers
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Definitions
- a fluorine-added carbon film is used as an insulating film, for example, an interlayer insulating film.
- the present invention relates to a semiconductor device in which copper wiring is formed in the insulating film and a method for manufacturing the same.
- JP-A-2005-109138 describes tantalum (Ta), tantalum nitride (TaN), and the like as a noria film for preventing copper diffusion.
- a film (SiCOH film) containing silicon, carbon, oxygen, and hydrogen that has a low relative dielectric constant is drawing attention.
- the present inventors are considering the use of a fluorine-added carbon film (fluorocarbon film) that is a compound of carbon (C) and fluorine (F), which has a lower dielectric constant than that of the SiCOH film.
- the fluorine-added carbon film has such a property that fluorine is easily desorbed by heating.
- a heat treatment of, for example, about 400 ° C is performed in order to stabilize defects in crystals inside the semiconductor device.
- a fluorine-added carbon film is used as the insulating film, and the copper wiring force is also used to suppress copper diffusion into the insulating film.
- the fluorine is diffused into the tantalum film by heat treatment, and fluorine is diffused into the tantalum film by the heat treatment, thereby producing tantalum fluoride (TaF5).
- This tantalum fluoride will evaporate during the above heat treatment with high vapor pressure. For this reason, the density of the tantalum film is lowered and the barrier performance against copper is lowered.
- the sheet resistance increases, and the adhesion between the fluorinated carbon film and the tantalum film also deteriorates.
- the present invention provides a semiconductor device in which a fluorine-added carbon film is used as an insulating film, for example, an interlayer insulating film, and a copper wiring is formed in the insulating film. It is an object of the present invention to provide a semiconductor device capable of effectively suppressing diffusion of fluorine and copper between an insulating film and a copper wiring, and a manufacturing method thereof.
- the present invention relates to a substrate, an insulating film made of a fluorine-added carbon film formed on the substrate, a copper wiring embedded in the insulating film, and a gap between the insulating film and the copper wiring.
- the barrier film is formed between a first film made of titanium for suppressing fluorine diffusion, and between the first film and the copper wiring. And a second film having a tantalum force for suppressing copper diffusion.
- the present invention provides a step of forming an insulating film made of a fluorine-added carbon film on a substrate, a step of forming a recess in the insulating film, and a first film having a titanium force in the recess.
- FIG. 1A to FIG. 1C are cross-sectional views of a semiconductor device for explaining an embodiment of a method for manufacturing the semiconductor device according to the present invention.
- FIG. 2A to 2C are cross-sectional views of a semiconductor device for explaining an embodiment of a semiconductor device manufacturing method according to the present invention, following FIG. 1C.
- FIG. 3A and FIG. 3B are cross-sectional views of a semiconductor device for explaining an embodiment of a semiconductor device manufacturing method according to the present invention, following FIG. 2C.
- FIG. 4 is a schematic longitudinal sectional view showing an example of a manufacturing apparatus for carrying out the semiconductor device manufacturing method according to the present invention.
- FIG. 5 is a schematic cross-sectional view of wafers 1 to 6 used in each experiment.
- FIG. 6 is a characteristic diagram showing the results of wafer 3 in Experiment 3.
- FIG. 7 is a characteristic diagram showing the results of wafer 6 in Experiment 3.
- FIG. 8A is a characteristic diagram showing a result of the experiment 4 before the heat treatment.
- FIG. 8B is a characteristic diagram showing the results after the heat treatment in Experiment 4.
- the (n + 1) -th wiring is formed on the n-th wiring layer (n is an integer of 1 or more), which also has copper, for example, in the insulating film on the substrate.
- n is an integer of 1 or more
- FIG. 1A shows a substrate, for example, a semiconductor wafer (hereinafter referred to as WENO) in which a Cu wiring 61 as an nth wiring layer is formed in a fluorine-added carbon film (hereinafter referred to as “CF film”) 60 as an insulating film. )
- WENO semiconductor wafer
- CF film fluorine-added carbon film
- FIG. 1A shows a substrate, for example, a semiconductor wafer (hereinafter referred to as WENO) in which a Cu wiring 61 as an nth wiring layer is formed in a fluorine-added carbon film (hereinafter referred to as “CF film”) 60 as an insulating film. )
- CF film fluorine-added carbon film
- FIG. 1A shows a substrate, for example, a semiconductor wafer (hereinafter referred to as WENO) in which a Cu wiring 61 as an nth wiring layer is formed in a fluorine-added carbon film (hereinafter
- a film-forming gas of a compound containing carbon and fluorine for example, C
- the atmosphere in which the F gas is turned into plasma and the wafer W is placed is the plasma atmosphere.
- an interlayer insulating film made of the CF film 70 is formed with a film thickness of, for example, 200 nm.
- the CF film 70 is subjected to dry etching using a conventional technique such as a photoresist mask or a node mask, as shown in FIG. 1C. Is formed. Here, detailed description of these steps is omitted.
- a Ti film 74 which is a first film forming a part of the noria film 78 is formed on the entire surface of the wafer W by, for example, sputtering.
- ions of Ar or the like are bombarded against the Ti target, so that titanium fine particles are generated and separated from the Ti target, and the surface of the wafer W (the exposed surface of the CF film 70 and the Cu wiring) 61), and a Ti film 74 is formed.
- this Ti film 74 is a film having a barrier function that suppresses diffusion of fluorine in the CF film 70 to the upper layer side of the Ti film 74.
- a film thickness of about 3 to: LOnm is sufficient. A barrier function is obtained.
- a Ta film 75 as a second film is formed on the surface of the Ti film 74.
- the Ta film 75 is formed using a sputtering apparatus in the same manner as the Ti film 74 described above.
- the film thickness is preferably about 5 to: LOnm.
- the Ta film 75 is a film having a barrier function that suppresses diffusion of copper in the Cu wiring 76 in contact with the Ta film 75 to the Ti film 74 side.
- the barrier film 78 composed of the Ti film 74 and the Ta film 75 is formed.
- the Cu wiring 76 is embedded.
- the Cu wiring 76 may be formed by a CVD method using a gas obtained by vaporizing an organic material containing copper.
- it may be formed by forming a copper seed layer by an electroless plating method and using this as an electrode to perform electrolytic plating.
- the Ti film 74, Ta film 75, and Cu wiring 76 formed on the upper surface of the CF film 70 are removed by, for example, polishing called CMP (Chemical Mechanical Polishing) to obtain an (n + 1) layer.
- Cu wirings 76 for the eyes are formed (see FIG. 3A).
- a barrier film 64 made of an insulating film such as a SiN film is formed on the surface of the wafer W (see FIG. 3B).
- circuits for a predetermined hierarchy are formed. Then, after the manufacture of the desired semiconductor device (multilayer wiring structure) is completed, a heat treatment at, for example, 400 ° C. is performed in order to terminate the crystal defects in the semiconductor device and stabilize the physical properties.
- the (n + 1) -th layer wiring structure will be described.
- the Ti film 74 as the first film
- the second film The Ta film 75, which is a film, is laminated in the order of the CF film 70 side force to form the noria film 78.
- fluorine is transferred from the CF film 70 to the Ta film 75 or Cu wiring 76. Further, it is possible to suppress the diffusion of copper into the Ti film 74 and the CF film 70 from the Cu wiring 76.
- the Ti film 74 and the Ta film 75 do not cause a chemical reaction at about 400 ° C., and thus do not form an alloy (do not mix with each other). For this reason, the above-described Noria performance can be maintained even after the heat treatment.
- the Ti film 74 and the Ta film 75 are each as thin as about lOnm or less. That is, the entire thickness of the barrier film 78 can be suppressed to 20 nm or less. For this reason, there is no possibility of preventing the thinning of the semiconductor device.
- the film forming apparatus 10 includes a processing container 11 that is a vacuum chamber, a mounting table 12 that includes temperature control means, and a bias for 13.56 MHz, for example, connected to the mounting table 12. High frequency power supply 13.
- a first gas supply unit 14 having a substantially circular shape, for example, an alumina is provided on the upper part of the processing vessel 11 so as to face the mounting table 12.
- a number of first gas supply holes 15 are formed on the surface of the first gas supply unit 14 facing the mounting table 12.
- the first gas supply hole 15 generates plasma through the gas flow path 16 and the first gas supply path 17.
- a rare gas supply source such as argon (Ar) gas.
- a second gas supply unit 18 made of, for example, a substantially circular conductor is provided between the mounting table 12 and the first gas supply unit 14.
- a number of second gas supply holes 19 are formed on the surface of the second gas supply unit 18 facing the mounting table 12.
- a gas flow path 20 communicating with the second gas supply hole 19 is formed inside the second gas supply section 18, and the gas flow path 20 is connected via a second gas supply path 21.
- raw material gas such as CF gas
- a large number of openings 22 are formed in the second gas supply unit 18 so as to penetrate the second gas supply unit 18 vertically.
- the opening 22 does not communicate with the second gas supply hole 19 in the second gas supply unit 18, and causes the plasma generated above the second gas supply unit 18 to pass through the second gas supply unit 18.
- 18 is provided for passing through the space below 18.
- the opening 22 is formed between two adjacent second gas supply holes 19.
- a ring-shaped opening surrounding the mounting table 12 is provided at the lower end of the processing container 11, and a vacuum exhaust means 27 is connected to the opening via an exhaust pipe 26.
- an antenna unit 30 is provided above the first gas supply unit 14 via a cover plate 28 made of a dielectric such as alumina.
- the antenna unit 30 includes a circular antenna body 31 and a planar antenna member (slit plate) 32 embedded in the lower end of the antenna body 31.
- the planar antenna member 32 is formed with a large number of slits (not shown) for generating circular flat waves.
- the antenna main body 31 and the planar antenna member 32 are made of a conductor to form a flat hollow circular waveguide.
- a slow phase plate 33 made of a low-loss dielectric material such as alumina, oxide silicon, or nitride nitride. Yes.
- This retardation plate 33 is for shortening the wavelength of the microwave and shortening the in-tube wavelength in the circular waveguide.
- the antenna unit 30 configured as described above is connected to a microwave generation unit 34 that generates a microwave having a frequency of, for example, 2.45 GHz or 8.4 GHz via a coaxial waveguide 35. It has been continued.
- the waveguide 35A outside the coaxial waveguide 35 is connected to the antenna body 31, and the central conductor 35B of the coaxial waveguide 35 is connected to the planar antenna through the opening formed in the slow phase plate 33. Connected to member 32.
- the wafer W is loaded into the processing container 11 and placed on the mounting table 12. Then, the inside of the processing container 11 is evacuated by using the vacuum exhaust means 27, and, for example, Ar gas and F gas are supplied into the processing container 11 at a predetermined flow rate. And the inside of the processing container 11 is predetermined.
- the wafer W is heated by the temperature control means provided on the mounting table 12.
- a high frequency (microwave) with a frequency of 2.45 GHz is further formed on the planar antenna member 32 from the microwave generating means 34 via the cover plate 28 and the first gas supply unit 14. It radiates
- This microwave excites high-density and uniform Ar gas plasma in the space between the first gas supply unit 14 and the second gas supply unit 18.
- C F gas released from the second gas supply unit 18 toward the mounting table 12 flows from the upper side through the opening 22.
- This active species is deposited on the surface of the wafer W, and the CF film 70 is formed on the noria film 64.
- the gas used as the raw material for the fluorinated carbon film is not limited to CF gas, CF gas,
- C F gas, C F gas, C F gas or C F gas may be used.
- the sputtering apparatus generally includes a Ti plate as a metal source for sputtering titanium by electric discharge, and forms a Ti film 74 by depositing titanium fine particles generated from the Ti plate cover. It is.
- Titanium fluoride has a high vapor pressure like tantalum fluoride described above
- the density of the Ti film 74 decreases and the sheet resistance increases S.
- titanium carbide is stable with low vapor pressure.
- the reaction proceeds by a heat treatment, for example, an annealing process after the completion of manufacturing the semiconductor device described above.
- the titanium carbide is selectively generated and the generation of titanium fluoride is suppressed, so that a decrease in the density of the Ti film 74 and an increase in sheet resistance can be suppressed.
- the Ti film 74 is not necessarily limited to a film formed by sputtering, and may be formed using another film forming method, for example, the film forming apparatus 10 described above.
- the Ta film 75 is formed.
- various known sputtering apparatuses can be used in the same manner as the Ti film 74 described above.
- the method for manufacturing a semiconductor device according to the present invention is not limited to the damascene method, and can also be applied to a method in which the Cu wiring 76 is formed first and then the CF film 70 is formed so as to surround the Cu wiring 76. It is.
- wafers 1 to 6 The schematic cross sections of the No. 1 to No. 6 Weno cages (hereinafter referred to as wafers 1 to 6) used in the experiment are shown.
- FIG. 1 This is shown in FIG.
- These wafers 1 to 6 have a common force in that a CF film 82 having a thickness of 150 nm is formed on the Si substrate 81, which is a bare silicon wafer for experiments, using the film forming apparatus 10 described above.
- the barrier film shown in Table 1 below is formed on the CF film 82 for each wafer.
- a Cu film 87 (not shown) was formed on the uppermost metal (Ta, Ni, Ti, etc.) by the method described above.
- each of the wafers 1 to 6 was subjected to heat treatment under the above conditions. And each wafer 1-6 was taken out in air
- the Ta film 84 is in direct contact with the CF film 82 based on a comparison with wafer 2. Can be derived that is not good.
- fluorine diffuses from the CF film 82 to the Ta film 84 by the heat treatment to generate tantalum fluoride having a high vapor pressure, and the sheet resistance is increased by evaporation of the tantalum fluoride. Conceivable.
- a Cu film 87 was formed on wafers 2, 3, 4, and 6 as in Experiment 1.
- each wafer was subjected to heat treatment under the above conditions. Then, the X-ray intensity of each metal was measured by X-ray fluorescence analysis (XRF), and the ratio of the number of metal atoms in each metal film before and after the heat treatment was determined. The results are shown in Table 3.
- the TaN film 86 on the wafer 2 and the Ni film 85 on the wafer 4 allow the fluorine from the CF film 82 to pass through slightly. For this reason, tantalum fluoride is generated in the Ta film 84 and evaporated. Conceivable.
- TEM transmission electron microscope
- a Cu film 87 (not shown) was formed on the uppermost metal on the wafer 3 and the wafer 6 by the method described above.
- each wafer was subjected to heat treatment under the above conditions.
- the amount of each element (Cu, Ta, Ni, F) in the depth direction was measured using a secondary ion mass spectrometer (SIMS).
- Figure 6 shows the results of elemental analysis of wafer 3 before and after heat treatment. Similarly, the results of elemental analysis of wafer 6 before and after heat treatment are shown in FIG.
- the secondary ion intensity of each element of the wafer 6 hardly changes before and after the heat treatment in the depth direction. In other words, no diffusion of Cu or F occurs, and it can be seen that the film is optimal as the Noria film force S barrier film of the wafer 6.
- FIG. 8A The experimental results before the heat treatment are shown in FIG. 8A, and the experimental results after the heat treatment are shown in FIG. 8B.
- FIG. 8A titanium carbide and acid fluoride are formed in the lower layer of the Ti film 83 before heat treatment.
- a peak attributed to titanium fluoride (TiOF) was confirmed.
- TiOF titanium fluoride
- FIG. 8B the peak intensity of titanium carbide increased after the heat treatment, but no change in the peak intensity of titanium oxyfluoride was observed. From this, it is considered that titanium carbide is selectively generated in the lower layer of the Ti film 83 by the heat treatment.
- the peak intensity of titanium oxyfluoride remained unchanged before and after the heat treatment. From this, it can be said that the fluorine in the CF film 82 diffuses throughout the thickness of the Ti film 83 when the Ti film 83 is formed, but the diffusion by the heat treatment did not proceed. I understand that. That is, it can be seen that the Ti film 83 works effectively as a fluorine film against fluorine.
- the peak Ti intensity of the upper layer of the Ti film 83 is reduced by the heat treatment. This is presumably because the upper layer of titanium was supplied to the lower layer because of the titanium carbide selectively generated in the lower layer of the Ti film 83.
- the Ti film 83 in contact with the CF film 82 forms, for example, titanium fluoride having a high vapor pressure in the same manner that the Ta film 84 of the wafer 1 forms tantalum fluoride having a high vapor pressure. Guessing can also hold. However, in practice, titanium carbide is selectively formed in the vicinity of the interface between the CF film 82 and the Ti film 83. In other words, while Ti and Ta are highly common metals such as refractory metals, the Ta film does not exhibit sufficient nooria for fluorine, and the Ti film exhibits good barrier properties for fluorine. .
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Abstract
Description
Claims
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EP07744793A EP2034517A4 (en) | 2006-06-23 | 2007-06-06 | SEMICONDUCTOR COMPONENT AND SEMICONDUCTOR COMPONENT MANUFACTURING METHOD |
US12/305,049 US20090134518A1 (en) | 2006-06-23 | 2007-06-06 | Semiconductor device and manufacturing method of semiconductor device |
IL195951A IL195951A0 (en) | 2006-06-23 | 2008-12-15 | Semiconductor device and manufacturing method of semiconductor device |
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JP2006174429A JP5194393B2 (ja) | 2006-06-23 | 2006-06-23 | 半導体装置の製造方法 |
JP2006-174429 | 2006-06-23 |
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US (1) | US20090134518A1 (ja) |
EP (1) | EP2034517A4 (ja) |
JP (1) | JP5194393B2 (ja) |
KR (1) | KR20090003368A (ja) |
CN (1) | CN101461043A (ja) |
IL (1) | IL195951A0 (ja) |
TW (1) | TW200811953A (ja) |
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CN102803552B (zh) * | 2009-06-26 | 2015-06-24 | 东京毅力科创株式会社 | 等离子体处理方法 |
JP5364765B2 (ja) | 2011-09-07 | 2013-12-11 | 東京エレクトロン株式会社 | 半導体装置及び半導体装置の製造方法 |
US8691709B2 (en) * | 2011-09-24 | 2014-04-08 | Tokyo Electron Limited | Method of forming metal carbide barrier layers for fluorocarbon films |
JP2015195282A (ja) * | 2014-03-31 | 2015-11-05 | 東京エレクトロン株式会社 | 成膜方法、半導体製造方法及び半導体装置 |
JP5778820B1 (ja) * | 2014-04-09 | 2015-09-16 | 日本特殊陶業株式会社 | スパークプラグ |
WO2016021533A1 (ja) * | 2014-08-04 | 2016-02-11 | Jx日鉱日石エネルギー株式会社 | 凹凸パターンを有する部材の製造方法 |
CN106716622B (zh) * | 2014-11-18 | 2019-07-05 | 三菱电机株式会社 | 信号传送绝缘设备以及功率半导体模块 |
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JPH03140496A (ja) * | 1989-10-25 | 1991-06-14 | Daido Steel Co Ltd | 母材の表面着色方法 |
JP3158598B2 (ja) * | 1991-02-26 | 2001-04-23 | 日本電気株式会社 | 半導体装置およびその製造方法 |
JP4355039B2 (ja) * | 1998-05-07 | 2009-10-28 | 東京エレクトロン株式会社 | 半導体装置及び半導体装置の製造方法 |
JP2000208622A (ja) * | 1999-01-12 | 2000-07-28 | Tokyo Electron Ltd | 半導体装置及びその製造方法 |
KR100407542B1 (ko) * | 1999-03-09 | 2003-11-28 | 동경 엘렉트론 주식회사 | 반도체 장치 및 그 제조 방법 |
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2007
- 2007-06-06 KR KR1020087029046A patent/KR20090003368A/ko active IP Right Grant
- 2007-06-06 EP EP07744793A patent/EP2034517A4/en not_active Withdrawn
- 2007-06-06 CN CNA2007800206271A patent/CN101461043A/zh active Pending
- 2007-06-06 US US12/305,049 patent/US20090134518A1/en not_active Abandoned
- 2007-06-06 WO PCT/JP2007/061450 patent/WO2007148535A1/ja active Application Filing
- 2007-06-23 TW TW096122758A patent/TW200811953A/zh unknown
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Also Published As
Publication number | Publication date |
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JP5194393B2 (ja) | 2013-05-08 |
JP2008004841A (ja) | 2008-01-10 |
US20090134518A1 (en) | 2009-05-28 |
EP2034517A4 (en) | 2010-07-21 |
EP2034517A1 (en) | 2009-03-11 |
KR20090003368A (ko) | 2009-01-09 |
TW200811953A (en) | 2008-03-01 |
IL195951A0 (en) | 2009-09-01 |
CN101461043A (zh) | 2009-06-17 |
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