WO2006129444A1 - Élément de pile solaire et procédé de fabrication idoine - Google Patents

Élément de pile solaire et procédé de fabrication idoine Download PDF

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Publication number
WO2006129444A1
WO2006129444A1 PCT/JP2006/308971 JP2006308971W WO2006129444A1 WO 2006129444 A1 WO2006129444 A1 WO 2006129444A1 JP 2006308971 W JP2006308971 W JP 2006308971W WO 2006129444 A1 WO2006129444 A1 WO 2006129444A1
Authority
WO
WIPO (PCT)
Prior art keywords
rear surface
back electrode
passivation film
semiconductor substrate
electrode
Prior art date
Application number
PCT/JP2006/308971
Other languages
English (en)
Japanese (ja)
Inventor
Tsutomu Onishi
Takeshi Akatsuka
Shunichi Igarashi
Original Assignee
Naoetsu Electronics Co., Ltd.
Shin-Etsu Chemical Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Naoetsu Electronics Co., Ltd., Shin-Etsu Chemical Co., Ltd. filed Critical Naoetsu Electronics Co., Ltd.
Publication of WO2006129444A1 publication Critical patent/WO2006129444A1/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0216—Coatings
    • H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/52—PV systems with concentrators

Definitions

  • the present invention relates to a solar cell element using a single crystal semiconductor substrate or a polycrystalline semiconductor substrate, and a method for manufacturing the same.
  • the present invention relates to a solar cell element including a back surface field (BSF) layer, a passivation (passivation: passivation) film, and a back electrode on the back side of a semiconductor substrate, and a method for manufacturing the same.
  • BSF back surface field
  • passivation passivation: passivation
  • a p-type semiconductor substrate is diffused in a diffusion furnace to form phosphorus on the surface side of the semiconductor substrate 1, and etching is performed on the back and side surfaces.
  • the BSF layer containing a large amount of p-type semiconductor impurities is formed by applying aluminum paste on the back side of the n-layer in a comb-like or grid shape by screen printing, etc., and baking it.
  • a p + layer (back surface field layer) is partially formed, and then the back electrode is formed by applying silver paste in a comb-like shape or lattice shape along the contour shape of the p + layer and baking it by screen printing.
  • the portion where the back electrode is not formed is reduced in p-type impurities. Since it is contained only in the concentration, there is one in which an excellent passivation effect can be obtained as compared with the case where it is contained in a high concentration (see, for example, Patent Document 1).
  • a pp + layer barrier is formed in the vicinity of the back surface, and minority carriers generated in the p-type semiconductor substrate are directed to the back surface electrode. Reflected light does not recombine at this back electrode part, and the number of things that reach the pn junction increases, increasing the photocurrent, and the energy difference between the pp + layers leads to an increase in the open-circuit voltage, making it more efficient for solar cells. Will improve.
  • Patent Document 1 JP-A-8-274356 (page 3-4, Fig. 3)
  • the invention described in claim 1 aims to provide a solar cell element capable of realizing the BSF effect and the passivation effect with a simple structure.
  • the invention described in claim 2 is intended to provide a method for manufacturing a solar cell element with a simplified manufacturing process.
  • the invention according to claim 1 of the present invention covers the entire back surface of the semiconductor substrate with a BSF layer, and only a part of the back surface side of the BSF layer and the first back electrode And the most of the back side excluding the contact part of both is covered with a passivation film, and the back side of the passivation film is covered with a second back electrode having a lower resistance than the first back electrode, The first back electrode and the second back electrode are brought into contact with each other.
  • the invention described in claim 2 is formed by laminating a passivation film on the back surface side of the BSF layer formed on the entire back surface of the semiconductor substrate, and the back surface of the passivation film.
  • a silver paste containing aluminum is applied to a part of the side, and a first back electrode is formed by baking.
  • a silver paste is applied to the back side of the passivation film and the first back electrode, and a second back electrode is formed by baking. It is characterized by that.
  • the invention according to claim 1 of the present invention covers the entire back side of the semiconductor substrate with a BSF layer, Only a part of the back side of the BSF layer is brought into contact with the first back side electrode, and most of the back side excluding these contact parts is covered with a passivation film, so that the surface recombination in the most part of the back side of the semiconductor substrate is achieved.
  • Loss is reduced, the performance of the solar cell is improved, and the back side of the passivation film is covered with a second back electrode having a lower resistance than the first back electrode, and the first back electrode and the second back electrode ,
  • the power loss due to resistance is reduced at the second back electrode, which is lower in resistance than the first back electrode, and the long-wavelength light reaching the back surface of the semiconductor substrate is reduced at the second back electrode.
  • the power generation effect is improved by reflection inside.
  • the manufacturing process is simplified because the BSF layer and the passivation film need to be positioned precisely compared to the conventional one in which the BSF layer is not formed and the portion needs to be covered with the passivation film. Manufacturing cost can be reduced.
  • a passivation film is laminated on the back surface side of the BSF layer formed on the entire back surface of the semiconductor substrate, and aluminum is formed on a part of the back surface side of the passivation film.
  • a first back electrode is formed which penetrates a part of the nosy basis film and comes into electrical contact with the BSF layer.
  • the back side of the passivation film and the first back electrode A second back electrode is formed by applying a silver paste to the substrate and baking it.
  • the BSF layer and the passivation film need to be precisely positioned, compared to the conventional manufacturing method where the BSF layer is not formed and the part needs to be covered with a passivation film. And the manufacturing cost can be reduced.
  • the solar cell element A of the present invention has a P + layer or an n + layer formed on the entire back surface of a P-type or n-type semiconductor substrate 1 made of single crystal or polycrystalline silicon as shown in FIGS.
  • the BSF layer 2 is made of, and the back side most of the BSF layer 2 is covered with the nossivation film 3, and a first back electrode 4 that is in partial contact with only a part of the back side of the BSF layer 2 is provided.
  • a second back electrode 5 having a lower resistance than the first back electrode 4 is provided so as to cover the entire back side of the passivation film 3 and the first back electrode 4, or at least the first back electrode 4 is not present.
  • the second back electrode 5 is provided so as to obtain a sufficient contact area with the first back electrode 4 so as to cover the back side of the passivation film 3.
  • a diffusion layer 6 which is an n + layer or a P + layer is formed on the entire surface of the p-type or n-type semiconductor substrate 1, and an antireflection film 7 is laminated on the surface. It is also possible to provide a surface electrode 8.
  • a BSF layer 2 and a passivation film 3 which are P + layers are sequentially formed on the entire back surface of a p-type semiconductor substrate 1 as shown in FIGS. 1 to 3, and then the passivation film is formed.
  • the first back electrode 4 is partially provided on the back surface side of 3, and a part of the passivation film 3 is melted and removed by subsequent heat treatment to make electrical contact between the first back electrode 4 and the BSF layer 2. (Fire through) is formed, and the second back electrode 5 is formed over the entire back surface side of the passivation film 3 and the first back electrode 4.
  • the BSF layer 2 is formed by applying a p-type dopant 2 'to the entire back surface of the p-type semiconductor substrate 1 by a screen printing method or a printing method similar thereto, and heat-treating it.
  • the p-type dopant 2 ' is diffused at a high concentration.
  • the passivation film 3 is an electrically insulating oxide film such as a silicon oxide film or a silicon nitride film formed by a chemical vapor deposition method such as plasma CVD or atmospheric pressure CVD or a similar method.
  • the first back electrode 4 is made of a silver paste 4 'containing aluminum or the like, and this silver paste 4' is applied to a predetermined thickness by a screen printing method or a printing method similar thereto. It is formed into a desired shape by heat treatment at a predetermined temperature.
  • the second back electrode 5 having a lower resistance than the first back electrode 4 is made of a silver paste 5 'or the like, and this silver paste 5' is subjected to a predetermined printing method by a screen printing method or a printing method similar thereto. It is formed in contact with the first back electrode 4 by applying to a thickness and heat-treating at a predetermined temperature.
  • the contact structure of the first back electrode 4 and the second back electrode 5 is not shown in the figure if the current generated by sunlight can be sufficiently extracted from the first back electrode 4 to the second back electrode 5. Simple contact is acceptable.
  • a p-type dopant 2 ′ is applied to the entire back surface of the p-type semiconductor substrate 1, and an n-type dopant is applied to the entire surface of the semiconductor substrate 1.
  • the BSF layer 2 is formed on the back surface side of the semiconductor substrate 1 and the n + layer 6 is formed on the front surface side.
  • a passivation film 3 made of an oxide film and an antireflection film 7 are laminated outside the BSF layer 2 and the n + layer 6 as shown in FIG.
  • the oxidation film 3 and the antireflection film 7 are sequentially formed in different processes.
  • the passivation film 3 and the antireflection film 7 are formed by supplying a gas into a diffusion furnace (not shown) in the middle of the diffusion process described above, the semiconductor substrate is formed from the diffusion furnace.
  • the diffusion step and the oxide film formation step can be performed continuously without taking 1 out.
  • a silver paste 4 ′ containing aluminum or the like is applied to a part of the back surface side of the passivation film 3 as shown in FIG.
  • the aluminum component in the silver paste 4 ′ melts and removes a part of the passivation film 3 and makes electrical contact with the BSF layer 2 (fire through 1). )
  • the first back electrode 4 force as shown in FIG. 3 (d) is covered with the back surface side partial force S passivation film 3 of the BSF layer 2 excluding the contact portion 4a reaching the BSF layer 2.
  • Semiconductor base The surface recombination loss in the majority of the back side of the plate 1 is reduced and the performance of the solar cell is improved.
  • the contact area of the contact portion 4a with respect to the passivation film 3 is made as small as possible within a range in which a necessary energization amount is ensured, so that the contact portion 4a penetrating from the contact film 4a.
  • the loss of electric power flowing out to the passivation film 3 can be reduced, and the performance of the solar cell can be improved.
  • the contact portions 4a are arranged in a cross-sectional lattice shape as shown in FIG. 2 (a), or dispersed in the form of dots as shown in FIG.
  • the force that reduces the area can be made in other shapes.
  • a silver paste 8 'containing aluminum or the like is applied to the surface side of the antireflection film 7 as shown in Figs. 3 (c) and 3 (d), followed by firing.
  • the aluminum component in the silver paste 8 'melts and removes a part of the antireflection film 7 and makes electrical contact with the n + layer 6 (fire-through). It is also possible to do this.
  • silver paste 5 is applied to substantially the entire back surface side of the passivation film 3 and the first back electrode 4, and then comes into electrical contact with the first back electrode 4 by subsequent firing.
  • a back electrode 5 is formed.
  • the second back electrode 5 compensates for the insufficient resistance of the first back electrode 4 alone, and power loss is reduced.
  • the power generation effect is improved by reflection inside the substrate 1.
  • Example 2 electrical contact (fire through) between the BSF layer 2 penetrating the passivation film 3 by the heat treatment described above and the first back electrode 4 as shown in FIGS. 4 (a) to (g) In place of the first back electrode 4 and the BSF layer 2 covering the entire back surface of the semiconductor substrate 1 by contact with the first back electrode 4 by a manufacturing method using the resist 9, and removing the contact portion 4a between them.
  • the configuration in which the majority of the back side is covered with the passivation film 3 and the back side of the passivation film 3 is covered with the second back electrode 5 and brought into contact with the first back electrode 4 is shown in FIGS.
  • the other configuration is the same as Example 1 shown in FIGS.
  • the BSF layer 2 as shown in FIG. 4 (b) is formed.
  • a first paste 4 is formed by applying a silver paste 4 ′ partially containing aluminum or the like and then baking.
  • the passivation film 3 is spread over the entire surface as shown in FIG. 4 (d). After that, only the passivation film laminated on the resist 9 as shown in FIGS. 4E and 4F is partially removed to expose the first back electrode 4.
  • the back surface side partial force S passivation film 3 excluding the contact portion 4 a between only the back surface side part of the BSF layer 2 and the first back electrode 4 is covered.
  • silver paste 5 ' is applied to substantially the entire back surface side of the remaining passivation film 3 and first back electrode 4 as shown in FIG. Form a second back electrode 5 in electrical contact with the electrode 4.
  • the second embodiment shown in FIGS. 4 (a) to 4 (g) can obtain the same operational effects as the first embodiment shown in FIGS. 1 to 3 described above.
  • the present invention is not limited to this, and an n semiconductor substrate 1 can also be used.
  • the semiconductor substrate 1 A BSF layer 2 having an n + layer force is formed on the back surface side, and a diffusion layer 6 which is a P + layer is formed on the front surface side.
  • FIG. 1 is a longitudinal sectional view showing Example 1 of a solar cell element of the present invention.
  • FIG. 2 is an enlarged cross-sectional view showing a contact portion between a BSF layer and a first back electrode, and specific examples are shown in (a) and (b).
  • FIG. 3 is a reduced longitudinal sectional view showing Example 1 of the method for manufacturing a solar cell element of the present invention, and is shown in (a) to (d) in the order of the steps.
  • FIG. 4 is a reduced longitudinal sectional view showing Example 2 of the method for manufacturing a solar cell element of the present invention, and is shown in (a) to (g) in the order of the steps.

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  • Engineering & Computer Science (AREA)
  • Electromagnetism (AREA)
  • Sustainable Development (AREA)
  • Sustainable Energy (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photovoltaic Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

L’invention concerne un élément de pile solaire réalisant un effet BSF et un effet de passivation grâce à une structure simple. Comme le côté superficiel arrière d’un substrat semi-conducteur (1) est recouvert entièrement d’une couche BSF (2), seulement une partie de la couche BSF (2) sur le côté superficiel arrière est mise au contact d’une première électrode de surface arrière (4), et une grande partie sur le côté superficiel arrière est recouverte d’un film de passivation (3) à l’exception de ces portions de contact (4a), on réduit la perte de recombinaison superficielle dans la grande partie du substrat semi-conducteur (1) sur le côté superficiel arrière et l’on améliore les performances d’une pile solaire. Par ailleurs, lorsque le côté superficiel arrière du film de passivation est recouvert d’une seconde électrode de surface arrière (5) ayant une résistance inférieure à celle de la première électrode de surface arrière (4) et la première électrode de surface arrière (4) est mise au contact de la seconde électrode de surface arrière (5), on réduit la perte d’alimentation due à la résistance au niveau de la seconde électrode de surface arrière (5) ayant une résistance inférieure à celle de la première électrode de surface arrière (4), et la lumière de longueur d’onde importante arrivant au niveau de la surface arrière et provenant de la surface avant est réfléchie contre la seconde électrode de surface arrière (5) vers l’intérieur du substrat semi-conducteur (1) augmentant ainsi la production d’énergie.
PCT/JP2006/308971 2005-05-31 2006-04-28 Élément de pile solaire et procédé de fabrication idoine WO2006129444A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2005159509A JP2008204967A (ja) 2005-05-31 2005-05-31 太陽電池素子及びその製造方法
JP2005-159509 2005-05-31

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Cited By (10)

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WO2009157079A1 (fr) * 2008-06-26 2009-12-30 三菱電機株式会社 Cellule de batterie solaire et son procédé de fabrication
WO2010119512A1 (fr) * 2009-04-14 2010-10-21 三菱電機株式会社 Dispositif photovoltaïque et son procédé de fabrication
WO2010150606A1 (fr) * 2009-06-23 2010-12-29 三菱電機株式会社 Dispositif photovoltaïque et son procédé de fabrication
CN102709352A (zh) * 2011-03-28 2012-10-03 株式会社东芝 光电转换元件
JP2012212769A (ja) * 2011-03-31 2012-11-01 Kyocera Corp 太陽電池素子
CN103985781A (zh) * 2013-02-07 2014-08-13 大日本网屏制造株式会社 晶体硅型太阳能电池及其制造方法
JP2014212219A (ja) * 2013-04-19 2014-11-13 信越化学工業株式会社 太陽電池及びその製造方法
JP5649580B2 (ja) * 2009-09-18 2015-01-07 信越化学工業株式会社 太陽電池の製造方法
US9224888B2 (en) 2010-12-06 2015-12-29 Shin-Etsu Chemical Co., Ltd. Solar cell and solar-cell module
US9887312B2 (en) 2010-12-06 2018-02-06 Shin-Etsu Chemical Co., Ltd. Solar cell and solar-cell module

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI493605B (zh) * 2008-06-11 2015-07-21 Ind Tech Res Inst 背面電極層的製造方法
WO2011035268A2 (fr) * 2009-09-18 2011-03-24 Applied Materials, Inc. Implants de réglage de seuil pour réduire une recombinaison de surface dans des cellules solaires
JP5377226B2 (ja) * 2009-10-29 2013-12-25 三菱電機株式会社 太陽電池セル及びその製造方法
WO2012046306A1 (fr) * 2010-10-05 2012-04-12 三菱電機株式会社 Dispositif photovoltaïque et son procédé de fabrication
KR101860919B1 (ko) 2011-12-16 2018-06-29 엘지전자 주식회사 태양 전지 및 이의 제조 방법
KR101921738B1 (ko) 2012-06-26 2018-11-23 엘지전자 주식회사 태양 전지
JP2014017366A (ja) * 2012-07-09 2014-01-30 Sharp Corp 薄膜化合物太陽電池セルおよびその製造方法
JP6356855B2 (ja) * 2017-03-16 2018-07-11 信越化学工業株式会社 太陽電池の製造方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59117276A (ja) * 1982-12-24 1984-07-06 Mitsubishi Electric Corp 太陽電池の製造方法
JPH0334583A (ja) * 1989-06-30 1991-02-14 Sharp Corp 半導体装置
JPH03263877A (ja) * 1990-03-13 1991-11-25 Sharp Corp 太陽電池の電極形成方法
JPH0595127A (ja) * 1991-10-02 1993-04-16 Sharp Corp 光電変換素子の製造方法
JPH06310740A (ja) * 1993-04-21 1994-11-04 Sharp Corp 太陽電池及びその製造方法
JPH09237910A (ja) * 1996-02-28 1997-09-09 Sharp Corp 太陽電池

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59117276A (ja) * 1982-12-24 1984-07-06 Mitsubishi Electric Corp 太陽電池の製造方法
JPH0334583A (ja) * 1989-06-30 1991-02-14 Sharp Corp 半導体装置
JPH03263877A (ja) * 1990-03-13 1991-11-25 Sharp Corp 太陽電池の電極形成方法
JPH0595127A (ja) * 1991-10-02 1993-04-16 Sharp Corp 光電変換素子の製造方法
JPH06310740A (ja) * 1993-04-21 1994-11-04 Sharp Corp 太陽電池及びその製造方法
JPH09237910A (ja) * 1996-02-28 1997-09-09 Sharp Corp 太陽電池

Cited By (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5174903B2 (ja) * 2008-06-26 2013-04-03 三菱電機株式会社 太陽電池セルの製造方法
US8569100B2 (en) 2008-06-26 2013-10-29 Mitsubishi Electric Corporation Solar cell and manufacturing method thereof
WO2009157079A1 (fr) * 2008-06-26 2009-12-30 三菱電機株式会社 Cellule de batterie solaire et son procédé de fabrication
WO2010119512A1 (fr) * 2009-04-14 2010-10-21 三菱電機株式会社 Dispositif photovoltaïque et son procédé de fabrication
US8722453B2 (en) 2009-04-14 2014-05-13 Mitsubishi Electric Corporation Photovoltaic device and method for manufacturing the same
WO2010150606A1 (fr) * 2009-06-23 2010-12-29 三菱電機株式会社 Dispositif photovoltaïque et son procédé de fabrication
WO2010150358A1 (fr) * 2009-06-23 2010-12-29 三菱電機株式会社 Dispositif à force photoélectromotrice, et son procédé de fabrication
JP5649580B2 (ja) * 2009-09-18 2015-01-07 信越化学工業株式会社 太陽電池の製造方法
US11545588B2 (en) 2009-09-18 2023-01-03 Shin-Etsu Chemical Co., Ltd. Solar cell, method for manufacturing solar cell, and solar cell module
US11538944B2 (en) 2009-09-18 2022-12-27 Shin-Etsu Chemical Co., Ltd. Solar cell, method for manufacturing solar cell, and solar cell module
US10032940B2 (en) 2009-09-18 2018-07-24 Shin-Etsu Chemical Co., Ltd. Solar cell, method for manufacturing solar cell, and solar cell module
US9224888B2 (en) 2010-12-06 2015-12-29 Shin-Etsu Chemical Co., Ltd. Solar cell and solar-cell module
US9887312B2 (en) 2010-12-06 2018-02-06 Shin-Etsu Chemical Co., Ltd. Solar cell and solar-cell module
CN102709352A (zh) * 2011-03-28 2012-10-03 株式会社东芝 光电转换元件
JP2012212769A (ja) * 2011-03-31 2012-11-01 Kyocera Corp 太陽電池素子
CN103985781A (zh) * 2013-02-07 2014-08-13 大日本网屏制造株式会社 晶体硅型太阳能电池及其制造方法
JP2014212219A (ja) * 2013-04-19 2014-11-13 信越化学工業株式会社 太陽電池及びその製造方法

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JP2008204967A (ja) 2008-09-04

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