WO2006125396A1 - Dispositif electroluminescent a gain et son procede de fabrication - Google Patents

Dispositif electroluminescent a gain et son procede de fabrication Download PDF

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Publication number
WO2006125396A1
WO2006125396A1 PCT/CN2006/001100 CN2006001100W WO2006125396A1 WO 2006125396 A1 WO2006125396 A1 WO 2006125396A1 CN 2006001100 W CN2006001100 W CN 2006001100W WO 2006125396 A1 WO2006125396 A1 WO 2006125396A1
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Prior art keywords
layer
aluminum nitride
indium gallium
substrate
type
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PCT/CN2006/001100
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English (en)
French (fr)
Inventor
Fengyi Jiang
Li Wang
Chuanbing Xiong
Wenqing Fang
Hechu Liu
Maoxing Zhou
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Lattice Power (Jiangxi) Corporation
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Application filed by Lattice Power (Jiangxi) Corporation filed Critical Lattice Power (Jiangxi) Corporation
Priority to EP06741988.7A priority Critical patent/EP1885001A4/en
Priority to JP2008512675A priority patent/JP2008543032A/ja
Priority to US11/915,304 priority patent/US8384100B2/en
Publication of WO2006125396A1 publication Critical patent/WO2006125396A1/zh

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0093Wafer bonding; Removal of the growth substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of group III and group V of the periodic system
    • H01L33/32Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40Materials therefor
    • H01L33/405Reflective materials

Definitions

  • the invention relates to an indium gallium aluminum nitride ( A light emitting device and a method of manufacturing the same.
  • many novel light-emitting devices have been fabricated using indium gallium aluminum nitride materials, such as blue, green, ultraviolet and white light emitting diodes, violet semiconductor lasers, and the like.
  • most of the indium gallium aluminum nitride light emitting device products are prepared using a sapphire substrate.
  • JP2737053 a method of preparing a gallium nitride light-emitting device on a sapphire substrate is given in Japanese Patent (JP2737053).
  • sapphire is an insulating material
  • the two electrodes of the indium gallium aluminum nitride light-emitting device prepared on the sapphire substrate must be fabricated on the same side of the chip, which results in a complicated chip manufacturing process and increases the packaging difficulty, resulting in a decrease in the yield. , reliability is reduced, cost is increased.
  • the thermal conductivity of sapphire is low, and if a high-power device is to be manufactured, there is a problem that heat dissipation is difficult.
  • One solution is to grow a gallium nitride material using a silicon carbide substrate. Since silicon carbide can conduct electricity and has high thermal conductivity, the above problems can be well solved technically.
  • a method of preparing an indium gallium aluminum nitride light-emitting device on a silicon carbide substrate is disclosed in U.S. Patent No. 5,686,738.
  • silicon carbide substrates are very expensive, and the growth of indium gallium aluminum nitride materials will make the product costly. Therefore, considering the production cost, the silicon carbide substrate is also not conducive to popularization.
  • Another solution is to grow an indium gallium aluminum nitride material on a silicon substrate.
  • silicon is a mature semiconductor material, its cost is low, the processing technology is mature, and the thermal conductivity is high. Therefore, the use of a silicon substrate to fabricate an indium gallium aluminum nitride light-emitting device can not only make the structure of the upper and lower electrodes, but also greatly reduce the cost. However, since the band gap of silicon is very narrow and strongly absorbs visible light, the indium gallium aluminum nitride light-emitting device directly fabricated on a silicon substrate has low light-emitting efficiency due to absorption of the substrate.
  • a further solution in the prior art is to bond the indium gallium aluminum nitride material grown on the sapphire to a conductive substrate and then remove the sapphire substrate so that the upper and lower electrodes can be fabricated.
  • An object of the present invention is to provide an indium gallium aluminum nitride light-emitting device which is provided with an upper and lower electrode structure to reduce cost and improve luminous efficiency.
  • Another object of the present invention is to provide a A method for manufacturing the above-described indium gallium aluminum nitride light-emitting device provided with an upper and lower electrode mechanism, using a silicon substrate for indium gallium aluminum nitride stack growth, and then bonding to another conductive substrate, using a relatively inexpensive and easily removable silicon The substrate material is fabricated into an indium gallium aluminum nitride light emitting device, which simplifies the manufacturing method and reduces the manufacturing cost.
  • the indium gallium aluminum nitride light-emitting device of the present invention comprises a conductive substrate provided with a main surface and a back surface, and a bonding metal layer is disposed on the main surface of the conductive substrate, and the light is reflected on the bonding metal layer.
  • the indium gallium aluminum nitride light-emitting device of the invention has stable upper and lower electrode structures, thereby simplifying the chip manufacturing process, reducing the packaging difficulty, improving the product qualification rate and working reliability, and reducing the manufacturing cost.
  • the indium gallium aluminum nitride light emitting device manufacturing method of the invention, the indium gallium aluminum nitride stack required for growing the light emitting device on the silicon substrate, the silicon substrate can realize the high quality indium gallium aluminum nitrogen material growth, and is easy Removed, and cheap. Therefore, the method can achieve both large-scale production and low cost advantages.
  • FIG. 1 is a cross-sectional structural view showing an upper and lower electrode indium gallium aluminum nitride light-emitting device of the present invention.
  • FIG. 2 is a cross section of an indium gallium aluminum nitride stack and a reflective layer and a bonding layer grown on a silicon substrate in the present invention; Schematic diagram of the surface structure.
  • FIG 3 is a schematic cross-sectional view showing a conductive substrate and a metal bonding layer in the present invention.
  • Fig. 4 is a cross-sectional structural view showing the substrate obtained by bonding the indium gallium aluminum nitride epitaxial wafer of Fig. 2 and the conductive substrate of Fig. 3.
  • Fig. 5 is a cross-sectional structural view showing a light-emitting device obtained by removing a growth substrate from the substrate shown in Fig. 4 and fabricating a lead electrode.
  • 11 is a conductive substrate
  • 12 is a bonding layer
  • 13 is a reflective layer
  • 14 is an indium gallium aluminum nitride semiconductor stack
  • 15 and 16 are electrodes
  • 21 is a silicon (111) substrate
  • 22 is an aluminum nitride buffer layer.
  • 23 is an undoped gallium nitride layer
  • 24 is an N-type gallium nitride layer
  • 25 is a gallium nitride/indium gallium nitride multiple quantum well
  • 26 is a P-type gallium nitride layer
  • 27 is a reflective layer
  • 28 is a sticky layer.
  • the bonding layer, 31 is a substrate
  • 32 is an ohmic contact layer
  • 33 is an adhesive layer
  • Cl and C2 are electrodes.
  • the indium gallium aluminum nitride light-emitting device of the present invention comprises a conductive substrate 11 on which a bonding metal layer 12 and a light reflecting layer 13 are sequentially disposed, and the light reflecting layer 13 is indium.
  • a gallium aluminum nitride semiconductor laminate 14 wherein the lowermost layer of the indium gallium aluminum nitride stack 14 is a P type layer, and the uppermost layer is an N type layer, and the upper surface of the laminated indium gallium aluminum nitride material is a nitrogen surface, in the indium gallium aluminum
  • the material of the conductive substrate 11 may be any semiconductor or metal material, but in view of factors such as electrical conductivity, thermal conductivity, processing technology, cost, etc., mature semiconductors such as silicon and such as copper, stainless steel, silver, gold, and kovar are generally preferred. (Can be cut is an iron-cobalt-nickel alloy) and other common metal materials. Since the indium gallium aluminum nitride material is difficult to directly bond with the conductive substrate 11, an adhesive layer 12 is required between the substrate 11 and the indium gallium aluminum nitride layer 14. The bonding layer 12 not only needs to have good adhesion, but also needs to form a good ohmic contact with the substrate 11, and also needs to be not damaged or damaged during subsequent processing.
  • the bonding layer 12 may be one layer or multiple layers. Since the carrier concentration of the conductive substrate 11 is high, the selection of the metal for the bonding layer 12 in contact therewith can be wide, and generally only adhesiveness and stability are required. In order to achieve a stable and reliable bonding, the metal bonding layer should be provided with a lower melting point, such as gold, zinc, indium, tin, palladium, etc., and alloys thereof. In view of the influence of interdiffusion between metal layers on ohmic contact and stability during processing, the bonding metal is preferably an alloy of gold and gold, such as an alloy of gold zinc, gold tin or the like.
  • the light reflection efficiency of the indium gallium aluminum nitride stack 14 is low, which leads to a decrease in the light extraction efficiency of the device, and thus the bonding metal layer 12 and the indium gallium aluminum nitride stack.
  • a light reflecting layer 13 is inserted between 14.
  • the lowermost layer of the device indium gallium aluminum nitride stack 14 of the present invention is a P-type layer, and therefore the light reflecting layer 13 must also form a good ohmic contact with the P-type indium gallium aluminum nitride material.
  • the reflective layer 13 is platinum, because platinum not only forms a good ohmic contact with the P-type indium gallium aluminum nitride material, but also has a high reflectance for visible light, and has good stability and the like.
  • the indium gallium aluminum nitride stack 14 includes at least one N-type layer and one P-type layer. In order to improve the luminous efficiency, it is generally required to add a microstructure such as a double heterojunction or a multiple quantum well between the N-type layer and the P-type layer, or a laminate structure of an indium gallium aluminum nitride film in any of the disclosed techniques.
  • the composition of indium, gallium, and aluminum in the light-emitting layer 14 can be changed between 0-1, respectively, to adjust the light-emitting wavelength of the device.
  • the upper surface of the indium gallium aluminum nitride stack 14 in the device of the present invention is a nitrogen face.
  • Nitrogen indium gallium A feature of aluminum-nitrogen materials is the ability to be thinned by chemical etching, eliminating the need for expensive equipment such as ICP etchers.
  • the surface layer can be easily roughened to improve light extraction efficiency.
  • the ohmic electrode 15 on the indium gallium aluminum nitride stack 14 can be selected from a small work function metal such as titanium or aluminum, and a gold-nickel alloy. If the doping concentration is sufficiently high, then in principle any metal can be chosen.
  • the preferred embodiment of the present invention uses a gold-nickel alloy as the N-type ohmic electrode 15, because the electrode 15 is provided with good stability, corrosion resistance and oxidation resistance.
  • the electrode 16 on the back surface of the conductive substrate 11 needs to be correspondingly selected according to the substrate material. Since the conductive substrate is provided with a high carrier concentration, it can be any metal in principle, and generally, gold, nickel/gold, etc. are generally preferred. Electrode such as titanium/gold.
  • a method of preparing the above light emitting device comprising the steps of:
  • the indium gallium aluminum nitride stack 22-26 required for the light emitting device is grown on a silicon (111) substrate 21, and the growth method may be any disclosed indium gallium aluminum nitride material growth technique, such as chemical vapor deposition, molecular beam epitaxy. Wait.
  • the growth order of the indium gallium aluminum nitride stack 22-26 can be any disclosed in the published literature.
  • the preferred growth sequence is: aluminum nitride buffer layer 22, undoped gallium nitride layer 23, silicon-doped gallium nitride layer (N-type layer) 24, gallium nitride/indium gallium nitride multiple quantum well 25, magnesium doped Gallium nitride layer (P type layer) 26.
  • a layer of light reflecting layer 27 is then formed in the P-type gallium nitride layer, while the layer is also an ohmic contact layer, which layer material is preferably platinum. In order to improve ohmic contact properties, the electrode layer generally requires thermal annealing to alloy it.
  • a metal bonding layer 28 is formed on the light reflecting layer.
  • the bonding layer may be any metal in principle, but in order to easily achieve bonding, a metal having a low melting point is generally selected, preferably a low melting point gold alloy such as gold-zinc, gold-tin, etc., gold-indium, etc., of course. It can also be pure gold.
  • the bonding layer 28 may be one layer or multiple layers.
  • the reflective layer 27 and the bonding metal layer 28 may also be formed at one time and then alloyed.
  • an ohmic contact layer 32 is first formed on the other conductive substrate 31.
  • the ohmic contact layer may be selected from a single layer or a plurality of layers of metal such as nickel, gold, platinum, or titanium depending on the conductivity type and conductivity of the silicon substrate.
  • a metal bonding layer 33 is formed on the ohmic contact layer 32, and the bonding layer 33 is selected from the bonding layer 28 on the gallium nitride.
  • the conductive substrate 31 itself is a metal having a lower melting point, it is not necessary to additionally fabricate the ohmic contact layer 32 and the bonding layer 33.
  • the ohmic contact layer 32 may also function directly as the bonding layer 33.
  • the above metal layer may be formed by electron beam evaporation, magnetron sputtering, or any conventional metal plating method.
  • the bonding layer 28 on the indium gallium aluminum nitride film and the conductive substrate 31 are butted together by a method, and a preferred method is to pressurize at a certain temperature for a certain period of time.
  • the silicon substrate 21 on which the indium gallium aluminum nitride film is grown is removed.
  • the method of removing the silicon substrate 21 may be mechanical grinding, dry etching, chemical etching, and a combination of these methods.
  • a preferred method is to etch it using a mixed solution of hydrofluoric acid, nitric acid and acetic acid.
  • the exposed indium gallium aluminum nitride material is obtained. Since it is generally required to grow the aluminum nitride buffer layer 22 and the undoped gallium nitride layer 23 during growth, these layers are disadvantageous for ohmic contact, so These layers are removed to expose the N-type layer 24 provided with a high carrier concentration, and then an ohmic contact is formed thereon.
  • the method of removing the aluminum nitride buffer layer 22 and the undoped gallium nitride layer 23 may be a dry etching method such as reactive ion etching or ICP etching, or may be etched with concentrated phosphoric acid or a strong alkali.
  • An ohmic electrode Cl is then formed on the N-type gallium nitride layer 24. Then, another ohmic electrode C2 is formed on the back surface of the conductive substrate 31, thus obtaining an indium gallium aluminum nitride light-emitting device having upper and lower electrodes according to the present invention.
  • an aluminum nitride buffer layer 22 an undoped gallium nitride layer 23, and a silicon N-type gallium nitride are sequentially grown by chemical vapor deposition.
  • the epitaxial wafer was annealed in a nitrogen atmosphere of 70 CTC for 30 minutes to activate magnesium impurities.
  • 50 nm of platinum 27 and 1000 nm of gold 28 were sequentially deposited on the P-type layer by electron beam evaporation.
  • the indium gallium aluminum nitride film is exposed, and the outermost layer is an aluminum nitride buffer layer 22, and then the substrate is etched in concentrated phosphoric acid until the aluminum nitride buffer layer 22 and the undoped gallium nitride layer 23 are Completely removed. Then, a 100 nm thick gold-nickel alloy was vapor-deposited on the N-type gallium nitride layer 24, and the substrate was alloyed under a nitrogen atmosphere of 300 Torr for 3 minutes.
  • a trench with a cross-web depth of 10 ⁇ m was formed on the surface by photolithography and ICP etching to divide the surface into a number of sides of 350 ⁇ m X 350 ⁇ m. Square countertops. Then, an aluminum nitride buffer layer, an undoped gallium nitride layer, a silicon-doped N-type gallium nitride layer, a 5-cycle aluminum gallium nitride/indium gallium nitride multi-quantum well are sequentially grown on the substrate by chemical vapor deposition. A magnesium-doped P-type gallium nitride layer.
  • the epitaxial wafer was annealed in a nitrogen atmosphere at 76 ° for 20 minutes to activate magnesium impurities.
  • 100 nm of platinum, 500 nm thick gold, and 200 nm thick were sequentially deposited on the P-type layer by electron beam evaporation.
  • Gold-zinc alloy 50 nm of platinum, 500 nm of gold and 100 nm of gold-indium alloy were evaporated on both sides of a silicon (100) substrate. After the evaporation, the indium gallium aluminum nitride film was grown.
  • the epitaxial wafer is bonded to a silicon (100) substrate having only a metal layer, and a force of 800 kg is applied at 260 ° C to bond it firmly. Then the silicon (111 ) substrate is removed by ICP etching. Until the indium gallium aluminum nitride film is exposed, the outermost layer is an aluminum nitride buffer layer, and then the aluminum nitride buffer layer and the undoped gallium nitride layer are completely etched by ICP etching. 50 nm thick titanium and 100 nm thick aluminum were deposited on the gallium nitride layer, and the substrate was alloyed in a nitrogen atmosphere at 500 ° C for 3 minutes.
  • Example 3 On a 2-inch silicon (111) substrate, an aluminum nitride buffer layer, an undoped gallium nitride layer, a silicon-doped N-type gallium nitride layer, and a 5-cycle indium gallium aluminum layer are sequentially grown by chemical vapor deposition. Nitrogen/indium gallium nitride multi-quantum well, magnesium-doped P-type gallium hydride layer. After the growth was completed, the epitaxial wafer was annealed in a nitrogen atmosphere of 70 CTC for 30 minutes to activate magnesium impurities.
  • a 100 nm thick gold-niobium nickel alloy was vapor-deposited on the N-type gallium nitride layer, and the substrate was alloyed under a nitrogen atmosphere at 300 ° C for 3 minutes. Then, 100 nm thick gold was evaporated on the gold-iridium nickel electrode, and an electrode having a diameter of 80 ⁇ m was formed by photolithography. The substrate was cut into a 200 ⁇ m X 200 ⁇ m chip and lead-packed to obtain the light-emitting device of the present invention.

Description

铟镓铝氮发光器件及其制造方法
技术领域:
本发明涉及一种铟镓铝氮 (
Figure imgf000003_0001
) 发光器件 及其制造方法。
背景技术:
铟镓铝氮 (InxGayAl^N, 0<=χ<=1, 0<=y<=l ) 是制备短波长发光器件的 优选材料体系之一。近年来,已经用铟镓铝氮材料制造出许多新颖的发光器件, 如蓝色、 绿色、 紫外和白色发光二极管、 紫色半导体激光器等等。 在现有技术 中, 绝大部分铟镓铝氮发光器件产品都是使用蓝宝石衬底制备的。现在这种技 术已经公开, 例如日本专利 (JP2737053 ) 中给出了一种在蓝宝石衬底上制备 氮化镓发光器件的方法。然而由于蓝宝石是绝缘材料, 因此蓝宝石衬底上制备 的铟镓铝氮发光器件的两个电极必须制作在芯片的同一侧,这样导致芯片制作 工艺较为复杂, 而且增加了封装难度, 导致合格率下降, 可靠性降低, 成本增 力口。 而且蓝宝石的热导率低, 如果要制造大功率器件, 则有散热困难的问题。 一种解决方案是使用碳化硅衬底生长氮化镓材料, 因为碳化硅可以导电, 而且 热导率高,因此从技术上讲,可以很好地解决上述问题。美国专利(US5686738 ) 中公开了一种在碳化硅衬底上制备铟镓铝氮发光器件的方法。但是,碳化硅衬 底非常昂贵,用于生长铟镓铝氮材料将使产品成本很高。 因此从生产成本来考 虑, 碳化硅衬底也不利于推广使用。另一种解决方案是在硅衬底上生长铟镓铝 氮材料。 由于硅是成熟的半导体材料,其成本低廉,加工工艺成熟, 热导率高, 因此使用硅衬底制造铟镓铝氮发光器件不仅可以制成上下电极的结构,还可以 使成本大大降低。但是由于硅的带隙很窄, 对可见光强烈吸收, 因此直接制作 在硅衬底上的铟镓铝氮发光器件由于衬底的吸收而出光效率很低。现有技术中 再一个解决方案是把蓝宝石上生长的铟镓铝氮材料粘接到一种导电衬底上,然 后再去除蓝宝石衬底, 这样就可以制成上下电极的芯片。然而由于蓝宝石非常 坚硬, 又极耐酸碱腐蚀, 去除蓝宝石衬底非常困难。 虽然发展出了激光剥离技 术, 但是目前合格率、 生产效率都比较低, 而且激光剥离过程对铟镓铝氮材料 也有一定的破坏, 因此该方法难以用于规模化生产。
发明内容:
本发明的一个目的在于提供一种铟镓铝氮发光器件, 这种器件设置有上 下电极结构, 以降低成本、 提高发 光效率。本发明的另一个目的在于提供一 种制造上述设置有上下电极机构的铟镓铝氮发光器件的方法,使用硅衬底进行 铟镓铝氮叠层生长, 然后粘接到另外一个导电衬底上, 利用较为低廉而容易去 除的硅衬底材料制造铟镓铝氮发光器件, 简化制造方法并降低制造成本。
本发明的铟镓铝氮发光器件其结构包括一个设置有主面和背面的导电衬 底,在所述导电衬底主面上设有一粘接金属叠层,粘接金属叠层上为光反射层, 在所述光反射层上设置有至少包含一个 P 型层和一个 N 型层的铟镓铝氮 ( In.Ga.AL-^N, 0<=χ<=1, 0<=y<=l ) 半导体叠层, 且该 P型铟镓铝氮层与所 述的光反射层直接接触;在所述的铟镓铝氮半导体层上和所述导电衬底背面分 别设置有一欧姆电极。
一种制备上述发光器件的方法, 包含以下步骤- a) 在一个硅 (111 ) 生长衬底上形成至少包含一个 N型层和一个 P型层 的铟镓铝氮 (InxGayAl^N, 0<=χ<-1 , 0<=y<=l ) 半导体叠层, 其中所述的铟 镓铝氮半导体叠层 (22— 26) 典型结构中包括氮化铝缓冲层 (22)、 N型氮化 镓层 (24)、 氮化镓 /铟镓氮多量子阱 (25)、 P型氮化镓层 (26), 最外层为 P 型层 (26); 在氮化铝缓冲层 (22) 和 N型氮化镓层 (24) 之间还可以有一未 掺杂的氮化镓层 (23), 氮化铝缓冲层可以掺杂也可以不掺;
b ) 在所述的铟镓铝氮半导体层表面依次形成光反射层和粘接金属叠层; c ) 把一个导电的粘接衬底的主面与所述粘接金属叠层粘接;
d) 把所述的硅 (111 ) 生长衬底以及氮化铝缓冲层、 未掺杂的氮化镓层 去除以暴露 N型铟镓铝氮层;
e)在所述 N型铟镓铝氮层表面和所述的粘接衬底背面上分别形成一个欧 姆电极。
本发明的铟镓铝氮发光器件具有稳定的上下电极结构, 从而简化了芯片 制作工艺, 降低了封装难度, 提髙了产品合格率及工作可靠性, 降低了制作成 本。本发明的铟镓铝氮发光器件制造方法, 在硅衬底上生长发光器件所需要的 铟镓铝氮叠层, 由于硅衬底既可以实现高质量的铟镓铝氮材料生长, 又很容易 去除, 而且价格便宜。 因此本方法既可以实现规模化生产, 又具有成本低的优 点。
附图说明:
图 1是本发明上下电极铟镓铝氮发光器件的剖面结构示意图。
图 2是本发明中在硅衬底上生 长的铟镓铝氮叠层及反射层和粘接层剖 面结构示意图。
图 3是本发明中导电衬底及金属粘接层剖面结构示意图。
图 4是图 2中的铟镓铝氮外延片和图 3中的导电衬底粘接后得到的基片 剖面结构示意图。
图 5是图 4所示的基片去除生长衬底并制作引线电极后得到的发光器件 剖面结构示意图。
具体实施方式:
下面结合附图和实施例对本发明进行详细说明。
在图 1一 5中的数字标号含义如下:
11是导电衬底, 12是粘接层, 13是反射层, 14是铟镓铝氮半导体叠层, 15、 16为电极, 21是硅 (111 ) 衬底, 22是氮化铝缓冲层, 23是未掺杂的氮 化镓层, 24是 N型氮化镓层, 25是氮化镓 /铟镓氮多量子阱, 26是 P型氮化 镓层, 27是反射层, 28是粘接层, 31是衬底, 32是欧姆接触层, 33是粘接 层, Cl、 C2为电极。
如图 1所示: 本发明的铟镓铝氮发光器件包含一个导电衬底 11, 在衬底 上依次设置有一粘接金属层 12和一光反射层 13, 所述光反射层 13上为铟镓 铝氮半导体叠层 14,该铟镓铝氮叠层 14中最下层为 P型层,最上层为 N型层, 且该叠层铟镓铝氮材料上表面为氮面,在铟镓铝氮叠层 14上和导电衬底 11背 面各有一个欧姆电极 15、 16。 '
其中导电衬底 11的材料可以是任何半导体或金属材料,但考虑到电导率、 导热性能、 加工工艺、 成本等因素, 一般优选硅等成熟的半导体和诸如铜、 不 锈钢、 银、 金、 可伐 (可伐是一种铁钴镍合金)等常见金属材料。 由于铟镓铝 氮材料与导电衬底 11难以直接粘接, 因此在衬底 11和铟镓铝氮层 14之间需 要一个粘接层 12。该粘接层 12不仅需要有良好的黏附性, 也需要能与衬底 11 形成良好的欧姆接触, 还需要在后续加工过程中不会被破坏或被损伤。该粘接 层 12可以为一层也可以为多层。 由于导电衬底 11的载流子浓度很高, 对于与 其接触的粘接层 12金属的选择范围可以很宽, 一般只要求黏附性、稳定性好。 为了实现稳定可靠的粘接, 金属粘接层应设置有较低的熔点, 可以选择如金、 锌、 铟、 锡、 钯等, 以及它们的合金。 考虑到金属层之间相互扩散对欧姆接触 的影响以及在加工过程中的稳定性, 粘接金属优选为金和金的合金, 如金锌、 金锡等合金。 由于镍、 金等粘接金属反光性能较差, 对铟镓铝氮叠层 14发出的光反射 效率较低, 将导致器件出光效率下降, 因此在粘接金属层 12和铟镓铝氮叠层 14之间插入一光反射层 13。如前所述, 本发明的器件铟镓铝氮叠层 14中最下 层为 P型层, 因此光反射层 13还必须能与 P型铟镓铝氮材料形成良好的欧姆 接触。 在本发明中, 该反射层 13为铂, 因为铂不仅能与 P型铟镓铝氮材料形 成良好的欧姆接触, 也对可见光有很高的反射率, 同时还有稳定性好等优点。 要实现电注入发光, 铟镓铝氮叠层 14中至少包含一个 N型层和一个 P型层。 为了提高发光效率,在 N型层和 P型层之间一般需要加入双异质结或多量子阱 等微结构, 或采用任何公开技术中铟镓铝氮薄膜的叠层结构。发光层 14中铟、 镓、 铝的组分分别可以在 0-1之间改变, 以调节器件发光波长。
如前所述, 本发明的器件中铟镓铝氮叠层 14的上表面是氮面。 氮面铟镓 铝氮材料的一个特点是能够用化学腐蚀法来减薄,因此不必使用 ICP刻蚀机等 昂贵设备。 此外也可以方便地对该表面层进行粗化, 以提高出光效率。
铟镓铝氮叠层 14上的欧姆电极 15可以选用钛、 铝等小功函金属和金锗 镍合金等。 如果掺杂浓度足够高, 则原则上选择任何金属都可以。 本发明的优 选方案使用金锗镍合金作为 N型欧姆电极 15, 因为该电极 15设置有很好的稳 定性, 抗蚀性和抗氧化性。导电衬底 11背面的电极 16则需要根据衬底材料相 应选择, 由于该导电衬底设置有很高的载流子浓度, 所以原则上可以是任何金 属, 一般优选常用的金、 镍 /金、 钛 /金等电极。
一种制备上述发光器件的方法, 包含以下步骤:
首先在一块硅 (111 ) 衬底 21上生长发光器件所需要的铟镓铝氮叠层 22 一 26,生长方法可以是任何公开的铟镓铝氮材料生长技术,例如化学气相沉积、 分子束外延等。 铟镓铝氮叠层 22-26的生长顺序可以是任意公开文献公布的 方案。 优选方案的生长顺序为: 氮化铝缓冲层 22、 未掺杂氮化镓层 23、 掺硅 氮化镓层 (N型层) 24、 氮化镓 /铟镓氮多量子阱 25、 掺镁氮化镓层 (P型层) 26。 为了释放硅衬底 21和铟镓铝氮材料之间由于晶格失配和热失配而导致的 巨大应力, 在生长前需要先在硅衬底表面刻出一些沟槽以增加自由面, 防止铟 镓铝氮薄膜出现裂纹。
铟镓铝氮材料生长完成后, 对其进行热退火, 以激活 P型杂质。然后在 P 型氮化镓层形成一层光反射层 27, 同时该层也是欧姆接触层, 该层材料优选 为铂。 为了改善欧姆接触性能, 该 电极层一般需要热退火使之合金化。接下 来在光反射层上形成一层金属粘接层 28。 该粘接层原则上可以是任何金属, 但为了容易实现粘接, 一般选择熔点不高的金属, 优选为低熔点的金合金, 如 金 -锌、 金-锡等、 金-铟等, 当然也可以是纯金。 粘接层 28可以是一层也可以 是多层。 反射层 27和粘接金属层 28也可以一次形成, 然后再进行合金。
与此同时, 在另一块导电衬底 31上首先形成一欧姆接触层 32。例如选用 硅衬底, 则欧姆接触层可根据硅衬底的导电类型和导电率等情况选择镍、 金、 铂、 钛等金属单层或多层。 然后在欧姆接触层 32上形成金属粘接层 33, 该粘 接层 33金属的选择条件同前述氮化镓上的粘接层 28。 而如果导电衬底 31本 身是熔点较低的金属, 则不需要再额外制作欧姆接触层 32和粘接层 33。 如果 欧姆接触层 32选择的是金等熔点不高的金属, 则欧姆接触层也可以直接作为 粘接层 33。 上述金属层的形成方法可以是电子束蒸发、 磁控溅射, 或任何常 见的金属镀膜方法。 粘接层 33制作完成后, 通过一种方法使铟镓铝氮薄膜上 的粘接层 28和导电衬底 31对接起来,优选的方法为在一定的温度下加压一段 时间。
粘接完成后, 把生长铟镓铝氮薄膜的硅衬底 21去除。 去除硅衬底 21的 方法可以是机械磨片、干法刻蚀、 化学腐蚀以及这些方法的组合。优选的方法 为使用氢氟酸、 硝酸和醋酸的混合溶液对其腐蚀。
去除硅衬底 21以后, 就得到暴露的铟镓铝氮材料, 由于生长时一般需要 生长氮化铝缓冲层 22和未掺杂的氮化镓层 23, 这些层不利于欧姆接触, 因此 先要去除这些层, 以暴露设置有高载流子浓度的 N型层 24, 然后在上面形成 欧姆接触。去除氮化铝缓冲层 22和未掺杂的氮化镓层 23的方法可以是反应离 子刻蚀、 ICP刻蚀等干法刻蚀方法, 也可以用浓磷酸或强碱腐蚀。 接着在 N型 氮化镓层 24形成欧姆电极 Cl。 然后在导电衬底 31背面形成另一个欧姆电极 C2, 这样就得到本发明所述的具有上下电极的铟镓铝氮发光器件。
下面用 3个实施例对本发明的方法进行进一步的说明。
实施例 1:
如图 2所示, 在一块 2英寸的硅 (111 ) 衬底 21上, 用化学气相沉积法 依次生长氮化铝缓冲层 22、 未掺杂氮化镓层 23、 惨硅 N型氮化镓层 24、 5个 周期的氮化镓 /铟镓氮多量子阱 25、 惨镁 P型氮化镓层 26。 生长完成后, 把外 延片在 70CTC氮气氛围下退火 30分钟以激活镁杂质。接着用电子束蒸发法在 P 型层上依次蒸镀 50 纳米的铂 27、 1000纳米厚的金 28。然后,如图 3所示, 在另一块硅 (111 ) 衬底 31上蒸镀 100纳米的镍 32、 1000纳米的金 33。 蒸发 完成后把长有铟镓铝氮薄膜的外延片和只蒸有镍 /金的硅(111 )衬底对粘起来, 并且在 300°C下加 600公斤力,使之粘接牢固,这样就得到如图 4所示的结构。 然后再把粘接好的衬底放入硝酸 /醋酸 /氢氟酸的混合溶液中腐蚀,直到生长铟 镓铝氮薄膜的硅衬底被完全去除。腐蚀前先要在衬底 31背面做上一层镍 /金保 护膜。 腐蚀后, 铟镓铝氮薄膜暴露出来, 最外层是氮化铝缓冲层 22, 接着把 该基片放入浓磷酸中腐蚀直到氮化铝缓冲层 22和未掺杂氮化镓层 23被完全去 除。 然后在 N型氮化镓层 24上蒸镀 100纳米厚的金锗镍合金, 并且把基片在 300Ό氮气氛围下下合金 3分钟。然后在金锗镍电极上再蒸发 1000纳米厚的金, 经光刻形成直径为 100微米的电极 Cl, 然后在衬底 31后面光刻形成电极 C2。 把基片切割成 1000微米 X 1000微米大小的芯片, 再引线封装就得到图 5所示 的本发明的发光器件。
实施例 2:
用一块 2英寸的硅 (111 )衬底, 先在表面用光刻和 ICP刻蚀的方法形成 纵横交错深度为 10微米的沟槽, 以使表面分割成许多边长为 350微米 X 350 微米的正方形台面。 然后用化学气相沉积法在衬底上依次生长氮化铝缓冲层、 未掺杂氮化镓层、 掺硅 N型氮化镓层、 5个周期的铝镓氮 /铟镓氮多量子阱、 掺镁 P型氮化镓层。 生长完成后, 把外延片在 76(TC氮气氛围下退火 20分钟 以激活镁杂质。 接着用电子束蒸发法在 P型层上依次蒸镀 100纳米的铂、 500 纳米厚的金、 200 纳米厚的金锌合金。 然后在一块硅 (100) 衬底正反两面上 都蒸镀 50纳米的铂、 500纳米的金、 100纳米厚的金铟合金。蒸发完成后把长 有铟镓铝氮薄膜的外延片和只蒸有金属层的硅(100 )衬底对粘起来,在 260°C 下加 800公斤力, 使之粘接牢固。 然后用 ICP刻蚀把硅 (111 ) 衬底刻除直至 铟镓铝氮薄膜暴露出来, 此时最外层是氮化铝缓冲层。接着用 ICP刻蚀方法把 氮化铝缓冲层和未糁杂氮化镓层被完全刻除。 然后在 N型氮化镓层上蒸鍍 50 纳米厚的钛、 100纳米厚的铝, 并且把基片在 500°C氮气氛围合金 3分钟。 然 后在钛 /铝电极上再蒸发 10纳米厚的钛和 1200纳米厚的金, 经光刻形成边长 为 100微米的正方形电极。沿着前述生长前预先形成的沟槽切开基片, 就得到 一颗颗独立的发光芯片,然后就可以进行引线封装并得到本发明所述的发光器 件。
实施例 3 : 在一块 2英寸的硅 (111 )衬底上, 用化学气相沉积法依次生长氮化铝缓 冲层、 未掺杂氮化镓层、 掺硅 N型氮化镓层、 5个周期的铟镓铝氮 /铟镓氮多 量子阱、 掺镁 P型氣化镓层。 生长完成后, 把外延片在 70CTC氮气氛围下退火 30分钟以激活镁杂质。 接着用电子束蒸发法在 P型层上依次蒸镀 5纳米的铂、 5纳米厚的镍、 10纳米厚的金, 并在 550Ό氮氧混合气中合金 3分钟。 然后再 蒸镀 500纳米厚的金。在一块抛光好的铜衬底上蒸 500纳米的金锡合金。蒸发 完成后把外延片和镀有金锡的铜衬底对粘起来,并且在 300°C下加 500公斤力, 使之粘接牢固。然后用 ICP刻蚀把硅衬底完全去除。接着把氮化铝缓冲层和未 掺杂氮化镓层完全去除。然后在 N型氮化镓层上蒸镀 100纳米厚的金锗镍合金, 并且把基片在 300°C氮气氛围下下合金 3分钟。然后在金锗镍电极上再蒸发 100 纳米厚的金, 经光刻形成直径为 80微米的电极。把基片切割成 200微米 X 200 微米的芯片并引线封装就得到本发明的发光器件。

Claims

权利要求
1、 一种铟镓铝氮 (InxGayAl^N, 0<=χ<=1 , 0<=y<=l ) 发光器件, 其特征 在于: 其结构包括一个设置有主面和背面的导电衬底 (11 ), 在所述导电衬底 主面上设有一粘接金属叠层(12), 粘接金属叠层上为光反射层(13), 在所述 光反射层 (13 ) 上设置有至少包含一个 P 型层和一个 N 型层的铟镓铝氮
( InxGayAL— xyN, 0<=χ<=1, 0<=y<-l ) 半导体叠层 (14), 且该 P型铟镓铝氮层 与所述的光反射层(13)直接接触, 在所述的铟镓铝氮半导体层 (14)上和所 述导电衬底 (11 ) 背面分别设置有一欧姆电极 (15、 16)。
2、 如权利要求 1所述的铟镓铝氮(InxGayAli— xyN, 0<=χ<=1, 0<=y<=l )发 光器件, 其特征在于: 所述的铟镓铝氮半导体层(14)设置有如下晶体学取向 关系: 从铟镓铝氮半导体层(14)指向所述导电衬底的方向为 <0001>晶向, 即 镓面朝下, 氮面朝上。
3、如权利要求 1或 2所述的铟镓铝氮(InxGayA xyN,
Figure imgf000010_0001
发光器件, 其特征在于: 所述的光反射层 (13) 至少包含一个铂层。
4、如权利要求 1或 2所述的铟镓铝氮(InxGayAl -yN,
Figure imgf000010_0002
发光器件, 特征在于: 在铟镓铝氮半导体叠层 (14)上的欧姆电极 (15) 由金 锗镍合金形成。
5、如权利要求 1或 2所述的发光器件,其特征在于:所述的导电衬底(11 ) 由硅、 铜或可伐形成。
6、 一种制备如权利要求 1所述的发光器件的方法, 包含以下步骤: a) 在一个硅 (111 ) 生长衬底 (21 ) 上形成至少包含一个 N型层 (24) 和一个 P型层 (26) 的铟镓铝氮 ( InxGayAU 0〈=x〈=l, 0<=y<=l ) 半导体 叠层 (22— 26), 其中所述的铟镓铝氮半导体叠层 (22-26 ) 结构中包括氮化 铝缓冲层 (22)、 N型氮化镓层 (24)、 氮化镓 /铟镓氮多量子阱 (25)、 P型氮 化镓层 (26), 最外层为 P型层 (26); 在氮化铝缓冲层(22) 和 N型氮化镓层
(24) 之间还可以有一未掺杂的氮化镓层 (23), 氮化铝缓冲层可以掺杂也可 以不掺;
b) 在所述的铟镓铝氮半导体层 (22— 26) 表面依次形成光反射层 (27) 和粘接金属叠层 (28);
c)把一个导电的粘接衬底(31 )的主面与所述粘接金属叠层(28)粘接; d) 把所述的硅 (111 ) 生长衬底 (21 ) 以及氮化铝缓冲层 (22 )、 未掺杂 的氮化镓层 (23) 完全或局部去除以暴露 N型铟镓铝氮层;
e) 在所述 N型铟镓铝氮层 (24) 表面和所述的粘接衬底 (31 ) 背面上分 别形成一个欧姆电极 (Cl、 C2)。
7、如权利要求 6所述的方法, 其特征在于: 在所述的硅(111 )衬底(21 ) 上形成铟镓铝氮半导体层 (22-26)之前先在其生长表面形成沟槽和台面组成 的图形结构。
8、 如权利要求 6或 7所述的方法, 其特征在于: 在与铟镓铝氮薄膜上的 粘接金属叠层粘接前, 所述粘接衬底 (31 ) 主面上先形成一欧姆接触层 (32) 和一金属粘接层 (33)。
9、 如权利要求 6或 7所述的方法, 其特征在于: 去除所述硅(111)生长 衬底 (21 ) 的方法为用硝酸、 氢氟酸和醋酸的混合溶液腐蚀; 去除所述氮化铝 缓冲层 (22)、 未掺杂的氮化镓层 (23 ) 的方法可以是反应离子刻蚀、 ICP 刻 蚀等干法刻蚀方法, 也可以用浓磷酸或强碱腐蚀。
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CN100372137C (zh) 2008-02-27
US8384100B2 (en) 2013-02-26
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