WO2006087955A1 - 熱処理板の温度設定方法,熱処理板の温度設定装置,プログラム及びプログラムを記録したコンピュータ読み取り可能な記録媒体 - Google Patents
熱処理板の温度設定方法,熱処理板の温度設定装置,プログラム及びプログラムを記録したコンピュータ読み取り可能な記録媒体 Download PDFInfo
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- WO2006087955A1 WO2006087955A1 PCT/JP2006/302160 JP2006302160W WO2006087955A1 WO 2006087955 A1 WO2006087955 A1 WO 2006087955A1 JP 2006302160 W JP2006302160 W JP 2006302160W WO 2006087955 A1 WO2006087955 A1 WO 2006087955A1
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- temperature
- line width
- heat treatment
- correction value
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67248—Temperature monitoring
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67098—Apparatus for thermal treatment
- H01L21/67109—Apparatus for thermal treatment mainly by convection
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/26—Processing photosensitive materials; Apparatus therefor
- G03F7/38—Treatment before imagewise removal, e.g. prebaking
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67098—Apparatus for thermal treatment
- H01L21/67103—Apparatus for thermal treatment mainly by conduction
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
- H01L21/67161—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers
- H01L21/67178—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers vertical arrangement
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
- H01L21/67184—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the presence of more than one transfer chamber
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67739—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber
- H01L21/67748—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber horizontal transfer of a single workpiece
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
Definitions
- Heat treatment plate temperature setting method heat treatment plate temperature setting device, program, and computer-readable recording medium recording the program
- the present invention relates to a temperature setting method for a heat treatment plate, a temperature setting device for a heat treatment plate, a program, and a computer-readable recording medium on which the program is recorded.
- a resist coating process for applying a resist solution on a wafer to form a resist film for example, an exposure process for exposing the resist film to a predetermined pattern, Heat treatment (post-exposure baking) that promotes the chemical reaction, development processing that develops the exposed resist film, etc., are sequentially performed to form a predetermined resist pattern on the wafer.
- Heat treatment post-exposure baking
- Heat treatment such as the above-described post exposure baking is usually performed by a heat treatment apparatus.
- the heat treatment equipment is equipped with a hot plate to place and heat the wafer.
- a heater that generates heat by power supply is built into the hot plate, and the hot plate is adjusted to a predetermined temperature by the heat generated by the heater.
- the heat treatment temperature in the above heat treatment greatly affects the line width of the resist pattern finally formed on the wafer. Therefore, in order to strictly control the temperature in the wafer surface during heating, the heat plate of the above-described heat treatment apparatus is divided into a plurality of regions, and an independent heater is built in each region. The temperature is adjusted.
- Patent Document 1 Japanese Patent Laid-Open No. 2001-143850
- the present invention has been made in view of the points to be applied, and the temperature setting of a heat treatment plate such as a hot plate is set so that the line width of the resist pattern is uniformly formed in a substrate surface such as a wafer. Its purpose is to do.
- the present invention for achieving the above object is a method for setting a temperature of a heat treatment plate on which a substrate is mounted and heat-treated, and the heat treatment is performed in a photolithography process for forming a resist pattern on the substrate.
- the heat treatment plate is divided into a plurality of regions, the temperature is set for each region, and the temperature for adjusting the in-plane temperature of the substrate on the heat treatment plate for each region of the heat treatment plate.
- a correction value is set.
- the temperature correction value of each region is calculated and set by a calculation model created for the correlation between the line width of the resist pattern formed by heat treatment on the heat treatment plate and the temperature correction value.
- the calculation model calculates a temperature correction value that makes the line width in the substrate surface uniform based on the measured line width value of the resist pattern in the substrate surface.
- the temperature correction value of each region of the heat-treated plate is correlated with the line width of the resist pattern and the temperature correction value. Is calculated and set to be uniform. As a result, the resist pattern formed through heat treatment on the heat-treated plate is uniformly formed on the substrate surface.
- the inclination component in the X direction and the inclination component in the Y direction are obtained by a least square method from a plurality of line width measurement values in the substrate surface, and the curve component is an inclination of the line width measurement value in the substrate surface. Alternatively, it may be obtained by removing the X-direction tilt component and the Y-direction tilt component from the direction.
- the calculation model is separated into one model component determined by the resist solution and another model component determined by other processing conditions other than the resist solution! But ⁇ ⁇ .
- ⁇ the degree of change of the resist solution.
- the other model component may be further separated into a first model component determined by exposure processing conditions in a photolithography process and a second model component determined by processing conditions other than the exposure processing conditions. ,.
- the temperature correction value of each region may be set for each processing recipe determined by a combination of at least the heat treatment temperature and the type of resist solution. In such a case, if either the heat treatment temperature or the type of resist solution that affects the line width of the resist pattern is changed, the temperature correction value for each region is changed. As a result, the heat treatment is always performed at an appropriate in-plane temperature, so that the line width of the finally formed resist pattern is uniformly formed in the substrate surface.
- the heat treatment may be a heat treatment performed after the exposure process and before the development process.
- the present invention according to another aspect is a temperature setting device for a heat treatment plate on which a substrate is placed and heat treated, wherein the heat treatment is performed in a photolithography process for forming a resist pattern on the substrate.
- the heat treatment plate is divided into a plurality of regions, the temperature is set for each region, and a temperature correction value for adjusting the in-plane temperature of the substrate on the heat treatment plate is set for each region of the heat treatment plate. Is set.
- the temperature correction value of each region is calculated and set by a calculation model created by the correlation force between the line width of the resist pattern formed by heat treatment on the heat treatment plate and the temperature correction value.
- the calculation model can calculate the temperature correction value so that the line width in the substrate surface is uniform based on the measured line width of the resist pattern.
- the temperature correction value of each region of the heat-treated plate is correlated with the line width of the resist pattern and the temperature correction value. Is calculated and set to be uniform. As a result, the resist pattern formed through heat treatment on the heat-treated plate is uniformly formed on the substrate surface.
- the tilt component in the X direction and the tilt component in the Y direction are obtained by a least square method from a plurality of line width measurement values in the substrate surface, and the curve component is an inclination of the line width measurement value in the substrate surface. It may be obtained by removing the slope component in the X direction and the slope component in the Y direction from the direction.
- the calculation model is separated into one model component determined by the resist solution and another model component determined by other processing conditions other than the resist solution! .
- the other model component may be further separated into a first model component determined by exposure processing conditions in a photolithography process and a second model component determined by processing conditions other than the exposure processing conditions. ,.
- the temperature correction value of each region may be set for each processing recipe determined by a combination of at least the heat treatment temperature and the type of resist solution.
- the heat treatment may be a heat treatment performed after the exposure process and before the development process.
- the present invention provides a program used for a temperature setting device for performing heat treatment of a substrate in a photolithography process for forming a resist pattern using a heat treatment plate.
- the heat treatment plate is divided into a plurality of regions, and the temperature can be set for each region. Further, in order to adjust the in-plane temperature of the substrate on the heat treatment plate for each region of the heat treatment plate, The temperature correction value is set.
- the program calculates the temperature correction value of each region by a calculation model created based on the correlation between the line width of the resist pattern formed by heat treatment on the heat treatment plate and the temperature correction value. To be executed.
- the calculation model is a resist Based on the measured line width of Noturn, the temperature correction value can be calculated so that the line width in the substrate surface is uniform.
- Such a program of the present invention is recorded on, for example, a computer-readable recording medium such as a node disk, a compact disk, a magneto-optical disk, a floppy disk, and the like.
- FIG. 1 is a plan view schematically showing the configuration of a coating and developing treatment system.
- FIG. 2 is a front view of the coating and developing treatment system of FIG. 1.
- FIG. 3 is a rear view of the coating and developing treatment system of FIG. 1.
- FIG. 4 is an explanatory diagram showing measurement points of the line width in the wafer surface.
- FIG. 5 is an explanatory view of a longitudinal section showing an outline of the configuration of the PEB apparatus.
- FIG. 6 is an explanatory diagram of a transverse section showing an outline of the configuration of the PEB device.
- FIG. 7 is a plan view showing a configuration of a hot plate of the PEB apparatus.
- FIG. 8 is a block diagram showing a configuration of a temperature setting device.
- FIG. 9 is a relational expression between the line width fluctuation amount and the temperature correction value using the calculation model.
- FIG. 10 is a determinant showing an example of a calculation model.
- FIG. 11 is a flowchart showing a temperature setting process.
- FIG. 12 An example in which the measured line width of each wafer region is substituted into the relational expression in FIG.
- FIG. 13 is a diagram showing a variation tendency of line width measurement values.
- FIG. 14 is a diagram showing an inclination component in the X direction of a variation tendency of a line width measurement value.
- FIG. 15 is a diagram showing a Y-direction gradient component of a variation tendency of line width measurement values.
- FIG. 16 is a diagram showing a curved component of a variation tendency of line width measurement values.
- FIG. 17 is a table showing a temperature correction table when a calculation model and a temperature correction value are set for each processing recipe.
- FIG. 19 is a relational expression between the line width fluctuation amount and the temperature correction value when model components other than the resist solution are further divided into model components related to exposure processing and other model components.
- FIG. 20 is an enlarged view of the measurement points of line width.
- FIG. 21 A theoretical formula for calculating the measurement error.
- FIG. 1 is a plan view showing a schematic configuration of a coating and developing treatment system 1 provided with a temperature setting device for a heat treatment plate according to the present embodiment.
- FIG. 2 is a front view of the coating and developing treatment system 1. Yes, Fig. 3 is a rear view of the coating development system 1.
- the coating and developing treatment system 1 carries, for example, 25 wafers W in a cassette unit into and out of the external force coating and developing treatment system 1, and the wafer W with respect to the cassette C.
- a cassette station 2 that carries in and out the process, a processing station 3 in which a plurality of various processing devices that perform predetermined processing in a single-stage manner in the photolithography process are arranged in multiple stages, and a processing station 3 that is adjacent to the processing station 3.
- an interface unit 4 for transferring Ueno and W to and from an exposure apparatus (not shown) provided as a unit.
- the cassette station 2 is provided with a cassette mounting table 5, and the cassette mounting table 5 Multiple cassettes U can be placed in a row in the X direction (vertical direction in Fig. 1).
- the cassette station 2 is provided with a wafer transfer body 7 that can move on the transfer path 6 in the X direction.
- the wafer carrier 7 is also movable in the wafer arrangement direction (Z direction; vertical direction) of the wafer W accommodated in the cassette U, and is connected to the wafers and W in each cassette U arranged in the X direction. Can be selectively accessed.
- the wafer transfer body 7 is rotatable in the ⁇ direction around the Z axis, and also with respect to a temperature control device 60 and a transition device 61 belonging to a third processing device group G3 on the processing station 3 side described later. Accessible.
- the processing station 3 adjacent to the cassette station 2 includes, for example, five processing device groups G1 to G5 in which a plurality of processing devices are arranged in multiple stages.
- cassette station 2 side force first processing device group G1 and second processing device group G2 are arranged in sequence.
- the cassette station 2 side force 3rd processing device group G3, 4th processing device group G4 and 5th processing device group G5 are in order.
- a first transfer device 10 is provided between the third processing device group G3 and the fourth processing device group G4.
- the first transfer device 10 can selectively access the processing devices in the first processing device group G1, the third processing device group G3, and the fourth processing device group G4 to transfer the wafer W.
- a second transfer device 11 is provided between the fourth processing device group G4 and the fifth processing device group G5. The second transfer device 11 can selectively access the processing devices in the second processing device group G2, the fourth processing device group G4, and the fifth processing device group G5 to transfer the wafer W.
- a liquid processing unit that supplies a predetermined liquid to the wafer W and performs processing for example, a resist coating unit 20 that applies a resist solution to the wafer W.
- a resist coating unit 20 that applies a resist solution to the wafer W.
- 21, 22, Bottom coating devices 23, 24 that form an antireflection film that prevents reflection of light during the exposure process are also stacked in five steps in order.
- liquid processing units, for example, development processing units 30 to 34 for supplying a developing solution to the wafer W and performing development processing are also stacked in five stages in order.
- the third processing unit group G3 includes a temperature control device 60, a transition device 61 for transferring the wafer W, and the temperature of the wafer W under high-precision temperature control.
- the high-precision temperature control devices 62 to 64 to adjust and the high-temperature heat processing devices 65 to 68 to heat-treat the wafer W at high temperature are also stacked in 9 steps in order.
- a high-precision temperature control unit 70 pre-baking units 71 to 74 for heating the wafer W after the resist coating process, and the wafer W after the development process are heated.
- Post-baking devices 75 to 79 to be processed are stacked in 10 steps in order of the lower force.
- a plurality of heat treatment apparatuses for heat-treating the wafer W such as high-precision temperature control apparatuses 80 to 83, and a plurality of post-exposure baking apparatuses (for processing the wafer W after exposure) ( The following is referred to as “PEB device.”) 84 to 89 are piled up in 10 steps in descending order.
- a plurality of processing devices are arranged on the positive side in the X direction of the first transfer device 10, for example, to hydrophobize the wafer W as shown in FIG.
- Adhesion devices 90 and 91, and heating devices 92 and 93 that heat the wafer W are stacked in four steps in descending order.
- a peripheral exposure device 94 that selectively exposes only the edge portion of the wafer W, for example, is disposed on the positive side in the X direction of the second transfer device 11.
- a wafer transfer body 101 that moves on a transfer path 100 extending in the X direction and a buffer cassette 102 are provided.
- the wafer transport body 101 can move in the Z direction and can also rotate in the ⁇ direction.
- the wafer transport body 101 is connected to an exposure apparatus (not shown) adjacent to the interface unit 4, the notch cassette 102, and the fifth processing unit group G5.
- the wafer W can be transferred by accessing it.
- the cassette station 2 is provided with a line width measuring device 110 that measures the line width of the resist pattern on the wafer W.
- the line width measuring device 110 can measure the line width of the resist pattern in the wafer surface by, for example, irradiating the wafer W with an electron beam and acquiring an image of the surface of the wafer W.
- the line width measuring device 110 can measure line widths at a plurality of locations on the wafer W plane.
- the line width measuring apparatus 110 has a wafer area W that is divided into a plurality of areas.
- the line width can be measured at multiple measurement points Q from 1 to W. This 5
- the wafer regions W to W are the hot plate regions R to R of the hot plate 140 of the PEB apparatus 84 described later. It corresponds to.
- the wafer carrier 7 takes out the unprocessed wafer W from the cassette U force on the cassette mounting table 5, and controls the temperature control device of the third processing device group G3. Transported to 60.
- the wafer W transferred to the temperature control device 60 is adjusted to a predetermined temperature, and then transferred to the bottom coating device 23 by the first transfer device 10 to form an antireflection film.
- the wafer W on which the antireflection film is formed is sequentially transferred to the heating device 92, the high-temperature heat treatment device 65, and the high-precision temperature control device 70 by the first transfer device 10, and is subjected to predetermined processing in each device. .
- the wafer W is transferred to the resist coating device 20, and after a resist film is formed on the wafer W, the wafer W is transferred to the pre-baking device 71 by the first transfer device 10, and then the second transfer device. 11 is sequentially conveyed to the peripheral exposure device 94 and the high-precision temperature control device 83, and predetermined processing is performed in each device. Thereafter, UENO and W are transported to the exposure apparatus and exposed by the wafer carrier 101 of the interface unit 4! The wafer W after the exposure processing is transferred to the PEB device 84, for example, by the wafer transfer body 101, subjected to post-exposure baking, and then transferred to the high-precision temperature controller 81 by the second transfer device 11. The temperature is adjusted.
- the resist film is transferred to the developing device 30 and the resist film on the wafer W is developed.
- the wafer W is transferred to the post-baking device 75 by the second transfer device 11 and subjected to heat treatment, and then transferred to the high-precision temperature controller 63 to adjust the temperature.
- the wafer W is transferred to the transition device 61 by the first transfer device 10 and returned to the cassette U by the wafer transfer body 7 to complete a series of photolithography steps.
- the PEB device 84 includes a heating unit 121 that heats the wafer W and a cooling unit 122 that cools the wafer W.
- the heating unit 121 includes a lid 130 that is located on the upper side and is movable up and down, and a hot plate that forms the processing chamber S together with the lid 130 located on the lower side. With containment 131!
- the lid 130 has a substantially conical shape that gradually increases toward the center, and an exhaust portion 130a is provided at the top.
- the atmosphere in the processing chamber S is uniformly exhausted from the exhaust part 130a.
- a hot plate as a heat treatment plate for placing and heating the wafer W is mounted in the center of the hot plate accommodating part 131.
- the hot plate 140 has a substantially disk shape with a large thickness.
- a plurality of, for example, five hot plate regions R 1, R 2, R 3, R 4, and R 5 are used.
- the hot plate 140 is divided into, for example, a circular hot plate region R and a hot plate region R to R that are circularly divided into four circular arcs around the center of the plate.
- a heater 141 that generates heat by power feeding is individually incorporated.
- the quantity is adjusted by the temperature controller 142.
- the temperature controller 142 adjusts the amount of heat generated by the heater 141 so that each of the hot plate regions R to R
- the temperature of 15 can be controlled to a predetermined set temperature.
- the temperature setting in the temperature control device 142 is performed by, for example, a temperature setting device 190 described later.
- first raising / lowering pins 150 for raising and lowering the wafer W while supporting the downward force.
- the first elevating pin 150 can be moved up and down by the elevating drive mechanism 151.
- a through hole 152 that penetrates the hot plate 140 in the thickness direction is formed.
- the first elevating pin 150 is able to protrude upward from the hot plate 140 by passing through the through-hole 152 by increasing the downward force of the hot plate 140.
- the hot plate housing part 131 includes an annular holding member 160 that houses the hot plate 140 and holds the outer periphery of the hot plate 140, and a substantially cylindrical support ring 161 that surrounds the outer periphery of the holding member 160. Have. On the upper surface of the support ring 161, for example, an outlet 161a for injecting an inert gas into the processing chamber S is formed. The inside of the processing chamber S can be purged by injecting an inert gas from the outlet 161a. In addition, a cylindrical case 162 serving as an outer periphery of the hot plate accommodating portion 131 is provided outside the support ring 161.
- a cooling plate 170 for mounting and cooling the wafer W is provided in the cooling unit 122 adjacent to the heating unit 121.
- the cooling plate 170 has, for example, a substantially rectangular flat plate shape as shown in FIG. 6, and the end surface on the heating unit 121 side is curved in an arc shape.
- a cooling member 170a such as a Peltier element is built in the cooling plate 170, and the cooling plate 170 can be adjusted to a predetermined set temperature.
- the cooling plate 170 is attached to a rail 171 extending toward the heating unit 121 side. .
- the cooling plate 170 can be moved on the rail 171 by the driving unit 172.
- the cooling plate 170 can move to above the heating plate 140 on the heating unit 121 side.
- the cooling plate 170 for example, two slits 173 along the X direction are formed as shown in FIG.
- the slit 173 is formed so that the end surface force on the heating unit 121 side of the cooling plate 170 is also close to the center of the cooling plate 170.
- the slit 173 prevents interference between the cooling plate 170 moved to the heating unit 121 side and the first lifting pins 150 protruding on the heating plate 140.
- a second lifting pin 174 is provided below the slit 173 in the cooling section 122.
- the second raising / lowering pin 174 can be raised and lowered by the raising / lowering drive unit 175.
- the second elevating pin 174 can also protrude downward from the cooling plate 170 through the slit 173 as the downward force of the cooling plate 170 rises.
- loading / unloading ports 180 for loading / unloading the wafer W are formed on both side surfaces of the casing 120 with the cooling plate 170 interposed therebetween.
- the wafer W is loaded from the loading / unloading port 180 and placed on the cooling plate 170. Subsequently, the cooling plate 170 is moved, and the wafer W is moved above the hot plate 140. The first lifting pins 150 place the wafer W on the hot plate 140 and heat the wafer W. After a predetermined time, the wafer W is again transferred from the hot plate 140 to the cooling plate 170 and cooled, and is transferred from the cooling plate 170 through the loading / unloading port 180 to the outside of the PEB apparatus 84 to undergo a series of heat treatments. finish.
- the temperature setting device 190 is composed of, for example, a general-purpose computer equipped with a CPU, a memory, and the like, and is connected to the temperature control device 142 of the hot plate 140, for example, as shown in FIGS.
- the temperature setting device 190 for example, as shown in FIG. 8, an arithmetic unit 200 for executing various programs, an input unit 201 for inputting various information for temperature setting, for example, and a temperature correction value are calculated.
- a communication unit 204 for communication is provided.
- the program storage unit 202 stores, for example, a calculation model M.
- Calculation Model M is a correlation model expressed by the relational expression (1) between the resist pattern line width change ⁇ CD and temperature correction value ⁇ ⁇ , as shown in Fig. 9, for example.
- the calculation model M is based on the measured line width of the resist pattern formed in the coating and developing treatment system 1, and the optimum temperature correction value ⁇ for each hot plate region R to R, that is, the line width of the resist pattern. Is finally
- a temperature correction value ⁇ T that is uniform in the wafer plane can be calculated.
- the calculation model M is, for example, the determinant shown in FIG.
- the line width variation of the wafer area w to w is measured for all combinations, for example.
- a program PI for calculating the temperature correction value ⁇ of each of the hot plate regions R to R using the relational expression (1) of the calculation model M is calculated.
- the program P2 that changes the existing temperature setting of the temperature controller 142 based on the temperature correction value ⁇ ⁇ is stored.
- the various programs for realizing the functions of the temperature setting device 190 may be installed in the temperature setting device 190 using a computer-readable recording medium.
- Figure 11 shows the flow of the temperature setting process.
- the wafer W on which a series of photolithography steps have been performed in the coating and developing treatment system 1 is transferred to the line width measuring device 110, and the line width of the resist pattern on the wafer W is measured (step of FIG. 11). Sl). At this time, the line widths of a plurality of measurement points Q on the wafer surface are measured, and the line widths of the wafer regions W to W corresponding to the hot plate regions R to R of the hot plate 140 are obtained.
- the result of the line width measurement in the line width measuring device 110 is output to the temperature setting device 190.
- the temperature setting device 190 for example, based on the measured line width of each wafer region W to W.
- the optimum temperature correction value ⁇ is calculated by the calculation model M (step S2 in FIG. 11).
- the line width change ⁇ CD in the relational expression (1) is added to the average line width E, which is the target line width, and the measured line width values CD, CD, CD, Substitute the difference between CD and CD
- the line width measurement device 110 obtains line width measurement values at a plurality of measurement points Q in the wafer surface.
- the variation tendency of the line width measurement value CD within the wafer surface is shown, as shown in Fig. 13.
- the temperature correction value ⁇ in the above embodiment is obtained by obtaining the X-direction tilt component, Y-direction tilt component and curvature component in the wafer plane of the variation tendency of the line width measurement value in the wafer plane. It may be set so that each variation tendency component decreases.
- the X axis passes through the wafer areas W, W, W on the diameter of the wafer W
- the Y axis passes through the wafer area on the diameter of the wafer W.
- the inclination component in the X direction, the inclination component in the Y direction, and the bending component are calculated from the variation tendency of the line width measurement values measured by the line width measurement device 110.
- the slope component Fx in the X direction is calculated from the distribution of the measured line width projected on the vertical plane including the X axis using the least squares method.
- the tilt component Fy in the Y direction is calculated from the distribution of the measured line width projected on the vertical plane including the Y axis using the least squares method.
- the convex curve component Fz as shown in Fig. 16 can be obtained by removing the tilt component Fx in the X direction and the tilt component Fy in the Y direction from the overall variation tendency of the line width measurement values.
- a temperature correction value ⁇ is calculated so that each of the variation tendency components Fx, Fy, Fz is eliminated. For example, a line in the wafer area W shown in FIG.
- the width change ⁇ CD and the line width change ⁇ CD of the wafer area W are calculated. Y Then, the line width change ⁇ CD of the wafer area W is calculated. Furthermore, from the bending component Fz,
- ACD ACD + ACD
- ACD ACD + ACD
- ⁇ C ⁇ ⁇
- the temperature correction value ⁇ is calculated by model M. As a result, each line width change amount ACD to ⁇ CD becomes zero and each variation inclination component Fx, Fy, Fz becomes zero.
- a temperature correction value ⁇ that eliminates variations in line width in the wafer surface is calculated.
- the process of calculating the temperature correction value ⁇ is realized, for example, by executing a program stored in the program storage unit 203 of the temperature setting device 190.
- the line width measurement values measured at a number of measurement points on the wafer surface are divided into three variation tendency components Fx, Fy, Fz, and the variation tendency components Fx, Fy, Based on Fz, the temperature correction value ⁇ is calculated so that the variation tendency components Fx, Fy, and Fz are eliminated. In this way, the temperature correction value ⁇ can be obtained more easily.
- the calculated temperature correction values ⁇ of the respective hot plate regions R to R in the above embodiment are:
- Temperature compensation value is calculated and set.
- the resist solution is changed and the processing recipe is changed. Even if is changed, the wafer w is heat-treated at the optimum in-plane temperature according to the processing recipe, so that the uniformity of the resist pattern line width within the wafer surface can be ensured.
- the calculation model M described in the above embodiment includes a model component ⁇ that is affected by the resist solution and a model component Mt that is affected by other processing conditions other than the resist solution, as shown in FIG. Even if you want to separate it.
- the processing conditions other than the resist solution include those that affect the line width, such as the processing temperature, processing time, and processing apparatus status.
- the processing conditions other than the resist solution include those that affect the line width, such as the processing temperature, processing time, and processing apparatus status.
- the processing conditions other than the resist solution are changed, it is sufficient to change only the model component (X only) of the calculation model M.
- the processing conditions other than the resist solution are changed, it is only necessary to change the model component Mt of the calculation model M. In this way, it is possible to respond flexibly and quickly to changes in the resist solution and changes in the processing temperature. it can.
- the model component Mt is separated into a model component Mtl that is affected by exposure processing conditions in the photolithography process and a model component Mt2 that is affected by processing conditions other than the exposure processing conditions. It may be.
- the exposure processing conditions here affect the line width such as the exposure amount (dose amount, focus amount) and the state of the exposure apparatus. Processing conditions other than the exposure processing conditions include, for example, heating in a PEB apparatus. It affects the line width, such as the processing heating time, heating temperature, and PEB equipment status. In this case, for example, if a problem occurs in the exposure system, the problem can be dealt with by changing only the model component Mtl.
- the results of the line width measurement of the wafer W performed by the above-described line width measuring apparatus 110 include the measurement error caused by the measurement accuracy of the line width measuring apparatus 110 and the processing apparatus during processing of the wafer. May include process errors caused by slight variations in process conditions.
- the calculation model M described in the above embodiment is created based on the correlation between the line width fluctuation amount of each wafer region measured in advance and the temperature correction value. Measurement error and process error may be taken into account.
- a single wafer W on which a resist pattern is formed is measured a plurality of times by the line width measuring device 110, and the dispersion of the measured value, for example, the standard deviation is obtained, and this standard deviation is calculated by applying a Kalman filter to each element of the calculation model M. Use to reflect. As a result, the measurement error is considered in advance.
- a calculation model M can be created.
- the line width measuring device 110 measures a plurality of wafers and Ws each having a resist pattern formed in a sheet format by the same processing recipe, and obtains a variation of the measured value, for example, a standard deviation. This standard deviation is reflected in each element of the calculation model M using a Kalman filter. This makes it possible to create a calculation model M that takes process errors into account.
- the line width measuring device 110 is an electron beam type (CD-SEM)
- CD-SEM electron beam type
- the line width measuring device 110 may be detected by measuring the line width of one wafer W. For example, as shown in FIG. 20, the line width measuring device 110 divides a minute area at a measurement point Q in the wafer plane into a plurality of parts, detects the line width of each divided part, and calculates an average value thereof. Thus, the line width at measurement point Q is measured.
- the measurement accuracy d may be calculated by the theoretical formula (2) obtained from the general formula for determining the sample size in Fig. 21.
- ⁇ is the number of divisions.
- This calculated measurement accuracy d is reflected in the calculation model M.
- the measurement error can be detected by a single line width measurement, so that an accurate measurement error can be detected even when an electronic beam is used.
- measurement errors can be detected easily and quickly.
- the orientation of the wafer W when placed on the hot plate 140 that is, the notch position of the wafer W must be constant. This is because if the orientation of the wafer W on the hot plate 40 is deviated, the hot plate region corresponding to the wafer region of the measurement line width cannot be specified.
- the alignment at the notch position of the wafer w is performed during the exposure process in the photolithography process in the coating and developing system 1. However, there is a possibility that the notch position of the wafer W may be shifted between the exposure process and post exposure baking. In the meantime, during that time, UENO and W are transported to a device having an alignment function, for example, the peripheral exposure device 94, and again aligned. Force may also be carried into the PEB equipment.
- a CCD camera as a detection member that detects the notch position of the wafer W may be attached to the PEB device, and the deviation of the notch position of the wafer W may be detected when it is transferred into the wafer W force PEB device.
- the notch position of the wafer W is shifted, the shift of the notch position is reflected in the calculation model M, for example, and each hot plate region R corresponding to the position of the line width measurement is reflected.
- the present invention is not limited to this example and can take various forms.
- the temperature-set hot plate 140 is divided into five regions, but the number can be arbitrarily selected.
- the above embodiment is an example of setting the temperature of the hot plate 140 of the PEB device 84, but other heat treatment devices such as a pre-baking device and a post-baking device equipped with a hot plate,
- the present invention can also be applied to a cooling processing apparatus having a cooling plate on which the wafer W is placed and cooled.
- the present invention can also be applied to the temperature setting of a heat treatment plate for heat treatment of other substrates such as FPD (Flat Panel Display) and photomask mask reticles other than wafers.
- FPD Full Panel Display
- the present invention is useful when setting the temperature of the heat treatment plate so that the line width of the resist pattern is uniformly formed in the substrate surface.
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Photosensitive Polymer And Photoresist Processing (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Control Of Resistance Heating (AREA)
- Resistance Heating (AREA)
Abstract
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP06713303A EP1850372A4 (en) | 2005-02-15 | 2006-02-08 | TEMPERATURE ADJUSTMENT METHOD FOR A HEAT TREATMENT PLATE, TEMPERATURE SETTING DEVICE FOR A HEAT TREATMENT PLATE, PROGRAM, AND A COMPUTER READABLE RECORDING MEDIUM RECORDING THE PROGRAM |
US11/816,191 US7902485B2 (en) | 2005-02-15 | 2006-02-08 | Temperature setting method of thermal processing plate, temperature setting apparatus of thermal processing plate, program, and computer-readable recording medium recording program thereon |
KR1020117015615A KR101087932B1 (ko) | 2005-02-15 | 2006-02-08 | 열처리판의 온도 설정 방법 및 열처리판의 온도 설정 장치 |
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JP2005037955A JP4509820B2 (ja) | 2005-02-15 | 2005-02-15 | 熱処理板の温度設定方法,熱処理板の温度設定装置,プログラム及びプログラムを記録したコンピュータ読み取り可能な記録媒体 |
JP2005-037955 | 2005-02-15 |
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PCT/JP2006/302160 WO2006087955A1 (ja) | 2005-02-15 | 2006-02-08 | 熱処理板の温度設定方法,熱処理板の温度設定装置,プログラム及びプログラムを記録したコンピュータ読み取り可能な記録媒体 |
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US (1) | US7902485B2 (ja) |
EP (1) | EP1850372A4 (ja) |
JP (1) | JP4509820B2 (ja) |
KR (2) | KR101068596B1 (ja) |
CN (1) | CN100550300C (ja) |
TW (1) | TW200636806A (ja) |
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US20090008381A1 (en) | 2009-01-08 |
KR101068596B1 (ko) | 2011-09-30 |
TW200636806A (en) | 2006-10-16 |
US7902485B2 (en) | 2011-03-08 |
JP4509820B2 (ja) | 2010-07-21 |
JP2006228816A (ja) | 2006-08-31 |
CN101120434A (zh) | 2008-02-06 |
KR20110094119A (ko) | 2011-08-19 |
CN100550300C (zh) | 2009-10-14 |
TWI309061B (ja) | 2009-04-21 |
KR20070107042A (ko) | 2007-11-06 |
EP1850372A4 (en) | 2010-10-13 |
KR101087932B1 (ko) | 2011-11-28 |
EP1850372A1 (en) | 2007-10-31 |
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