WO2003103163A1 - 歪補償装置 - Google Patents
歪補償装置 Download PDFInfo
- Publication number
- WO2003103163A1 WO2003103163A1 PCT/JP2002/005323 JP0205323W WO03103163A1 WO 2003103163 A1 WO2003103163 A1 WO 2003103163A1 JP 0205323 W JP0205323 W JP 0205323W WO 03103163 A1 WO03103163 A1 WO 03103163A1
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- WIPO (PCT)
- Prior art keywords
- distortion compensation
- compensation coefficient
- signal
- distortion
- phase difference
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
- H03F1/3247—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits using feedback acting on predistortion circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2201/00—Indexing scheme relating to details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements covered by H03F1/00
- H03F2201/32—Indexing scheme relating to modifications of amplifiers to reduce non-linear distortion
- H03F2201/3231—Adaptive predistortion using phase feedback from the output of the main amplifier
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2201/00—Indexing scheme relating to details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements covered by H03F1/00
- H03F2201/32—Indexing scheme relating to modifications of amplifiers to reduce non-linear distortion
- H03F2201/3233—Adaptive predistortion using lookup table, e.g. memory, RAM, ROM, LUT, to generate the predistortion
Definitions
- the present invention relates to a distortion compensating apparatus, and in particular, receives a difference signal between a reference signal, which is a transmission signal, and a feedback signal, and calculates a distortion compensation coefficient by an adaptive algorithm so as to reduce the difference signal.
- FIG. 27 is a block diagram showing an example of a transmission device in a conventional wireless device.
- a transmission signal generator 1 sends out a serial digital data sequence, and a serial / parallel converter (S / P converter) 2 outputs a digital signal.
- the data sequence is alternately sorted by 1 bit and converted into two sequences of an in-phase component signal (I signal: In-phase component) and a quadrature component signal (Q signal: Quadrature component).
- the DA converter 3 converts each of the I signal and the Q signal into an analog baseband signal and inputs the analog baseband signal to the quadrature modulator 4.
- the quadrature modulator 4 multiplies the input I signal and Q signal (transmission baseband signal) by a reference carrier and a signal obtained by shifting the phase by 90 °, and adds the multiplication results to perform orthogonal transformation. Go and output.
- the frequency converter 5 mixes the quadrature modulated signal and the local oscillation signal to convert the frequency, and the transmission power amplifier 6 power amplifies the carrier output from the frequency converter 5 and radiates it from the antenna 7 to the air. .
- the transmission power of the transmitter is as large as 10 mW to several tens of watts, and the input / output characteristics (distortion function f (p)) of the transmission power amplifier 6 are shown by the dotted line in Fig. 28 (a). Thus, it becomes nonlinear. Non-linear distortion occurs due to this nonlinear characteristic, and the transmission frequency f.
- the peripheral frequency spectrum has side lobes as shown by the solid line in Fig. 28 (b). Lifting and leakage to adjacent channels, causing adjacent interference. That is, the power that the transmitted wave leaks to the adjacent frequency channel increases as shown in (b) due to the nonlinear distortion.
- the ACPR Adjacent Channel Power Ratio
- the ACPR is the power of the target channel, which is the area of the spectrum between the one-point perforated lines A and A 'in Fig. 28 (b), and the one-dot chain line A. , A ′ and the adjacent leakage power, which is the area of the spectrum that leaks into the adjacent channel between the two-dot chain lines B, B ′.
- Such leakage power becomes noise with respect to other channels and degrades the communication quality of that channel. Therefore, it is strictly specified.
- the leakage power is small in the linear region of the power amplifier (see Fig. 28 (a)) and large in the non-linear region. Therefore, it is necessary to widen the linear region in order to obtain a high-output transmission power amplifier.
- this requires an amplifier that is more than the capacity actually required, which is disadvantageous in cost and device size. For this reason, a wireless device having a distortion compensation function for compensating for distortion of the transmission power is employed.
- FIG. 29 is a block diagram of a transmitter having a digital nonlinear distortion compensation function using a DSP (Digital Signal Processor).
- the digital data group (transmission signal) transmitted from the transmission signal generator 1 is converted into two series of I signal and Q signal in the SZP converter 2 and input to the distortion compensator 8 composed of DSP.
- a distortion compensation coefficient calculator 8c is provided for comparing the demodulated signal (feedback signal) y (t) and calculating and updating the distortion compensation coefficient h (pi) so that the difference becomes zero.
- the signal subjected to the distortion processing in the distortion compensator 8 is input to the DA converter 3.
- the DA converter 3 converts the input I and Q signals into analog baseband signals and inputs the signals to the quadrature modulator 4.
- the quadrature modulator 4 multiplies the input I signal and Q signal by the reference carrier and a signal obtained by shifting the phase by 90 °, and adds the multiplication results to perform quadrature modulation and output the result.
- the frequency converter 5 mixes the quadrature modulated signal and the local oscillation signal to convert the frequency, and the transmission power amplifier 6
- the output carrier signal is amplified in power and radiated from the antenna (antenna) 7 into the air.
- a part of the transmission signal is input to the frequency converter 10 via the directional coupler 9, where it is frequency-converted and input to the quadrature detector 11.
- the quadrature detector 11 performs quadrature detection by multiplying the input signal by the reference carrier and a signal obtained by shifting the phase by 90 °, and reproduces the baseband I and Q signals on the transmitting side to convert the A / D converter 1 Enter 2
- the AD converter 12 converts the input I and Q signals into digital signals and inputs them to the distortion compensator 8.
- the distortion compensator 8 compares the transmission signal before distortion compensation with the feedback signal demodulated by the quadrature detector 11 by adaptive signal processing using the LMS (Least Mean Square) algorithm, and finds the difference.
- the distortion compensation coefficient h (pi) is calculated and updated so that it becomes zero. Thereafter, by repeating the above operation, the nonlinear distortion of the transmission power amplifier 6 is suppressed, and the adjacent channel leakage power is reduced.
- FIG. 30 is an explanatory diagram of the distortion compensation processing by the adaptive LMS.
- 15a is a multiplier (corresponding to the pre-distortion section 8 in Fig. 29) that multiplies the transmission signal x (t) by the distortion compensation coefficient h n -i (p), and 15b is the distortion function f (p).
- the computation unit (amplitude-power conversion unit) that performs the operation, 15 e is the distortion compensation coefficient storage unit that stores the distortion compensation coefficient corresponding to each power of the transmission signal x (t) (the distortion compensation coefficient storage unit 8 a in FIG. corresponding) der is, the distortion compensation coefficient coefficient distortion compensation corresponding to the power p hn-i p) to output the Rutotomoni, in determined by LMS Arugorizumu distortion compensation coefficient h n (p) of the transmission signal X (t) HN- Update l (p). '
- 15 f is a conjugate complex signal output unit
- 15 g is a subtractor that outputs the difference e (t) between the transmission signal X (t) and the feedback demodulation signal y (t)
- 15 h is e (t) and u * Multiplier to multiply (t)
- 15 i is a multiplier to multiply y * (t)
- 15 j is a multiplier to multiply step size parameter ⁇
- 15 k is Adder for adding ⁇ e (t) u * (t) and 15 m
- 15 n, and 15 p are delay units, and after the transmission signal x (t) is input, the feedback demodulation signal y ( The delay time D until t) is input to the subtractor 15 g is added to the input signal.
- u (t) is the distorted signal.
- the delay time D set in the delay units 15 m, 15 n, and 15 p is, for example, D as the delay time in the transmission power amplifier 15 b.
- h n (p) hn-i (p) + ⁇ e (t) u * (t)
- the distortion compensator performs feedback detection on the carrier obtained by orthogonally modulating the transmission signal, digitally converts the amplitude of the transmission signal and the amplitude of the feedback signal, and compares the amplitude of the feedback signal with the distortion compensation coefficient based on the comparison result. Is updated in real time. According to this nonlinear distortion compensation method, distortion can be reduced, and as a result, it is possible to suppress the leakage power even in operation in a high output and nonlinear region, and to improve the power load efficiency.
- an object of the present invention is to enable a good and stable distortion compensation operation even if the phase difference between a reference signal and a feedback signal fluctuates due to jitter or the like.
- a distortion compensation apparatus receives a difference signal between a reference signal, which is a transmission signal, and a feedback signal, and calculates a distortion compensation coefficient by an adaptive algorithm so as to reduce the difference signal.
- a phase difference detecting unit for detecting a phase difference of the phase difference, a phase correcting unit for correcting the phase difference, a phase correction period and a distortion compensation coefficient updating period are generated alternately, and the phase difference is corrected in the complementary period.
- a control unit for controlling the distortion compensation coefficient to be updated during the distortion compensation coefficient update period.
- the phase difference between the reference signal and the feedback signal is periodically corrected, and the distortion compensation coefficient is updated only during a period in which the phase difference is small, so that the distortion compensation coefficient is not affected by the phase difference.
- the coefficients can be quickly converged. As a result, even if the phase difference between the reference signal and the feedback signal fluctuates, a good and stable distortion compensation operation can be performed.
- the amplitude of the reference signal is 0 or smaller than the noise level, the phase difference cannot be detected correctly. Therefore, if the reference signal is equal to or less than the set value, the update of the distortion compensation coefficient is stopped. With this configuration, the distortion compensation coefficient is not updated to an incorrect value, so that when the reference signal becomes large, the distortion compensation control can be immediately performed using the correct distortion compensation coefficient.
- the distortion compensation coefficient update period is lengthened, and when the phase difference is large, the distortion compensation coefficient update period is shortened. In this way, if the phase difference is small, the update period can be extended, so that the distortion compensation coefficient can be quickly converged. If the phase difference is large, the distortion compensation coefficient update period Therefore, the distortion compensation coefficient can be updated only during a period in which the phase difference is reduced by the correction.
- the distortion compensation coefficient update period is based on the magnitude of the difference signal between the reference signal and the feed pack signal, or on the basis of the magnitude of the adjacent channel power, or on the basis of the convergence state of the distortion compensation coefficient. You can decide.
- an effect equivalent to controlling the distortion compensation coefficient update period by controlling the distortion compensation coefficient update time constant in the distortion compensation coefficient operation unit is provided.
- the update time constant is reduced, the distortion compensation coefficient update period is equivalently lengthened, and the phase difference between the reference signal and the feedback signal is large. Then, the update time constant is increased and the distortion compensation coefficient update period is equivalently shortened.
- FIG. 1 is a diagram illustrating the principle of the present invention.
- FIG. 2 is a configuration diagram of the distortion compensation device of the first embodiment.
- FIG. 3 is a configuration diagram of a phase difference detection unit in the phase adjustment circuit.
- FIG. 4 is an explanatory diagram of the phase difference calculation.
- FIG. 5 is a processing flowchart of the intermittent control of the first embodiment.
- FIG. 6 is a configuration diagram of the distortion compensating device of the second embodiment.
- FIG. 7 is a processing flow of the second embodiment.
- FIG. 8 shows a modification of the second embodiment.
- FIG. 9 is a processing flow of the modification.
- FIG. 10 is a configuration diagram of the distortion compensating apparatus of the third embodiment.
- FIG. 11 is a processing flow of the third embodiment.
- FIG. 12 is an explanatory diagram for calculating the total value of the phase differences or the average value of the phase differences.
- FIG. 13 is a diagram for explaining the variance calculation of the phase difference.
- FIG. 14 is a processing flow for monitoring the fluctuation of the phase difference and variably controlling the distortion compensation coefficient update period.
- FIG. 15 shows a modification of the third embodiment.
- FIG. 16 shows a processing flow of the modification.
- FIG. 17 is a configuration diagram of the distortion compensator of the fourth embodiment.
- FIG. 18 is a processing flow of the fourth embodiment.
- FIG. 19 shows a modification of the fourth embodiment.
- FIG. 20 is a configuration diagram of the distortion compensating apparatus of the fifth embodiment.
- Figure 21 is a block diagram of the ACPR measurement device.
- FIG. 22 is a processing flow of the fifth embodiment.
- FIG. 23 shows a modification of the fifth embodiment.
- FIG. 24 is a configuration diagram of the distortion compensator of the sixth embodiment.
- FIG. 25 is a processing flow of the sixth embodiment.
- FIG. 26 shows a modification of the sixth embodiment.
- FIG. 27 is a block diagram illustrating an example of a transmission device in a conventional wireless device.
- Figure 28 shows the input / output characteristics of the transmission power amplifier and the transmission frequency f. This is the peripheral frequency spectrum.
- FIG. 29 is a block diagram of a transmission device having a digital nonlinear distortion compensation function.
- FIG. 30 is an explanatory diagram of distortion compensation processing by adaptive LMS.
- FIG. 32 is an explanatory diagram of the phase difference between the feed pack signal and the reference signal.
- FIG. 1 is a diagram illustrating the principle of the present invention, and it is assumed that a phase difference ⁇ as indicated by A occurs between a reference signal and a feedback signal due to clock jitter.
- the phase difference ⁇ between the reference signal and the feed pack signal is simply detected and the phase difference is corrected, the phase correction cannot follow the high-speed phase fluctuation due to the jitter. Therefore, even if the phase correction is performed and the distortion compensation coefficient table is updated, the distortion compensation coefficient does not converge stably due to the influence of the phase difference ⁇ PP, and it is difficult to perform a good distortion compensation operation.
- a phase correction period ⁇ t and a distortion compensation coefficient update period ⁇ T are generated alternately, (2) a phase difference ⁇ between the reference signal and the feedback signal is corrected in the phase correction period ⁇ t, and (3) The distortion compensation coefficient is updated in the distortion compensation coefficient update period ⁇ T, and thereafter, the above operation is repeated.
- the phase difference ⁇ is measured II times during the phase correction period ⁇ t. Then, the phase is corrected based on the average phase difference.
- the distortion compensation coefficient update period ⁇ ⁇ ⁇ ⁇ in which the phase difference is reduced by the correction the distortion compensation coefficient is updated for each cook.
- the distortion compensation coefficient update period ⁇ T is considered to be sufficiently shorter than the phase fluctuation period.
- the present invention corrects the phase difference between the reference signal and the feed pack signal
- the distortion compensation coefficient is updated
- the operation of updating the distortion compensation coefficient is repeated. For this reason, in the present invention, only the influence of the phase difference of ⁇ ⁇ / ⁇ is exerted, and the distortion compensation coefficient can be quickly converged without being affected by the phase difference.
- the distortion compensation coefficient update period is determined based on the phase difference before the phase difference correction between the reference signal and the feedback signal. For example, when the phase difference between the reference signal and the feedback signal is small as indicated by B, the distortion compensation coefficient update period ⁇ is lengthened, and when the phase difference is large as indicated by C, the distortion compensation coefficient is increased. Shorten the update period ⁇ ⁇ . With this configuration, if the phase difference is small, the update period can be lengthened, so that the distortion compensation coefficient can be quickly converged. In addition, if the phase difference is large, the distortion compensation coefficient update period can be shortened. Therefore, the distortion compensation coefficient can be updated only during the period in which the phase difference is small due to the correction.
- FIG. 2 is a configuration diagram of the distortion compensation device of the first embodiment.
- 'A digital data group (transmission signal) transmitted from a transmission signal generator (not shown) is subjected to distortion compensation processing by a distortion compensator 51 and input to a DA converter 52.
- the DA converter 52 converts the digital transmission signal into an analog signal and inputs it to the power amplifier 53 directly or via a quadrature modulator and a frequency converter (not shown).
- the power amplifier 53 amplifies the input signal and radiates it from the antenna to space.
- the output signal of the power amplifier 53 is directly input to the AD converter 54 or via a frequency converter and a quadrature demodulator (not shown), and the AD converter 54 converts the input signal into a digital signal to be distorted. Input to compensator 51.
- a distortion compensation table (LUT) 61 responds to the power of the transmission signal X (t).
- the multiplication unit 62 multiplies the transmission signal by a distortion compensation coefficient h (n) corresponding to the power of the transmission signal to perform distortion compensation processing.
- the address generation unit 63 generates a read address AB corresponding to the power of the transmission signal X (t), reads out the distortion compensation coefficient h (n) corresponding to the power from the distortion compensation table 61, and multiplies it. Enter in 62. Further, the address generation unit 63 generates a write address Aw and writes the distortion compensation coefficient h (n + 1) calculated by the distortion compensation coefficient update unit 67 into the distortion compensation table 61 to update the same.
- the delay circuit 64 delays the input signal by the time from the input of the transmission signal x (t) to the input of the feedback signal y (t) to the subtractor 66, and outputs the reference signal x '(t). I do.
- the complex multiplier 65 corrects the phase of the feedback signal y (t) so that the phase difference between the reference signal X ′ (t) and the feedback signal output from the AD converter 54 becomes zero.
- the arithmetic unit 66 calculates a difference signal e (t) between the reference signal x ′ (t) and the phase-corrected feedback signal y ′ (t), and the distortion compensation coefficient updating unit 67 calculates the difference signal e (t).
- the distortion compensation coefficient h (n + l) is calculated by an adaptive algorithm so that the difference signal becomes smaller and the content of the distortion compensation table 61 is updated.
- the phase adjustment circuit 68 detects a phase difference ⁇ between the reference signal ⁇ ′ (t) and the feedback signal y ′ (t), and inputs the detected signal to the multiplier multiplier 65.
- the intermittent control unit 69 generates a phase correction period ⁇ t and a distortion compensation coefficient update period ⁇ alternately, and controls the phase correction processing and the distortion compensation coefficient update processing to be performed alternately.
- FIG. 3 is a configuration diagram of the phase difference detection unit in the phase adjustment circuit 68.
- the transmitted signal x (t) and the feedback signal y (t) are complex signals (see FIG. 31).
- the quadrant detector 68a detects the quadrant in which the transmission signal x (t) exists, the magnitude comparison unit 68b compares the magnitudes of the real part and the imaginary part, and the vector existence angle range determination unit 68c computes the transmission signal x (t). Based on the existence quadrant of t) and the result of the size comparison, it is determined which of the sections is divided into 450 sections (see Fig. 4). Similarly, the quadrant detector 68d detects the quadrant in which the feedback signal y (t) exists, and the magnitude comparator 68eb determines the magnitude of the real part and the imaginary part.
- the phase difference calculation unit 68g calculates a phase difference of 450 units based on the section where the transmission signal x (t) and the feedback signal y (t) exist. For example, the transmission signal X (t) is exist in compartments IA, if that fee Dopakku signal y (t) is present in the [pi Alpha, the phase difference is Ru 900 der.
- the average unit 68h calculates the average value of the phase difference calculated by the phase difference calculating section 68 g in the phase correction period, and sets the mean phase difference to the complex multiplier 65.
- the difference can be calculated more. If the phase difference is ⁇ , the phase is corrected by multiplying the feedback signal by exp (—jA ⁇ ).
- FIG. 5 is a processing flow of the intermittent control of the first embodiment.
- the intermittent controller 69 alternately generates a phase correction period ⁇ t and a distortion compensation coefficient update period ⁇ as shown in FIG. 1, and performs a phase correction process (step 101) and a distortion compensation coefficient update process (step 101).
- Step 102 is executed alternately. That is, during the positive period A t, the intermittent control unit 69 sets the phase adjustment ON / OFF signal PAS to high level and sets the enable signal ENS of the distortion compensation table (LUT) 61 to low level.
- the phase adjustment circuit 68 measures the phase difference ⁇ between the reference signal X ′ (t) and the feedback signal y ′ (t), sets the phase difference ⁇ in the complex multiplier 65, and sets The multiplier 65 performs a phase correction on the feed pack signal so that the phase difference ⁇ becomes zero.
- the distortion compensation table (LUT) 61 does not update the stored contents during the phase correction period ⁇ t.
- the intermittent control unit 69 sets the phase adjustment on / off signal PAS to low level and sets the enable signal ENS of the distortion compensation table (LUT) 61 to high level.
- the distortion compensation table 61 clocks the old distortion compensation coefficient h (n) with the distortion compensation coefficient h (n + 1) calculated by the distortion compensation coefficient update unit 67. Update in the clock cycle. Note that the phase adjustment circuit 68 stops the phase adjustment control.
- the phase difference between the reference signal and the feedback signal is periodically compensated.
- the distortion compensation coefficient is updated only during a period in which the phase difference is small, the distortion compensation coefficient can be quickly converged without being affected by the phase difference.
- the phase difference between the reference signal and the buried pack signal fluctuates, a good and stable distortion compensation operation can be performed.
- FIG. 6 is a configuration diagram of the distortion compensating apparatus according to the second rate embodiment, and the same parts as those in the first embodiment in FIG. The difference is that an intermittent control execution determination unit 70 that determines whether to perform the intermittent control is provided.
- the phase adjustment circuit 68 correctly detects the phase difference between the reference signal and the feedback signal. You will not be able to do so. In such a case, it is better to stop updating the phase correction and the distortion compensation coefficient.
- FIG. 7 is a processing flow of the second embodiment.
- the intermittent control execution determination unit 70 detects the magnitude of the transmission signal x (t), checks whether the transmission signal x (t) is equal to or greater than the set value (Step 201), If so, the phase correction processing (step 202) and the processing of updating the distortion compensation table (LUT) (step 203) are performed as in the first embodiment. However, in step 201, if the transmission signal x (t) is smaller than the set value, the phase correction and the update of the distortion compensation coefficient are stopped, and it is determined that the transmission signal x (t) becomes equal to or larger than the set value. wait.
- the detection of the gap signal may use a feedback signal y (t) instead of the transmission signal x (t).
- the distortion compensation control can be immediately performed using the correct distortion compensation coefficient.
- the phase difference does not operate properly when a signal gap or the like occurs. Therefore, in the gap portion of the transmission signal, The phase difference is clearly different from the normal value, for example, the phase difference calculated by the phase adjustment circuit 68 fluctuates greatly. Therefore, the phase difference calculated by the phase adjustment circuit 68 is monitored, and when the variation of the phase difference is larger than the set value, it is determined that the transmission signal is in the gap, and the distortion compensation table LUT is not updated. Control.
- FIG. 8 is a modification of the second embodiment, and the same parts as those of the second embodiment in FIG. 6 are denoted by the same reference numerals.
- the difference is that a phase difference monitoring unit 71 for monitoring the variation of the phase difference calculated by the phase adjustment circuit 68 and a table update control unit 72 for controlling the updating of the distortion compensation table (LUT) are provided.
- FIG. 9 is a processing flow of the modification.
- a phase correction period t and a distortion compensation update period ⁇ T are generated alternately (see Fig. 1).
- the phase adjustment circuit 68 calculates the phase difference ⁇ between the reference signal and the feedback signal, and inputs the phase difference to the complex multiplier 65 to reduce the feedback signal so that the phase difference becomes zero.
- the phase is corrected (step 301).
- the phase difference monitoring unit 71 calculates the amount of change between the current phase difference PhNew and the previous phase difference PhOld, checks whether the amount of change is larger than the threshold (steps 302 and 303), and compares the comparison result with the table update control unit. Enter 72.
- the table update control unit 72 determines that the transmission signal is not a gap portion, sets the enable signal ENS ′ to a high level during the distortion compensation coefficient update period ⁇ T, and sets the distortion compensation table ( LUT) can be updated (step 304).
- this phase difference PhNew is set to PhOld (step 305), and the process returns to the beginning and repeats the subsequent processes.
- step 303 if the variation is larger than the threshold value, it is determined that the transmission signal is a gap portion, and the enable signal ENS ′ is set to low level during the distortion compensation coefficient update period ⁇ T, and the distortion compensation table ( LUT) update is stopped (step 306). Thereafter, the current phase difference PhNew is set to PhOld (step 305), and the process returns to the beginning and the subsequent processes are repeated.
- FIG. 10 is a configuration diagram of a distortion compensating apparatus according to the third embodiment, and the same parts as those in the first embodiment in FIG. The difference is that a jitter amount determination unit 73 that determines the amount of jitter is provided, and an update period determination unit 74 that variably controls the length of the distortion compensation coefficient update period ⁇ ⁇ based on the amount of jitter is provided. , 3 intermittent control section 6 9 force S, the determined distortion compensation section The point is that the enable signal ENS is set to the high level during the number update period ⁇ , and the enable signal ENS is set to the low level during the phase correction period At.
- the reason for controlling the distortion compensation coefficient update period is that when the amount of jitter is large, it is necessary to reduce the effect of jitter by reducing the update time of the distortion compensation table (LUT).
- the total value, the average value, or the variance of the phase differences is measured in order to determine the amount of jitter.
- the amount of jitter is large, the instantaneous phase difference fluctuation is intense.
- the amount of jitter is small, the instantaneous phase difference fluctuation is small, and the amount of jitter is quantitatively measured.
- the LUT update time is set shorter when the jitter amount is large, and the LUT update time is set longer when the jitter amount is small.
- FIG. 11 is a processing flow of the third embodiment.
- the amount of jitter is estimated (step 401), and the distortion compensation coefficient update period ⁇ T is determined according to the amount of jitter (step 402).
- the phase adjustment circuit 68 calculates the phase difference between the reference signal and the feed pack signal in the At period for each predetermined period To, which is set in advance, as shown in FIG. Quantity judgment unit
- the update period determination unit 74 stores the correspondence between the jitter amount and the distortion compensation coefficient update period ⁇ ⁇ in advance, determines the distortion compensation coefficient update period ⁇ ⁇ ⁇ according to the estimated jitter amount, and inputs it to the intermittent control unit 69 I do.
- the intermittent control unit 69 alternately performs the phase correction (step 403) and the distortion compensation time based on the phase correction period ⁇ t and the determined distortion compensation coefficient update period T as in the first embodiment.
- One bull (LUT) is updated (step 404).
- the update period can be lengthened, so that the distortion compensation coefficient can be quickly converged.
- the distortion compensation coefficient update period can be shortened, so that the distortion compensation coefficient can be updated only during the period in which the phase difference is small due to the correction, and the distortion compensation coefficient can be updated. The effect can be reduced.
- the following method can be used to determine the degree to which the amplitude increases or decreases as indicated by the dotted line. That is, it is a method of determining the amount of jitter based on the amount of dispersion of the phase difference.
- the variance is given by the following equation, where i is the ith phase difference, Xi is the average value of the phase difference, Xm is the number of samples
- FIG. 14 shows a processing flow in such a case. Similar to the processing flow of FIG. 11, the jitter amount is estimated (step 411) prior to the intermittent control of the phase correction and the distortion compensation coefficient update (step 411). Then, a distortion compensation coefficient update period ⁇ T is determined (step 412).
- the phase adjustment circuit 68 detects the phase difference during the phase correction period ⁇ t, and the complex multiplier 65 corrects the phase difference of the feedback signal based on the phase difference (step 413).
- the jitter amount determination unit 73 calculates the amount of change from the previous phase difference (the amount of change is initially set to 0), and the update period determination unit 74 determines the distortion compensation coefficient update period ⁇ T based on the amount of change. Correction is made (step 414).
- the intermittent control unit 69 sets the enable signal to the high level during the determined distortion compensation coefficient update period m T to enable the distortion compensation table (LUT) to be updated (step 415). Thereafter, the processing of step 413 and thereafter is repeated.
- the distortion compensation coefficient update period can be controlled in accordance with the fluctuation, so that the influence of the jitter can be reduced.
- the distortion compensation coefficient update period AT is determined based on the amount of jitter.
- the distortion compensation coefficient update period ⁇ T may be fixed, and the update time constant of the distortion compensation coefficient update unit may be changed instead. If the update time constant is shortened, the update period of the distortion compensation coefficient is lengthened equivalently. That is, if the update time constant is increased, the distortion compensation coefficient update period is equivalently shortened.
- the update time constant of the distortion compensation coefficient update unit 67 can be controlled by changing the value of the step size parameter ⁇ (see FIG. 30). For example, increasing the value of the step size parameter ⁇ increases the convergence speed and shortens the update time constant. Also, when the value of the step size parameter ⁇ is reduced, the convergence speed becomes slow, and the update time constant becomes long.
- FIG. 15 shows a modification of the third embodiment, in which the update time constant, that is, the value of the step size parameter ⁇ is changed based on the amount of jitter.
- the update time constant that is, the value of the step size parameter ⁇ is changed based on the amount of jitter.
- phase correction period At and the distortion compensation coefficient update period ⁇ T are fixed.
- An update time constant determination unit 75 that controls the update time constant based on the jitter amount is provided instead of the update period determination unit 74.
- FIG. 16 shows a processing flow of the modification.
- the jitter amount determination unit 73 estimates the jitter amount (step 421) and updates the jitter amount.
- the time constant determining unit 75 has a table indicating the correspondence between the amount of jitter and the value of the step size parameter / for adaptive signal processing. From the table, the step size parameter ⁇ according to the estimated amount of jitter is used. Is obtained and set in the distortion compensation coefficient updating unit 67 (step 422). Accordingly, the distortion compensation coefficient update unit 67 calculates the distortion compensation coefficient h (n + l) by performing adaptive signal processing using the set u value in the distortion compensation coefficient update period ⁇ . become.
- phase correction step 423 and the update processing of the distortion compensation table (LUT) are performed alternately as in the first embodiment (step 423). 424).
- the distortion compensation coefficient update period is controlled based on the phase difference.
- the distortion compensation coefficient update period can be controlled based on e (t). This is because the error signal e (t) fluctuates according to the jitter.
- FIG. 17 is a configuration diagram of the distortion compensating apparatus of the fourth embodiment, and the same components as those of the third embodiment of FIG. 10 are denoted by the same reference numerals.
- the difference from the third embodiment of FIG. 10 is that in the fourth embodiment, the jitter amount is determined based on the total value, the average value, or the variance of the error signal e (t) output from the jitter amount determination unit 73 subtractor 66. It is the point that is estimated.
- FIG. 18 shows the processing flow of the fourth embodiment.
- the jitter amount determination unit 73 determines the jitter based on the average value or variance of the error signal e (t). The amount is estimated (step 501), and the update period determination unit 74 determines the distortion compensation coefficient update period ⁇ ⁇ based on the amount of jitter (step 502). Thereafter, the intermittent control unit 69 alternately generates the phase correction period ⁇ t and the determined distortion compensation coefficient update period ⁇ T, and repeats the phase complementation and the update processing of the distortion compensation table (LUT) (steps 503 and 504). ). As described above, according to the fourth embodiment, the influence of jitter can be reduced.
- the distortion compensation coefficient update period ⁇ is determined based on the amount of jitter.
- the distortion compensation coefficient update period ⁇ may be fixed, and the update time constant of the distortion compensation coefficient update unit may be changed instead.
- FIG. 19 is a modification of the fourth embodiment, and is configured to change the update time constant, that is, the value of the step size parameter ⁇ based on the amount of jitter. The difference from the fourth embodiment in FIG.
- phase correction period At and the distortion compensation coefficient update period ⁇ T are fixed.
- An update time constant determination unit 75 that controls the update time constant (step size parameter ⁇ ) based on the amount of jitter is provided instead of the update period determination unit 74.
- the processing flow can be performed in the same manner as the processing flow of FIG. 18 except that the update time constant (step size parameter ⁇ ) is controlled based on the jitter amount. According to the modified example, it is possible to achieve the same effect as in the case where the distortion compensation coefficient update time is controlled based on the amount of jitter.
- the distortion compensation coefficient update period is controlled based on the phase difference.However, the distortion compensation coefficient update period is controlled based on the feedback signal AGPR (Adj acent Channel Power Ratio). The period can be controlled. Unless jitter measures are taken in a system with severe jitter, unnecessary waves will be generated at the amplifier output. This unwanted wave can also be confirmed in the feedback signal. Therefore, in the fifth embodiment, the ACPR is measured, and the amount of jitter is quantitatively determined based on the ACPR. If the amount of jitter is large, the distortion compensation coefficient update period ⁇ is short, and conversely, if the amount of jitter is small, Set ⁇ T longer.
- AGPR Adj acent Channel Power Ratio
- FIG. 20 is a configuration diagram of the distortion compensating apparatus of the fifth embodiment, and the same components as those of the third embodiment of FIG. 10 are denoted by the same reference numerals.
- the difference from the third embodiment of FIG. 10 is that the fifth embodiment differs from the third embodiment in that (1) an ACPR measurement device 81 is provided, and (2) a jitter amount determination unit 73. The point is that the amount of jitter is estimated based on the variance.
- Fig. 21 is a block diagram of the ACPR measuring device 81.
- the AD component 81b performs AZD conversion on the signal component of the adjacent channel input from the bandpass filter 81a, and performs FFT calculation on the AD conversion output by the FFT calculation unit 81c to obtain power.
- the calculating unit 81d calculates the power of the adjacent channel using the FFT output, and calculates and outputs the ACPR using the power of the adjacent channel and the power of the channel of interest.
- FIG. 22 is a processing flow of the fifth embodiment.
- the ACPR measuring device 81 measures and outputs ACPR.
- the jitter amount determination unit 73 estimates the amount of jitter based on the average value or the variance of the ACPR (step 601), and the update period determination unit 74 determines the distortion compensation coefficient update period ⁇ T based on the amount of jitter (step 601). 602).
- the intermittent control unit 69 alternately generates the phase correction period ⁇ t and the determined distortion compensation coefficient update period ⁇ T, and repeats the phase correction and the update processing of the distortion compensation table (LUT) (steps 603 and 604). ).
- the effect of jitter can be reduced.
- the distortion compensation coefficient update period ⁇ ⁇ is determined based on the amount of jitter.
- the distortion compensation coefficient update period ⁇ ⁇ may be fixed, and the update time constant of the distortion compensation coefficient update unit may be changed instead. it can.
- FIG. 23 shows a modification of the fifth embodiment, in which the update time constant, that is, the value of the step size parameter / is changed based on the amount of jitter. The difference from the fifth embodiment in FIG. (1) The phase correction period ⁇ t and the distortion compensation coefficient update period ⁇ T are fixed,
- An update time constant determination unit 75 that controls the update time constant (step size parameter ⁇ ) based on the amount of jitter is provided instead of the update period determination unit 74.
- step size parameter ⁇ the update time constant (step size parameter ⁇ ) is controlled based on the amount of jitter differs from the processing flow of FIG. According to the modification, it is possible to achieve the same effect as the case where the distortion compensation coefficient update time is controlled based on the amount of jitter.
- the distortion compensation coefficient update period is controlled based on the phase difference in the third embodiment
- the distortion compensation coefficient update period can be controlled based on the degree of convergence of the distortion compensation number.
- the degree of convergence of the distortion compensation coefficient is determined, and the amount of jitter is quantitatively determined.
- the distortion compensation coefficient update period ⁇ is set short, and when it is small, ⁇ is set long.
- FIG. 24 is a configuration diagram of the distortion compensating apparatus of the sixth embodiment, and the same components as those of the third embodiment of FIG. 10 are denoted by the same reference numerals.
- the difference from the third embodiment of FIG. 10 is that, in the sixth embodiment, (1) the convergence state monitoring unit 82 is provided, and (2) the jitter amount determination unit 73 estimates the jitter amount based on the convergence stability. It is a point.
- FIG. 25 is a processing flow of the fifth embodiment.
- the convergence state monitoring unit 82 reads the distortion compensation coefficient h (n) read from the distortion compensation table 61 and used for the distortion compensation processing, and the new distortion compensation coefficient calculated by the distortion compensation coefficient update unit 67.
- h (n + l) is input, and the convergence state (convergence stability) is monitored based on the integrated value or average value of the difference in a predetermined period, and the jitter amount determination unit 73 determines the jitter amount based on the convergence stability.
- Is estimated (step 701), and the update period determination unit 74 determines the distortion compensation coefficient update period ⁇ T based on the jitter amount (step 720).
- the intermittent control unit 69 alternately generates the phase correction period ⁇ t and the determined distortion compensation coefficient update period ⁇ T, and repeats the phase correction and the update processing of the distortion compensation table (LUT) (steps 703 and 704). ).
- the influence of jitter can be reduced.
- the distortion compensation coefficient update period ⁇ is determined based on the amount of jitter. It is also possible to fix the augmentation coefficient update period ⁇ ⁇ and instead change the update time constant of the distortion compensation coefficient update unit 67.
- FIG. 26 shows a modification of the sixth embodiment, in which the update time constant, that is, the value of the step size parameter ⁇ is changed based on the amount of jitter. The difference from the sixth embodiment in FIG.
- phase correction period At and the distortion compensation coefficient update period ⁇ are fixed.
- an update time constant determination unit 75 that controls the update time constant (step size parameter Ai) based on the amount of jitter is provided.
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
- Transmitters (AREA)
Description
Claims
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
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DE60238508T DE60238508D1 (de) | 2002-05-31 | 2002-05-31 | Verzerrungskompensationsvorrichtung |
EP02730823A EP1499027B1 (en) | 2002-05-31 | 2002-05-31 | Distortion compensation apparatus |
JP2004510126A JP3875707B2 (ja) | 2002-05-31 | 2002-05-31 | 歪補償装置 |
PCT/JP2002/005323 WO2003103163A1 (ja) | 2002-05-31 | 2002-05-31 | 歪補償装置 |
US10/951,040 US7639755B2 (en) | 2002-05-31 | 2004-09-22 | Distortion compensating apparatus |
Applications Claiming Priority (1)
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PCT/JP2002/005323 WO2003103163A1 (ja) | 2002-05-31 | 2002-05-31 | 歪補償装置 |
Related Child Applications (1)
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US10/951,040 Continuation US7639755B2 (en) | 2002-05-31 | 2004-09-22 | Distortion compensating apparatus |
Publications (1)
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WO2003103163A1 true WO2003103163A1 (ja) | 2003-12-11 |
Family
ID=29606634
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PCT/JP2002/005323 WO2003103163A1 (ja) | 2002-05-31 | 2002-05-31 | 歪補償装置 |
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US (1) | US7639755B2 (ja) |
EP (1) | EP1499027B1 (ja) |
JP (1) | JP3875707B2 (ja) |
DE (1) | DE60238508D1 (ja) |
WO (1) | WO2003103163A1 (ja) |
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Also Published As
Publication number | Publication date |
---|---|
EP1499027B1 (en) | 2010-12-01 |
US7639755B2 (en) | 2009-12-29 |
US20050047521A1 (en) | 2005-03-03 |
DE60238508D1 (de) | 2011-01-13 |
JPWO2003103163A1 (ja) | 2005-10-06 |
JP3875707B2 (ja) | 2007-01-31 |
EP1499027A1 (en) | 2005-01-19 |
EP1499027A4 (en) | 2005-08-10 |
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