WO2003098709A8 - Dispositif semi-conducteur comprenant une puce semi-conductrice - Google Patents

Dispositif semi-conducteur comprenant une puce semi-conductrice

Info

Publication number
WO2003098709A8
WO2003098709A8 PCT/JP2003/004821 JP0304821W WO03098709A8 WO 2003098709 A8 WO2003098709 A8 WO 2003098709A8 JP 0304821 W JP0304821 W JP 0304821W WO 03098709 A8 WO03098709 A8 WO 03098709A8
Authority
WO
WIPO (PCT)
Prior art keywords
lead
section
extends
semiconductor chip
sections
Prior art date
Application number
PCT/JP2003/004821
Other languages
English (en)
French (fr)
Other versions
WO2003098709A1 (fr
Inventor
Shinji Isokawa
Original Assignee
Rohm Co Ltd
Shinji Isokawa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd, Shinji Isokawa filed Critical Rohm Co Ltd
Priority to DE60320799T priority Critical patent/DE60320799D1/de
Priority to US10/521,301 priority patent/US7002185B2/en
Priority to KR1020047000385A priority patent/KR100966537B1/ko
Priority to EP03719117A priority patent/EP1528602B1/en
Publication of WO2003098709A1 publication Critical patent/WO2003098709A1/ja
Publication of WO2003098709A8 publication Critical patent/WO2003098709A8/ja

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/483Containers
    • H01L33/486Containers adapted for surface mounting
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    • H01L24/02Bonding areas ; Manufacturing methods related thereto
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    • H01L33/38Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Led Device Packages (AREA)
  • Led Devices (AREA)
  • Wire Bonding (AREA)
PCT/JP2003/004821 2002-05-21 2003-04-16 Dispositif semi-conducteur comprenant une puce semi-conductrice WO2003098709A1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
DE60320799T DE60320799D1 (de) 2002-05-21 2003-04-16 Halbleitervorrichtung mit halbleiterchip
US10/521,301 US7002185B2 (en) 2002-05-21 2003-04-16 Semiconductor device using semiconductor chip
KR1020047000385A KR100966537B1 (ko) 2002-05-21 2003-04-16 반도체 칩을 사용한 반도체 장치
EP03719117A EP1528602B1 (en) 2002-05-21 2003-04-16 Semiconductor device using semiconductor chip

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2002-146657 2002-05-21
JP2002146657A JP3877642B2 (ja) 2002-05-21 2002-05-21 半導体チップを使用した半導体装置

Publications (2)

Publication Number Publication Date
WO2003098709A1 WO2003098709A1 (fr) 2003-11-27
WO2003098709A8 true WO2003098709A8 (fr) 2005-03-10

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ID=29545144

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2003/004821 WO2003098709A1 (fr) 2002-05-21 2003-04-16 Dispositif semi-conducteur comprenant une puce semi-conductrice

Country Status (8)

Country Link
US (1) US7002185B2 (ja)
EP (1) EP1528602B1 (ja)
JP (1) JP3877642B2 (ja)
KR (1) KR100966537B1 (ja)
CN (1) CN100362670C (ja)
DE (1) DE60320799D1 (ja)
TW (1) TWI261935B (ja)
WO (1) WO2003098709A1 (ja)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080035947A1 (en) * 2003-12-09 2008-02-14 Weaver Jr Stanton Earl Surface Mount Light Emitting Chip Package
US20060081859A1 (en) * 2004-10-15 2006-04-20 Shyi-Ming Pan Light emitting semiconductor bonding structure and method of manufacturing the same
US8086082B2 (en) 2006-07-14 2011-12-27 Koninklijke Philips Electronics N.V. Methods for mounting an electro-optical component in alignment with an optical element and related structures
JP2008251936A (ja) * 2007-03-30 2008-10-16 Rohm Co Ltd 半導体発光装置
EP2001058A1 (en) * 2007-06-08 2008-12-10 Augux Co., Ltd. Solder-type light-emitting diode chip assembly and method of bonding a solder-type light-emitting diode chip
US8049236B2 (en) * 2008-09-26 2011-11-01 Bridgelux, Inc. Non-global solder mask LED assembly
US8058664B2 (en) * 2008-09-26 2011-11-15 Bridgelux, Inc. Transparent solder mask LED assembly
US9252336B2 (en) 2008-09-26 2016-02-02 Bridgelux, Inc. Multi-cup LED assembly
JP5091916B2 (ja) * 2009-06-10 2012-12-05 新光電気工業株式会社 配線基板及び半導体装置
JP5585013B2 (ja) 2009-07-14 2014-09-10 日亜化学工業株式会社 発光装置
KR100999784B1 (ko) * 2010-02-23 2010-12-08 엘지이노텍 주식회사 발광 소자, 발광 소자 제조방법 및 발광 소자 패키지
KR20130012119A (ko) * 2010-03-24 2013-02-01 스미또모 베이크라이트 가부시키가이샤 발광 소자의 제조 방법 및 그것을 사용하여 이루어지는 발광 소자
JP5429094B2 (ja) * 2010-07-29 2014-02-26 日亜化学工業株式会社 半導体発光素子用実装基板とその実装基板を用いた半導体発光装置
JP2012069764A (ja) 2010-09-24 2012-04-05 On Semiconductor Trading Ltd 回路装置およびその製造方法
JP5954013B2 (ja) 2012-07-18 2016-07-20 日亜化学工業株式会社 半導体素子実装部材及び半導体装置
US9548261B2 (en) * 2013-03-05 2017-01-17 Nichia Corporation Lead frame and semiconductor device
JP6258597B2 (ja) * 2013-04-12 2018-01-10 シチズン電子株式会社 Led装置の製造方法
DE102013219087A1 (de) * 2013-09-23 2015-03-26 Osram Opto Semiconductors Gmbh Verfahren und Vorrichtung zum Bearbeiten eines optoelektronischen Bauteils
USD737784S1 (en) * 2014-07-30 2015-09-01 Kingbright Electronics Co., Ltd. LED component
JP6410083B2 (ja) * 2014-07-31 2018-10-24 シーシーエス株式会社 Led実装用基板、led
USD758977S1 (en) * 2015-06-05 2016-06-14 Kingbright Electronics Co. Ltd. LED component
WO2017010818A1 (ko) * 2015-07-15 2017-01-19 서울바이오시스 주식회사 발광 다이오드 패키지 제조 방법
KR20170009750A (ko) 2015-07-15 2017-01-25 서울바이오시스 주식회사 발광 다이오드 패키지 제조 방법
KR20170093736A (ko) 2016-02-05 2017-08-16 엘지이노텍 주식회사 발광소자 패키지
USD774475S1 (en) * 2016-02-19 2016-12-20 Kingbright Electronics Co. Ltd. LED component
CN106711135A (zh) * 2017-01-09 2017-05-24 丽智电子(昆山)有限公司 一种模组化的光电二极管封装器件
JP6680258B2 (ja) * 2017-04-21 2020-04-15 日亜化学工業株式会社 光源装置

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3869787A (en) * 1973-01-02 1975-03-11 Honeywell Inf Systems Method for precisely aligning circuit devices coarsely positioned on a substrate
US4032058A (en) * 1973-06-29 1977-06-28 Ibm Corporation Beam-lead integrated circuit structure and method for making the same including automatic registration of beam-leads with corresponding dielectric substrate leads
JP3127195B2 (ja) * 1994-12-06 2001-01-22 シャープ株式会社 発光デバイスおよびその製造方法
US6054716A (en) * 1997-01-10 2000-04-25 Rohm Co., Ltd. Semiconductor light emitting device having a protecting device
DE19861398B4 (de) * 1997-10-03 2010-12-09 Rohm Co. Ltd., Kyoto Licht abstrahlende Halbleitervorrichtung
JPH11121797A (ja) 1997-10-16 1999-04-30 Matsushita Electron Corp チップ型半導体発光装置
JPH11168235A (ja) * 1997-12-05 1999-06-22 Toyoda Gosei Co Ltd 発光ダイオード
JP3625377B2 (ja) * 1998-05-25 2005-03-02 ローム株式会社 半導体発光素子
JP4296644B2 (ja) * 1999-01-29 2009-07-15 豊田合成株式会社 発光ダイオード
JP4625997B2 (ja) * 1999-07-22 2011-02-02 日亜化学工業株式会社 発光ダイオード
JP4366810B2 (ja) 2000-02-08 2009-11-18 日亜化学工業株式会社 発光ダイオードの形成方法
JP2001298216A (ja) * 2000-04-12 2001-10-26 Matsushita Electric Ind Co Ltd 表面実装型の半導体発光装置
JP2001358367A (ja) * 2000-06-13 2001-12-26 Rohm Co Ltd チップ型発光素子
JP2002094123A (ja) * 2000-09-14 2002-03-29 Citizen Electronics Co Ltd 表面実装型発光ダイオード及びその製造方法
TW579608B (en) * 2000-11-24 2004-03-11 High Link Technology Corp Method and structure of forming electrode for light emitting device
JP3972670B2 (ja) * 2002-02-06 2007-09-05 豊田合成株式会社 発光装置

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TWI261935B (en) 2006-09-11
US7002185B2 (en) 2006-02-21
EP1528602B1 (en) 2008-05-07
CN100362670C (zh) 2008-01-16
TW200308105A (en) 2003-12-16
JP3877642B2 (ja) 2007-02-07
WO2003098709A1 (fr) 2003-11-27
KR20050007282A (ko) 2005-01-17
KR100966537B1 (ko) 2010-06-29
CN1545739A (zh) 2004-11-10
US20050242424A1 (en) 2005-11-03
DE60320799D1 (de) 2008-06-19
EP1528602A4 (en) 2006-08-30
EP1528602A1 (en) 2005-05-04

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