WO2003085703A2 - Elektronisches bauteil mit mindestens einem halbleiterchip und flip-chip-kontakten sowie verfahren zu seiner herstellung - Google Patents
Elektronisches bauteil mit mindestens einem halbleiterchip und flip-chip-kontakten sowie verfahren zu seiner herstellung Download PDFInfo
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- WO2003085703A2 WO2003085703A2 PCT/DE2003/001150 DE0301150W WO03085703A2 WO 2003085703 A2 WO2003085703 A2 WO 2003085703A2 DE 0301150 W DE0301150 W DE 0301150W WO 03085703 A2 WO03085703 A2 WO 03085703A2
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Classifications
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0102—Calcium [Ca]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01068—Erbium [Er]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01327—Intermediate phases, i.e. intermetallics compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/032—Materials
- H05K2201/0323—Carbon
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10227—Other objects, e.g. metallic pieces
- H05K2201/10287—Metal wires as connectors or conductors
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
- H05K2203/0235—Laminating followed by cutting or slicing perpendicular to plane of the laminate; Embedding wires in an object and cutting or slicing the object perpendicular to direction of the wires
Definitions
- Electronic component with at least one semiconductor chip and flip-chip contacts and method for its production.
- the invention relates to an electronic component with at least one semiconductor chip and flip-chip contacts and a method for producing the same in accordance with the preamble of the independent claims.
- the size of the external contacts differs from that of the flip-chip contacts.
- Flip-chip contacts which are arranged directly on contact areas of a semiconductor chip, have microscopic dimensions, i.e. these flip-chip contacts can only be measured under a light microscope.
- flip-chip contacts are understood to mean both microscopic solder balls or bumps with an outside diameter of approximately 150 to 250 ⁇ m and microscopic surface contacts, so-called “solid” contacts, which are approximately one order of magnitude smaller with approximately 15 to 25 ⁇ m external dimensions are designed as solder balls or bumps in flip-chip technology and are known from the publications EP 0 610 709 and EP 0 745 274.
- External contacts on the other hand, have macroscopically large dimensions that are visible and measurable to the naked eye and have dimensions in the range from 0.5 to 2 mm.
- the thermal expansion coefficient of the semiconductor chip in particular of silicon
- a circuit board material with glass fiber reinforcement which carries the macroscopically large external contacts
- the microscopic flip chip Contacts of a silicon semiconductor chip which are arranged on the outer edges of the semiconductor chip, loaded. This load can lead to demolition, making the entire component inoperable.
- the object of the invention is to overcome the problems that have occurred with large-area semiconductor chips with a high flip-chip contact density and large-area rewiring plates for electronic components with a high external contact density. winch and specify an electronic component that can be connected to a higher-level circuit arrangement with greater reliability, the shear stress on the external contact surfaces and the external contacts and the shear stress on the microscopic flip-chip contacts to be reduced.
- an electronic component with at least one semiconductor chip that has microscopic flip-chip contacts is created and connected to a rewiring plate on which macroscopically large elastic external contacts are arranged.
- the rewiring plate has a wiring carrier with a rewiring pattern that connects the microscopic contact connection areas to the macroscopically large external contact areas via conductor tracks.
- the wiring carrier itself has a polycrystalline silicon, an amorphous glass or a metal. The thermal expansion behavior of these materials is adapted to the material of the semiconductor chip.
- the adapted thermal expansion behavior can be achieved in that the thermal expansion coefficient of the wiring carrier is equal to or greater than the thermal expansion coefficient of the semiconductor chip, the thermal expansion coefficient of the wiring carrier not exceeding the thermal expansion coefficient of the semiconductor chip by 1.5 times. With this adaptation it is achieved that after soldering the flip-chip contacts with the Contact pads on the wiring carrier of the semiconductor chip is only subjected to pressure.
- the electronic component according to the invention has the advantage that the microscopic flip-chip contacts of the semiconductor chip are subjected to minimal thermomechanical loads, since polycrystalline silicon, amorphous glass or metal is used as the wiring carrier, which has approximately the same or a maximum of 50% larger expansion coefficients as or as a monocrystalline semiconductor chip material. Since macroscopically large elastic external contacts protrude from the electronic component, these elastic external contacts can be connected to a higher-level circuit arrangement without the electronic component being thermomechanically stressed by these connections. Rather, a significant proportion of the shear stress is absorbed by the elastic external contacts when the electronic component with the macroscopically large elastic external contacts is arranged on a higher-level circuit arrangement made of a printed circuit board material.
- An additional advantage of the invention is the use of materials for the wiring board that can be polished as precisely as semiconductor wafers. This enables the use of thin-film techniques for the production of the redistribution board as they are used for the production of semiconductor chips. Such precision cannot be achieved with rewiring boards on printed circuit board materials.
- Another advantage of the invention is that the redistribution board of this invention can be tested for its function as an intermediate product and an independent component before the electronic component is completed by the application of the semiconductor chip with its flip-chip contacts.
- microscopic surface contacts or solid contacts which have intermetallic phases are provided as flip-chip contacts.
- Such surface contacts can be realized by at least an order of magnitude smaller than microscopic solder ball contacts and enable a correspondingly higher flip chip contact density on the semiconductor chip.
- the semiconductor chip with its flip-chip contacts can either be arranged on the top of the redistribution plate made of silicon, amorphous glass or metal with an adapted coefficient of thermal expansion, which carries the macroscopically large elastic external contacts, or on the opposite side of the redistribution plate, which is only one multilayer rewiring pattern, and can only have macroscopically large external contact areas in the event of a stack of electronic components.
- the first case in which the semiconductor chip with its flip-chip contacts and the macroscopically large external contacts are arranged on the same side of the rewiring plate, has the advantage that only a rewiring pattern has to be provided in order to connect the microscopic flip-chip contacts with the macroscopically large elastic external contacts.
- the rewiring pattern can be arranged directly on the polished upper side of the non-metallic wiring carrier plate.
- an insulation layer is provided between the rewiring pattern and the polished upper side of the metallic wiring carrier plate.
- the microscopic flip-chip contacts are arranged on a surface of the rewiring plate opposite the macroscopically large elastic external contacts
- the wiring carrier made of polycrystalline silicon, amorphous glass or metal has through contacts which are the conductive components of the connect both sides with each other, ie the rewiring pattern on the side of the semiconductor chip is electrically connected via the through contacts to correspondingly arranged external contacts in a matrix with a fixed pitch on the opposite side of the wiring board.
- the wiring carrier can have an insulation layer between the via and the polycrystalline silicon. If the wiring carrier has a metal, the wiring carrier must have an insulation layer between the via and the metal.
- the material of the through contacts is adapted to the thermal expansion behavior of the wiring carrier.
- the metal wiring carrier can have an iron-nickel alloy with 40 to 42% by weight of nickel or be made from a copper / molybdenum alloy with 10 to 30% by weight of copper. The latter alloy can be realized as a powder metallurgical infiltration material. Both metal alloys have the advantage that their thermal expansion behavior can be adjusted by the mixing ratio of the alloy components and can thus be adapted to the thermal expansion behavior of the semiconductor chip material.
- the rewiring plate makes it possible to accommodate several hundred macroscopically large elastic external contacts on the rewiring plate. This is particularly advantageous if the semiconductor chip also has a correspondingly high number of flip-chip contacts. In such cases, a multilayer rewiring pattern is preferably used.
- the vias in the wiring carrier can have laser-bored metallized through holes.
- the wiring support has water-jet-drilled, metallized through holes as through contacts. Since the external contacts arranged in the area of the through contacts are macroscopically large, such methods as laser drilling or water jet drilling can be used to provide the wiring carrier made of silicon, amorphous glass or metal with such macroscopically large through holes.
- dry etching processes such as reactive plasma etching and wet etching processes can be used to implement suitable through holes.
- this can have metallic wires in glass or polycrystalline silicon as through contacts, which are arranged in a grid dimension that corresponds to the grid dimension of the external contacts.
- Such an insulation plate has the advantage that the through contacts can have a significantly smaller diameter than is the case for through contacts which are to be produced via through holes.
- the grid dimension for the arrangement of the external contacts can be minimized.
- the metallic wires, which are embedded in the non-metallic insulation plate made of amorphous glass or of polycrystalline silicon can be made from metallic glass melting materials such as chrome-vanadium or chrome-molybdenum or chrome-nickel steel as through contacts.
- the at least one semiconductor chip is arranged in the center of the electronic component and is surrounded by the elastic external contacts.
- the semiconductor chip can have a solder layer on its rear side, which enables the electronic component to be fixed centrally on a superordinate printed circuit board and limits the pressure on the elastic external contacts.
- Such a construction presupposes that the semiconductor chip is arranged on the same side as the macroscopically large elastic external contacts on the wiring carrier, the multilayer rewiring pattern ensuring that the microscopic flip-chip contacts of the semiconductor chip with the macroscopically large external contact areas , which are provided for the elastic external contacts, are connected.
- the semiconductor chip and the external contacts are arranged on opposite sides, it is optionally provided to arrange a limited number of rigid external contacts in the center of the electronic component, which allow the electronic component to be fixed centrally on a superordinate circuit board circuit, and which allow the pressure limit to the elastic external contacts.
- These rigid and non-elastic external contacts located in the center can have solder balls or solder bumps and, due to their predetermined height, define a stabilization of the positioning of the electronic component on a higher-level circuit arrangement of a printed circuit board.
- a process for producing an insulation plate with embedded wires as through contacts has the following process steps for several electronic components:
- This method has the advantage that relatively fine and very precise through contacts can be provided in the insulation plate, so that a higher via density is possible and microscopic contact areas can be realized for rewiring on the ends of the through contacts.
- short wires are embedded in a flat glass melt.
- short wires are introduced line by line into a molten flat glass bed while carrying cross members fitted with short wires, from which the short wires protrude, the short wires projecting through the flat glass melt.
- the cross members are removed from the embedded short wires in the course of the flat glass production line and returned to the short wires for re-fitting. Then the ends of the short wires protruding from the flat glass on both sides can be etched off in order to close through contacts create. Finally, the flat glass provided with vias can be separated into wiring carriers.
- the wires can have a roughening on their outer surface, so that a positive connection between the a-orphan glass mass or the polycrystalline silicon mass and the wires occurs.
- metallic wires carbon fibers and / or graphite fibers can also be embedded as vias in the polycrystalline silicon mass or the amorphous glass mass. These fibers have a natural roughness on their upper side, so that a roughening step of the surface of the fibers can be omitted.
- Another method for producing a wiring carrier with through contacts is that first through holes are made in the wiring carrier and then these through holes are metallized.
- a wiring carrier plate made of amorphous glass or polycrystalline silicon in the final thickness between 50 and 500 micrometers is provided.
- a matrix of through holes is introduced in a predetermined grid dimension.
- a first metal layer can be applied as a seed layer to the insulation plate with through holes by dusting or sputtering.
- this seed layer can be made by electrodeposition of a second metal layer to fill the through holes to vias.
- the through holes can be made in polycrystalline silicon plates, amorphous glass plates or metal plates by laser drilling or by water jet drilling. No thermal stresses during water jet drilling generated in the material, the material must be evaporated during laser drilling so that through holes are formed, which can lead to thermal stresses. When water jet drilling, however, the wiring board must withstand high mechanical pressures. Both methods have already proven to be promising methods for testing polycrystalline silicon plates as well as for drilling amorphous glass plates and for drilling metal plates.
- a method for producing a rewiring plate from metals with through contacts for several electronic components can have the following method steps:
- This method has the advantage that very precise structures can be formed on both sides of a surface-polished metal plate. Furthermore, the metal plate provides a stable support for the electronic component due to its high strength. The resulting wiring carrier and the rewiring plate can moreover be adapted more precisely than glass plates to the semiconductor chip in terms of thermal expansion behavior due to the choice of the metal plate alloy.
- a rewiring pattern made of a metal alloy is first applied to a wiring carrier provided with through contacts, the rewiring pattern having microscopic contact connection areas and macroscopically large external contact areas as well as interconnects therebetween.
- This rewiring pattern can be implemented in multiple layers in order to connect the multiplicity of flip-chip contacts of the semiconductor chip to corresponding external contact areas.
- elastic external contacts can be used the external contact areas are connected via the vias.
- a semiconductor chip with its flip-chip contacts is applied to the rewiring pattern by connecting the microscopic flip-chip contacts to the microscopic contact pads.
- the sequence of the steps can be interchanged.
- the semiconductor chips can also be applied before the external contacts are applied.
- both the semiconductor chip and the elastic external contacts are applied to the same top side of the rewiring plate made of polycrystalline silicon, amorphous glass or metal.
- a multilayer rewiring pattern is first applied to the wiring carrier, electrically isolated from the wiring carrier, which has conductor tracks, contact connection areas for the flip-chip contacts of the semiconductor chip and external contact areas for the elastic, macroscopically large external contacts.
- the macroscopically large external contacts are arranged around the semiconductor chip in several rows of external contacts.
- This method has the advantage that the height or the distance to its higher-level circuit arrangement can be fixed vertically by the height of the semiconductor chip by means of the semiconductor chip.
- the centrally arranged semiconductor chip can ensure that the center of the electronic component is also laterally fixed relative to a higher-level circuit arrangement.
- the back of the semiconductor chip is provided with a corresponding solder layer or with an adhesive layer, with which the semiconductor chip and thus the center of the electronic component the higher-level circuit board is soldered or glued on.
- the present invention combines the elastic electrical contacts of a housing technology based on system carrier with the redistribution board concept of the BGA technology.
- this rewiring plate With the help of this rewiring plate, the unbundling of the connection contact surfaces located on a "motherboard" or a printed circuit board is realized by an interposed rewiring plate or an "interposer” which is made in wafer form from a semiconductor material, e.g. an undoped silicon, or by a non-conductor, e.g. amorphous glass or through a conductor, e.g. Metal, is produced, wherein the thermal expansion coefficient of the wiring substrate of the redistribution board is adapted to the thermal expansion coefficient of the material of the semiconductor chip.
- a semiconductor material e.g. an undoped silicon
- a non-conductor e.g. amorphous glass
- a conductor e.g. Metal
- the mechanically compensating elastic external contacts applied individually or by means of surface processes reduce the forces in the case of thermomechanical stress and increase the reliability of the electronic component.
- the mechanical compensation of the elastic contacts can be done in different ways. In principle, any elastically conductive structure can be used for the invention.
- the wiring process can already be delivered during the production of the contacts by appropriately wiring the elastic external contacts, so that the costs for the additional thin film process for producing conductor tracks can be saved. At least this thin-film process for producing conductor tracks is simplified by a metal layer. Such a process of elastic external contacts also replaces the otherwise usual metallization between solder ball and chip or solder ball and wiring carrier.
- the construction according to the invention has a considerably improved heat dissipation due to low heat transfer resistances from the integrated semiconductor chip via the soldering balls or flip-chip contacts directly into the carrier silicon material of the insulation plate, which in turn has very good thermal conductivities of approx. 100 W / mK even at 125 ° K, whereby the rewiring plate made of silicon can be cooled directly by air, especially since it is elastic External contacts a distance not filled by "under-fill" to a higher-level circuit arrangement based on a circuit board. Glass with approx.
- 1W / .K also has sufficient thermal conductivity values, but these can be improved by a correspondingly large number of vias, for example with a contact diameter of 400 micrometers and a pitch of 1 mm made of copper, which has 200 W / mK as a thermal conductivity value can.
- a wiring carrier made of glass with a corresponding number of through contacts made of copper can, for example, achieve a thermal conductivity of approximately 50 W / mK in the Z direction.
- rewiring plate as a thin film carrier in standard wafer format e.g. with a diameter of 200 mm or 300 mm with polished 0 surfaces. This means that process steps for microscopic structures, which are already successful in wafer technology, can be used to manufacture the rewiring boards.
- the conductive external contacts provide the thermomechanical compensation, so that an "underfill” can be dispensed with, so that the electronic component of this invention can be unsoldered in the event of malfunctions and repairs are therefore permitted.
- the wiring density of the multi-layer rewiring structure causes low costs due to the applicable thin-film technology, and the continuous wafer processing of the rewiring plate results in significantly lower costs per external connection than with a BGA technology, in particular with a high number of external contacts (or a "high pin” count ").
- the mechanical stress during temperature changes and in particular at low temperatures is significantly lower than with housing technologies based on rewiring plates or Plastic foils based.
- the underfill between the silicon redistribution board and the semiconductor chip can be dispensed with.
- the vias with alternating elastic see contacts and made with rigid solder contacts especially in a narrow area in the center, a stopper can be delivered through these rigid solder contacts and thus mechanical stabilization in tensile and shear forces can be achieved.
- FIG. 1 shows a schematic top view of the external contact side of an electronic component of a first embodiment of the invention
- FIG. 2 shows a schematic cross section through an electronic component of a further embodiment of the invention
- FIG. 3 shows a schematic cross section through a section of an electronic component of the first embodiment of the invention
- Figure 4 shows a schematic cross section through a
- FIG. 5 shows a schematic diagram of a section of a cast column with through wires embedded in the longitudinal direction for a rewiring plate
- FIG. 6 shows a schematic diagram of a wiring carrier with embedded wires as through contacts
- FIG. 7 shows a schematic cross section of a wiring carrier with embedded wires as through contacts
- FIG. 8 shows a schematic cross section of a wiring carrier with embedded wires and multilayer rewiring pattern applied on one side
- FIG. 9 shows a schematic bottom view of a wiring carrier with embedded wires
- Figure 10 shows a perspective schematic diagram for a
- FIG. 11 shows a schematic cross section through an electronic component with a metal wiring carrier
- FIGS. 12 to 17 show schematic results of method steps for producing a rewiring plate with through contacts through a metal wiring carrier
- FIG. 12 shows a schematic cross section of the rewiring plate with rewiring pattern on a metal plate
- FIG. 13 shows a schematic cross section of the rewiring plate with an etching mask and etched through hole for a via connection
- FIG. 14 shows a schematic cross section of the rewiring plate of FIG. 12 after the etching mask has been removed
- FIG. 15 shows a schematic cross section of the rewiring board after application of a structured insulation layer
- FIG. 16 shows a schematic cross section of the rewiring plate after the application of an elastic body for external contact
- FIG. 17 shows a schematic cross section of the rewiring plate after application of a structured metal layer to form elastic external contacts
- FIG. 18 shows a schematic cross section through an electronic component of the second embodiment of the invention
- FIG. 19 shows a schematic cross section through an electronic vertically stacked component.
- FIG. 1 shows a schematic top view of the external contact side of an electronic component 1 of a first embodiment of the invention.
- the reference symbol 2 denotes a semiconductor chip which is arranged in flip-chip technology with its microscopic flip-chip contacts on the wiring carrier 6, only the passive rear side of the electronic semiconductor chip being visible from the semiconductor chip 2 in this plan view of the external contact side ,
- the semiconductor chip 2 is surrounded by a number 1 to 384 external contacts, the small numbers showing the number and arrangement of the macroscopic external contacts on the schematic plan view of the electronic component shown here.
- the external contacts 5 with the position designations 1 to 384 are arranged in rows and columns in a predetermined grid dimension.
- the macroscopically large elastic external contacts te 5 are electrically connected to the microscopic flip-chip contacts of the semiconductor chip 2 via a possibly multi-layer rewiring pattern.
- the back of the semiconductor chip 16 is square in this embodiment of the invention.
- the substantially larger rewiring plate 4 is also square and has a wiring carrier 6 with a multilayer rewiring pattern applied.
- the rewiring plate can also be designed as a rectangle or polygonal. This means that hexagonal, octagonal and many other forms of the rewiring plate can be produced.
- the rewiring plate 4 shown here has wiring supports 6, which essentially consists of a polycrystalline silicon, but can also be made of metal or amorphous glass.
- Polycrystalline silicon has the advantage that it can be processed into thin wafers with polished surfaces and can be adapted to the usual wafer dimensions, for example of 200 mm or 300 mm diameter, so that the multilayer rewiring pattern can be applied several times in succession using known photoresist technology ,
- FIG. 2 shows a schematic cross section through an electronic component 1 of a further embodiment of the Invention.
- Components with the same functions as in FIG. 1 are identified by the same reference numerals and are not specifically explained.
- the embodiment of the invention according to FIG. 2 differs from the embodiment according to FIG. 1 in that two semiconductor chips 2 are arranged on the rewiring plate 4.
- the rewiring board 4 essentially consists of a wiring support 6 made of silicon, glass or metal, the thermal expansion coefficient of the wiring support material being matched to the thermal expansion coefficient of the semiconductor chips 2, and the wiring support 6 being coated on one side with a multilayer rewiring pattern 7.
- This rewiring pattern 7 connects the microscopic flip-chip contacts 3 of the semiconductor chips 2 to the macroscopically large elastic external contacts 5 on the rewiring plate 4.
- the elastic external contacts 5 have an elastic body 23 made of rubber-elastic material, which is connected to a Line path 24 is coated, this line path 24 being applied simultaneously with the uppermost structured metal layer of the multi-layer rewiring pattern 7.
- the multi-layer rewiring pattern 7 insulation layers are arranged between the individual metallic layers and additional through contacts are provided through the insulation layers.
- line bridges can be created in order to electrically connect the elastic macroscopic external contacts 5 with their outer contact surfaces 9 via the rewiring layers of the rewiring pattern 7 to the microscopic flip-chip contacts 3 of the semiconductor chips 2.
- the size of the Rewiring plate 4 can be expanded to production dimensions of semiconductor wafers with diameters of 200 to 300 mm, so that this cross section of FIG. 2 is only to be considered as a section of an electronic component 1. Due to the choice of material for the wiring carrier 6, there is an excellent, almost complete agreement between the thermal expansion behavior of the material of the wiring carrier 6 and the material of the semiconductor chip 2, which has a monocrystalline silicon.
- a circuit board 17 is shown schematically in cross section in FIG.
- This circuit board 17 belongs to a higher-level circuit arrangement with several arbitrarily other electronic components.
- the circuit board 17 is made of glass fiber reinforced plastic, which has a thermal expansion coefficient which is 3-5 times higher than the thermal expansion coefficient of the wiring carrier 6 made of polycrystalline silicon, amorphous glass or metal. Nevertheless, there is no breakage of the solder connection 26 between the contact connection areas 27 on the upper side of the printed circuit board 17 and the external contacts 5, since these external contacts 5 have a rubber-elastic body 23. This means that thermomechanical voltages can be absorbed without breaking contacts.
- a stopper region 28 is also realized by the semiconductor chip 25, since the external contacts 5 can only be pressed together up to the height of the stopper region 28.
- An additional mechanical fixation can be achieved by soldering or by gluing the passive rear side 16 of the semiconductor chip 25 to the printed circuit board 17 with an adhesive that has a Glass transition temperature of about 200 ° C.
- This stopper region 28 fixes the electronic component 1 on the printed circuit board 17 and limits the pressure on the elastic external contacts 5.
- FIG. 2 also shows that an "underfill” can be dispensed with in the present embodiment of the invention, which otherwise absorbs the shear stress due to thermo-mechanical stress.
- Dispensing with an "underfill” in this embodiment of the invention has the advantage that the electronic component 1 can be detached from the higher-level circuit arrangement at any time in the event of malfunctions and can be replaced by a functional electronic component 1. Repairs are thus possible on the basis of the present invention.
- FIG. 3 shows a schematic cross section through a section of an electronic component 1 of the first embodiment of the invention.
- Components with the same functions as in the previous figures are identified by the same reference numerals and are not specifically explained.
- the wiring carrier 6 is only provided on one side with a multi-layer rewiring pattern 7.
- This multilayer rewiring pattern 7 has conductor tracks in the different conductor track layers 29, 30, 31 and 32. Insulation layers 33, 34 and 35 are arranged between the conductor track layers 29, 30, 31, 32. Between the conductor layers 29, 30, 31, 32 through contacts 46, 47, 48 and 49 are arranged through the insulation layers 33, 34, 35, via which the external contacts 5 are connected to the different conductor layers 29, 30, 31, 32.
- the outermost conductor layer 29 is designed such that it has conduction paths 24 on rubber-elastic bodies 23 up to the tips 36 of the elastic external contacts 5.
- a solder material 37 can be applied to the elastic external contacts 5, which serves to connect to the next higher-order circuit arrangement.
- FIG. 4 shows a schematic cross section through a section of an electronic component 1 of a second embodiment of the invention.
- Components with the same functions as in the previous figures are identified by the same reference numerals and are not specifically explained.
- FIG. 5 shows a schematic diagram of a section of a cast column 21 with through wires 22 embedded in the longitudinal direction for a rewiring plate 4.
- Such a column 21 made of polycrystalline silicon or amorphous glass can be produced in a cylindrical shape, through which metallic wires 15 extend in the longitudinal direction. These metallic wires 15 can be arranged in a matrix with a predetermined pitch.
- the section of a cast column 21, shown in principle in FIG. 5, with through wires 22 embedded in the longitudinal direction is formed. Since the wires can be positioned very closely and themselves only a few micrometers in diameter can have the grid dimension for through contacts in a wiring carrier 6 with the help of this technology much smaller than a grid dimension that is produced by introducing through holes through a wiring carrier 6.
- the wire material is a chrome-vanadium-steel wire or a chrome-nickel steel wire if the insulation plate has an amorphous glass that has melting temperatures between 900 to 1200 ° C. or a chrome Molybdenum steel wire that can also withstand melting temperatures of polysilicon that start at 1410 ° C.
- the wires 15 are roughly roughened on their surface and thus offer a secure hold both in glass and in silicon. Since silicon is a semiconductor, the insulation values are lower than for glass, so a typical value for wire-to-wire insulation is 10 M ⁇ . If the insulation values of the silicon are not sufficient for special applications, insulated wires are used. These wires are then coated with an insulation layer made of silicon carbite, silicon nitrite, boron nitride or silicon oxide.
- carbon fibers or graphite fibers can also be used as through contacts.
- the advantage of these materials is that they can withstand much higher melting temperatures and have a naturally rough surface.
- FIG. 6 shows a schematic diagram of an insulation plate 50 with embedded wires 15 as through contacts 13.
- Components with the same functions as in the previous figures are identified by the same reference numerals and are not specifically explained.
- the insulation plate 50 has a thickness d between 50 and 500 ⁇ m and forms the wiring carrier 6.
- the metallic wires 15 are arranged in a matrix and penetrate the entire thickness d of the insulation plate 50. It is thus possible to cover the top 11 with the bottom of the Isolation plate 50 electrically and selectively connect.
- FIG. 7 shows a schematic cross section of an insulation plate 50 with embedded wires 15 as through contacts 13. Components with the same functions as in the previous figures are identified by the same reference numerals and are not specifically explained.
- This cross section through the insulation plate 50 shows on the one hand the rough surface of the metallic wires 15, which have been provided with an external roughness for this purpose by etching measures in order to achieve a positive fit with the material of the insulation plate 50.
- the wires 15 extend as through contacts 13 from the top 11 to the bottom 12 of the insulation plate 50 and, due to their rough surface, are positively interlocked with the material of the insulation plate 50 made of polycrystalline silicon or of an amorphous glass.
- FIG. 8 shows a schematic cross section of an insulation plate 50 with embedded wires 15 and a multilayer rewiring pattern 7 applied on one side.
- Components with the same functions as in the previous figures are identified by the same reference symbols and are not explained separately.
- FIG. 9 shows a bottom view of an insulation plate with embedded through contacts 13.
- These through contacts 13 are arranged at regular intervals according to a predetermined grid size in rows and columns.
- An alternative method of producing such through contacts 13 in an insulation plate made of silicon or amorphous glass is to first introduce a matrix of through holes into the insulation plate in a predetermined grid dimension. These through holes can then be filled with metal to make vias.
- Such through holes can be made both in a silicon wafer and in a glass plate or in a metal plate with a water jet which contains abrasive additives. As soon as the abrasive sand supply in the water jet fails for a short time, both the brittle silicon and the brittle glass plate shatters. With such a water jet drilling through abrasive additives, hole diameters between 0.3 mm and 0.5 mm can be produced, which also corresponds approximately to the dimensions of the external contacts. Much larger diameters are not a problem, but much smaller minimum diameters are due to the shape of the geometry of a focusing tube that is used for water jet drilling. The wear on the focusing tube also has a direct effect on the hole diameter.
- silicon wafers with 28,000 holes can be processed successfully in 14,000 seconds.
- FIG. 10 shows a perspective schematic diagram for embedding short wires 53 in a flat glass melt 56.
- Components with the same functions as in the previous ones Figures are identified by the same reference numerals and are not specifically explained.
- a flat glass melt 56 is drawn in a flat glass production line 57 on a molten metal mass in the direction of arrow A. Even before the flat glass melt 56 solidifies into a rigid flat glass 52, short wires 53 are introduced into the flat glass melt 56 in rows and columns.
- a guide frame 70 is arranged above the flat glass bed 54, which has guide rails 71 on both sides of the flat glass bed 54, in which cross members 55 are guided. These cross members 55 carry short wires 53 and are inserted above the flat glass melt 56 in the guide frame 70.
- Corresponding wire lengths for short wires 53 are unwound from wire spools 72 and held by the cross member 55, after which the metallic wires 15 of the wire spools 72 are cut off to short wires 53.
- the cross member 55 which keeps the short wires 53 equidistant, is guided in the guide frame 70 to the guide rails 71, the short wires 53 protruding from the cross member 55 immersing and penetrating the glass melt 56, after which they are first electrically heated.
- the insertion of the short wires 53 into the flat glass melt 56 takes place in such a way that a dense packing 73 of cross members is formed before the flat glass melt 56 solidifies, so that the equidistantly arranged short wires 53 in the flat glass 52 form a matrix of through wires through the flat glass, which are arranged in rows and columns are arranged.
- the cross members 55 can be removed one after the other from the short wires 53 and the like Guide frame 70 can be supplied for refitting with short wires.
- the short wires 53 remain in the flat glass 52.
- the ends of the short wires 53 protruding from the flat glass 52 are then etched away, so that a matrix of through contacts 13 remains in the solidified flat glass.
- Such flat glass plates can have a width of several meters, so that the flat glass 52 with the matrix of through contacts 13 can subsequently be separated into wiring carriers for several components. With the flat glass production line shown in FIG. 10, a large number of large-area wiring carriers can thus be produced inexpensively.
- the wire material used consists of glass melting materials that do not trigger any internal stresses during the solidification process of the glass. They can be made of chrome-nickel steel, chrome-vanadium steel, chrome-molybdenum steel or an alloy of copper and molybdenum. These metal alloys can be adapted to the flat glass material with their expansion behavior.
- the surface quality of the flat glass 52 can be increased by polishing the individual wiring carriers to such an extent that thin-film techniques can be used to apply a rewiring pattern.
- the cross member 55 of 3000 wire coils 72 are supplied with metallic wires 15 when equipping the cross member 55.
- the wires 15 can be pinched, cut off or cut off to short wires 53.
- the mobile guide in the form of cross members 45 is guided with the flat glass melt on the guide rails 71. In doing so, the drawing speed becomes uniform movement of the mobile guides in the direction A adapted before the solidification of the flat glass 52 and after the immersion of the short wires 53 in the flat glass melt 56.
- they When loading the cross members or the mobile guides, they must be stopped for a short time before they join the sealed packing 73 of the mobile feeders in the form of cross members 55.
- FIG. 11 shows a schematic cross section through an electronic component 1 with a wiring support 6 made of metal.
- Components with the same functions as in the previous figures are identified by the same reference numerals and are not specifically explained.
- the embodiment according to FIG. 11 differs from the embodiments as shown in the previous figures essentially in that the wiring carrier is a metal and not a non-metal.
- the reference number 59 thus designates a metal plate.
- This metal plate 59 is isolated from the rewiring pattern 7 by an additional insulation layer 51.
- both the elastic external contacts 5 and the semiconductor chips 2 are arranged on the same upper side of the rewiring plate 4 that bears the rewiring pattern 7.
- the dash-dotted line 65 denotes the upper limit of a printed circuit board 17 which has a higher-level circuit and on which the electronic component 1 is to be arranged.
- the semiconductor chip 25 forms a stopper, so that the height of the elastic external contact 5 and the contact pressure on the elastic external contact 5 is limited when it is applied to the contact connection surface 27 of the printed circuit board 17.
- the advantage of a metallic wiring carrier lies on the one hand in the high strength of such a metal plate 59 and on the other hand in the possibility of precisely adapting the thermal expansion behavior of the metal plate 59 to the expansion behavior of the semiconductor chip 2.
- Metal plates made of INVAR alloys which have nickel / iron alloys have proven successful for this purpose, the Ni / Fe mixing ratio determining the coefficient of expansion.
- the expansion coefficient of this alloy can be set between 1 and 10 ppm / ° K.
- An expansion coefficient for the metal plate 60 is selected which is equal to or greater than the expansion coefficient of the semiconductor chip material, the expansion coefficient of the INVAR alloy should not exceed 1.5 times the expansion coefficient of the semiconductor chip.
- PERNIFER is composed of nickel with 41% by weight, magnesium with 0.6% by weight, silicon with 0.15% by weight and carbon with 0.005% by weight, the rest of which are composed of Iron exists.
- metal plates as wiring carriers have the advantage that their surfaces can be polished precisely, so that the roughness is in the submicron range and the deflection can be less than 100 ⁇ m, a thickness tolerance of approximately 10 ⁇ m being achievable.
- This surface quality and deflection and thickness tolerances can also be achieved with wiring carriers made of amorphous glass or polycrystalline silicon, but not with glass fiber-reinforced circuit boards.
- the metal plate 59 in this embodiment of the invention can also consist of an alloy of molybdenum and copper, 70% by weight of molybdenum and 30% by weight of copper being contained in the alloy.
- the metal plate can also contain an alloy of tungsten and copper, the copper content being able to be varied between 10 to 40% by weight and the expansion coefficients which can be achieved being in the range of 6 ppm / ° C.
- FIGS. 12 to 17 show schematic results of method steps for producing a rewiring plate 4 with through contacts 13 through a metal wiring carrier 6.
- Components with the same functions as in the previous figures are identified by the same reference numerals and are not specifically explained.
- FIG. 12 shows a schematic cross section of the rewiring plate 4 with rewiring pattern 7 on a metal plate 59.
- This metal plate 59 has the same metal alloys which are matched to the semiconductor chip in terms of thermal expansion behavior, as have already been discussed for FIG.
- the redistribution plate 4 based on a metal plate 59 with a redistribution pattern 7 does not show a closed insulation layer 51, but rather a structured insulation layer 51 which has metallic through contacts 58 to the metal plate 59.
- the multilayer conductor track pattern of the rewiring pattern 7 is otherwise constructed exactly as in FIG. 11.
- FIG. 13 shows a schematic cross section of the rewiring plate 4 with an etching mask 47 and an etched through hole 14 for a via connection.
- the etching mask 67 made of photoresist has a through opening 74 which is on the side 60 of the metal plate 59 opposite the via 58 in the structured insulation layer 51.
- a through hole 14 is etched into the metal plate 59 and the via 58 is thus exposed.
- the via 58 can have a coating that triggers an etching stop on the surface of the via 58 for the etching solution that penetrates through the through opening 74.
- FIG. 14 shows a schematic cross section of the rewiring plate 4 of FIG. 13 after the etching mask has been removed.
- the etching mask can be removed by appropriate ashing in a plasma oven or by detaching in a solution bath. After the mask 67 has been removed, the via 58 can be accessed.
- FIG. 15 shows a schematic cross section of the rewiring plate 4 after a structured insulation layer 61 has been applied.
- This insulation layer 61 is structured in such a way that the surface of the via 58 in the through hole 14 remains free of the insulation layer 61.
- FIG. 16 shows a schematic cross section of the rewiring plate 4 after application of an elastic body 23 for an external contact 5.
- This elastic body 53 made of rubber-elastic material can be in the immediate vicinity of the through hole 14 on the insulation layer 61 on the Rewiring pattern 7 opposite side 16 of the metal plate 59 may be arranged.
- FIG. 17 shows a cross section of the rewiring plate 4 after applying a structured metal layer 62 to form elastic external contacts 5.
- the structuring of the initially applied, closed metal layer to form a structured metal layer 62 can be carried out by projection photolithography.
- a via line 63 is formed, which is completely insulated from the metal plate 59 by the insulation layer 61.
- the via line 63 is followed by a line path 24, which is formed on the elastic body 23 and merges into the external contact 5 on the tip 36 of the elastic body 23.
- the semiconductor chip 2 using flip-chip technology with its flip-chip contacts 3 can be attached to the microscopic contact pads 8 on the rewiring pattern 7.
- the electronic component created in this way has all the advantages that the wiring carrier 6 according to the invention offers.
- this electronic component 1 can be applied to a printed circuit board 17, the surface of which is indicated by the dashed line 65, the elastic external contacts 5 being connected to contact connection surfaces 27 of the printed circuit board 17.
- the through holes 14 are reached through a metal plate using wet etching technology, much smaller through holes can be produced if dry etching is carried out using a reactive plasma instead of wet etching.
- the diameter of the through hole 14 can be limited to the diameter of the via 58. This means that much higher external contact densities can be achieved.
- FIG. 18 shows a schematic cross section through an electronic component 1 of the second embodiment of the invention.
- Components with the same functions as in the previous figures are identified by the same reference numerals and are not specifically explained.
- the semiconductor chip 2 is arranged on one side of the rewiring plate 4 and the elastic external contacts 5 are arranged on the other side or opposite side of the rewiring plate 4.
- a multilayer rewiring layer 7 distributes the microscopic contact connection areas 8 under each of the semiconductor chips 2 over the entire area of a wiring substrate 6, which has a multiplicity of through contacts 13, which were introduced using one of the techniques specified above.
- the elastic external contacts 5 are arranged, which are electrically connected to at least one of the through contacts 13 via contact surfaces 9 and / or additional conductor tracks.
- This embodiment of the invention makes it possible to accommodate significantly more external contacts 5 on the same area than in the first embodiment.
- a number of rigid solder balls 18 can serve as a stopper, which simultaneously fulfill an electrical connection function. These stoppers 18 limit the height to which the elastic external contacts 5 are pressed together during assembly on a printed circuit board 17. Furthermore fix the in Rigid external contacts 18 arranged in the center of the electronic component as a stopper center the electronic component 1 relative to the circuit arrangement on the printed circuit board 17.
- FIG. 19 shows a schematic cross section through an electronic vertically stacked component 68.
- Components with the same functions as in the previous figures are identified by the same reference numerals and are not specifically explained.
- the stacked component 68 has a plurality of electronic components arranged one above the other, which have 6 through contacts 13 in their wiring carriers.
- the individual electronic components 1, from which the stacked electronic component 68 is made have additional external contact surfaces 9 on the side of the rewiring plate, on which corresponding elastic external contacts 5 of the next higher electronic component 1 can be arranged and electrically connected.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Wire Bonding (AREA)
Abstract
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP03745749A EP1493188A2 (de) | 2002-04-09 | 2003-04-08 | Elektronisches bauteil mit mindestens einem halbleiterchip und flip-chip-kontakten sowie verfahren zu seiner herstellung |
US10/960,994 US7176131B2 (en) | 2002-04-09 | 2004-10-12 | Electronic component having at least one semiconductor chip and flip-chip contacts, and method for producing the same |
US11/619,086 US20070102826A1 (en) | 2002-04-09 | 2007-01-02 | Electronic Component Having at Least One Semiconductor Chip and Flip-Chip Contacts, and Method for Producing the Same |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10215654.9 | 2002-04-09 | ||
DE10215654A DE10215654A1 (de) | 2002-04-09 | 2002-04-09 | Elektronisches Bauteil mit mindestens einem Halbleiterchip und Flip-Chip-Kontakten sowie Verfahren zu seiner Herstellung |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/960,994 Continuation US7176131B2 (en) | 2002-04-09 | 2004-10-12 | Electronic component having at least one semiconductor chip and flip-chip contacts, and method for producing the same |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2003085703A2 true WO2003085703A2 (de) | 2003-10-16 |
WO2003085703A3 WO2003085703A3 (de) | 2004-04-22 |
Family
ID=28684871
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/DE2003/001150 WO2003085703A2 (de) | 2002-04-09 | 2003-04-08 | Elektronisches bauteil mit mindestens einem halbleiterchip und flip-chip-kontakten sowie verfahren zu seiner herstellung |
Country Status (4)
Country | Link |
---|---|
US (2) | US7176131B2 (de) |
EP (1) | EP1493188A2 (de) |
DE (1) | DE10215654A1 (de) |
WO (1) | WO2003085703A2 (de) |
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Also Published As
Publication number | Publication date |
---|---|
US20070102826A1 (en) | 2007-05-10 |
US7176131B2 (en) | 2007-02-13 |
US20050110162A1 (en) | 2005-05-26 |
EP1493188A2 (de) | 2005-01-05 |
DE10215654A1 (de) | 2003-11-06 |
WO2003085703A3 (de) | 2004-04-22 |
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