WO2003046725A1 - Appareil de mise au point de logique de micro-ordinateur - Google Patents

Appareil de mise au point de logique de micro-ordinateur Download PDF

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Publication number
WO2003046725A1
WO2003046725A1 PCT/JP2002/012563 JP0212563W WO03046725A1 WO 2003046725 A1 WO2003046725 A1 WO 2003046725A1 JP 0212563 W JP0212563 W JP 0212563W WO 03046725 A1 WO03046725 A1 WO 03046725A1
Authority
WO
WIPO (PCT)
Prior art keywords
microcomputer
board
advanced
cpu
logics
Prior art date
Application number
PCT/JP2002/012563
Other languages
English (en)
French (fr)
Inventor
Takashi Higuchi
Shougo Imada
Toshihiro Kashiwabara
Original Assignee
Fujitsu Ten Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2001367496A external-priority patent/JP3827565B2/ja
Priority claimed from JP2002167711A external-priority patent/JP3827615B2/ja
Application filed by Fujitsu Ten Limited filed Critical Fujitsu Ten Limited
Priority to EP02783718A priority Critical patent/EP1452968A4/en
Priority to KR1020037009983A priority patent/KR100606946B1/ko
Publication of WO2003046725A1 publication Critical patent/WO2003046725A1/ja
Priority to US10/631,620 priority patent/US7283946B2/en
Priority to US11/707,974 priority patent/US7650274B2/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/177—Initialisation or configuration control
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/33—Design verification, e.g. functional simulation or model checking
    • G06F30/3308—Design verification, e.g. functional simulation or model checking using simulation
    • G06F30/331—Design verification, e.g. functional simulation or model checking using simulation with hardware acceleration, e.g. by using field programmable gate array [FPGA] or emulation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/261—Functional testing by simulating additional hardware, e.g. fault simulation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/33—Design verification, e.g. functional simulation or model checking

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • Quality & Reliability (AREA)
  • Software Systems (AREA)
  • Debugging And Monitoring (AREA)
  • Microcomputers (AREA)
  • Combined Controls Of Internal Combustion Engines (AREA)
PCT/JP2002/012563 2001-11-30 2002-11-29 Appareil de mise au point de logique de micro-ordinateur WO2003046725A1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
EP02783718A EP1452968A4 (en) 2001-11-30 2002-11-29 DEVELOPMENT DEVICE FOR MICROCOMPUTER LOGIC
KR1020037009983A KR100606946B1 (ko) 2001-11-30 2002-11-29 마이크로 컴퓨터의 로직 개발 장치
US10/631,620 US7283946B2 (en) 2001-11-30 2003-07-30 Microcomputer logic development system
US11/707,974 US7650274B2 (en) 2001-11-30 2007-02-15 Microcomputer logic development system

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2001367496A JP3827565B2 (ja) 2001-11-30 2001-11-30 マイコンのロジック開発装置
JP2001-367496 2001-11-30
JP2002-167711 2002-06-07
JP2002167711A JP3827615B2 (ja) 2002-06-07 2002-06-07 マイコンのロジック開発装置及び開発方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US10/631,620 Continuation US7283946B2 (en) 2001-11-30 2003-07-30 Microcomputer logic development system

Publications (1)

Publication Number Publication Date
WO2003046725A1 true WO2003046725A1 (fr) 2003-06-05

Family

ID=26624811

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2002/012563 WO2003046725A1 (fr) 2001-11-30 2002-11-29 Appareil de mise au point de logique de micro-ordinateur

Country Status (5)

Country Link
US (2) US7283946B2 (ja)
EP (1) EP1452968A4 (ja)
KR (1) KR100606946B1 (ja)
CN (1) CN100395715C (ja)
WO (1) WO2003046725A1 (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7162389B2 (en) 2003-12-01 2007-01-09 Fujitsu-Ten Limited Evaluation device for control unit, simulator, and evaluation system
US7650274B2 (en) 2001-11-30 2010-01-19 Fujitsu Ten Limited Microcomputer logic development system
CN108304344A (zh) * 2017-01-12 2018-07-20 罗伯特·博世有限公司 计算单元及其运行方法

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JP2003280902A (ja) * 2002-03-25 2003-10-03 Fujitsu Ten Ltd マイコンロジック開発システム及びそのプログラム
JP4282390B2 (ja) * 2003-07-04 2009-06-17 富士通テン株式会社 マイコンのロジック開発装置
DE102005025520A1 (de) * 2005-06-03 2006-12-07 Robert Bosch Gmbh Verfahren zur modellbasierten Diagnose eines mechatronischen Systems
JP4662474B2 (ja) 2006-02-10 2011-03-30 ルネサスエレクトロニクス株式会社 データ処理デバイス
JPWO2008099931A1 (ja) * 2007-02-15 2010-05-27 富士通テン株式会社 マイクロコンピュータの模擬装置
JP4843554B2 (ja) * 2007-05-11 2011-12-21 株式会社東芝 インターフェイスボード、シミュレータ、同期方法、同期プログラム
JP2008282314A (ja) * 2007-05-14 2008-11-20 Toshiba Corp シミュレータ、シミュレーション方法
US7912619B2 (en) * 2008-04-30 2011-03-22 Mtu Aero Engines Gmbh Engine regulation system and method for qualifying the components of the engine regulation system
US9251308B2 (en) 2012-07-23 2016-02-02 International Business Machines Corporation Simulation method, system, and program
JP7141942B2 (ja) * 2018-12-18 2022-09-26 ルネサスエレクトロニクス株式会社 半導体装置および電子制御装置
KR102194291B1 (ko) * 2019-04-04 2020-12-22 (주)대한엔지니어링 객관적 성능 검증이 가능한 레이콘 및 그 레이콘의 구동 방법
CN111782367B (zh) * 2020-06-30 2023-08-08 北京百度网讯科技有限公司 分布式存储方法及装置、电子设备、计算机可读介质
CN112398374B (zh) * 2020-10-16 2022-11-15 北京国科环宇科技股份有限公司 一种三相无刷直流电机的控制系统及其控制方法

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WO2000057273A1 (en) * 1999-03-19 2000-09-28 Korea Advanced Institute Of Science And Technology Vlsi emulator comprising processors and reconfigurable circuits
EP1202193A2 (en) * 2000-10-28 2002-05-02 Dynalith Systems Co., Ltd Apparatus and method for verifying a logic function of a semiconductor chip

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EP0082001A1 (en) 1981-12-16 1983-06-22 General Engineering Radcliffe 1979 Limited Apparatus for and a method of metallising a length of material
JPS62190542A (ja) * 1986-02-18 1987-08-20 Nec Corp シミユレ−タによる入出力処理装置検査方式
JPH0285934A (ja) * 1988-09-22 1990-03-27 Hitachi Micro Comput Eng Ltd エミュレータ
US5838948A (en) * 1995-12-01 1998-11-17 Eagle Design Automation, Inc. System and method for simulation of computer systems combining hardware and software interaction
JP2000067030A (ja) * 1998-08-25 2000-03-03 Mitsubishi Electric Corp 分散シミュレーション装置
JP2000215191A (ja) * 1999-01-26 2000-08-04 Mitsubishi Electric Corp 分散シミュレ―ション制御装置
WO2000057273A1 (en) * 1999-03-19 2000-09-28 Korea Advanced Institute Of Science And Technology Vlsi emulator comprising processors and reconfigurable circuits
EP1202193A2 (en) * 2000-10-28 2002-05-02 Dynalith Systems Co., Ltd Apparatus and method for verifying a logic function of a semiconductor chip

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7650274B2 (en) 2001-11-30 2010-01-19 Fujitsu Ten Limited Microcomputer logic development system
US7162389B2 (en) 2003-12-01 2007-01-09 Fujitsu-Ten Limited Evaluation device for control unit, simulator, and evaluation system
CN108304344A (zh) * 2017-01-12 2018-07-20 罗伯特·博世有限公司 计算单元及其运行方法
CN108304344B (zh) * 2017-01-12 2023-09-26 罗伯特·博世有限公司 计算单元及其运行方法

Also Published As

Publication number Publication date
US7650274B2 (en) 2010-01-19
EP1452968A1 (en) 2004-09-01
US20040031003A1 (en) 2004-02-12
KR20030074752A (ko) 2003-09-19
US20070143091A1 (en) 2007-06-21
US7283946B2 (en) 2007-10-16
CN100395715C (zh) 2008-06-18
CN1529854A (zh) 2004-09-15
KR100606946B1 (ko) 2006-08-01
EP1452968A4 (en) 2010-03-03

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