WO2002082460A1 - Dispositif de stockage non volatile a semi-conducteurs - Google Patents

Dispositif de stockage non volatile a semi-conducteurs Download PDF

Info

Publication number
WO2002082460A1
WO2002082460A1 PCT/JP2001/002856 JP0102856W WO02082460A1 WO 2002082460 A1 WO2002082460 A1 WO 2002082460A1 JP 0102856 W JP0102856 W JP 0102856W WO 02082460 A1 WO02082460 A1 WO 02082460A1
Authority
WO
WIPO (PCT)
Prior art keywords
bit line
storage device
memory cell
amplifying transistor
volatile storage
Prior art date
Application number
PCT/JP2001/002856
Other languages
English (en)
French (fr)
Inventor
Nozomu Matsuzaki
Hideaki Kurata
Takayuki Kawahara
Original Assignee
Hitachi, Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi, Ltd. filed Critical Hitachi, Ltd.
Priority to JP2002580340A priority Critical patent/JPWO2002082460A1/ja
Priority to US10/473,817 priority patent/US6944056B2/en
Priority to PCT/JP2001/002856 priority patent/WO2002082460A1/ja
Publication of WO2002082460A1 publication Critical patent/WO2002082460A1/ja
Priority to US11/156,538 priority patent/US7180793B2/en

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/24Bit-line control circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/26Sensing or reading circuits; Data output circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/26Sensing or reading circuits; Data output circuits
    • G11C16/28Sensing or reading circuits; Data output circuits using differential sensing or reference cells, e.g. dummy cells
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/065Differential amplifiers of latching type
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/067Single-ended amplifiers
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/18Bit line organisation; Bit line lay-out
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0207Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/002Isolation gates, i.e. gates coupling bit lines to the sense amplifier
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Read Only Memory (AREA)
  • Static Random-Access Memory (AREA)
PCT/JP2001/002856 2001-04-02 2001-04-02 Dispositif de stockage non volatile a semi-conducteurs WO2002082460A1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2002580340A JPWO2002082460A1 (ja) 2001-04-02 2001-04-02 半導体不揮発性記憶装置
US10/473,817 US6944056B2 (en) 2001-04-02 2001-04-02 Semiconductor non-volatile storage device
PCT/JP2001/002856 WO2002082460A1 (fr) 2001-04-02 2001-04-02 Dispositif de stockage non volatile a semi-conducteurs
US11/156,538 US7180793B2 (en) 2001-04-02 2005-06-21 Semiconductor non-volatile storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2001/002856 WO2002082460A1 (fr) 2001-04-02 2001-04-02 Dispositif de stockage non volatile a semi-conducteurs

Related Child Applications (2)

Application Number Title Priority Date Filing Date
US10473817 A-371-Of-International 2001-04-02
US11/156,538 Continuation US7180793B2 (en) 2001-04-02 2005-06-21 Semiconductor non-volatile storage device

Publications (1)

Publication Number Publication Date
WO2002082460A1 true WO2002082460A1 (fr) 2002-10-17

Family

ID=11737216

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2001/002856 WO2002082460A1 (fr) 2001-04-02 2001-04-02 Dispositif de stockage non volatile a semi-conducteurs

Country Status (3)

Country Link
US (2) US6944056B2 (ja)
JP (1) JPWO2002082460A1 (ja)
WO (1) WO2002082460A1 (ja)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006302436A (ja) * 2005-04-22 2006-11-02 Matsushita Electric Ind Co Ltd 半導体記憶装置
EP2381450A1 (en) 2010-04-16 2011-10-26 Fujitsu Semiconductor Limited Semiconductor memory
JP2012238377A (ja) * 2006-01-06 2012-12-06 Nec Corp 半導体記憶装置
JP2014532953A (ja) * 2011-11-01 2014-12-08 シリコン ストーリッジ テクノロージー インコーポレイテッドSilicon Storage Technology, Inc. 省電力混合電圧不揮発性メモリ集積回路

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2423558A1 (en) * 2000-10-03 2002-04-11 Penwest Pharmaceuticals Company Delivery system for multi-pharmaceutical active materials at various release rates
JPWO2002082460A1 (ja) * 2001-04-02 2004-07-29 株式会社日立製作所 半導体不揮発性記憶装置
KR100487918B1 (ko) * 2002-08-30 2005-05-09 주식회사 하이닉스반도체 불휘발성 강유전체 메모리 장치
JP3759924B2 (ja) * 2002-11-21 2006-03-29 松下電器産業株式会社 半導体装置
KR100560801B1 (ko) * 2003-11-24 2006-03-13 삼성전자주식회사 플래시 메모리 장치
JP4170952B2 (ja) 2004-01-30 2008-10-22 株式会社東芝 半導体記憶装置
KR100604857B1 (ko) * 2004-05-27 2006-07-26 삼성전자주식회사 바이트 단위로 소거되는 이이피롬 소자 및 그 제조방법
JP4649260B2 (ja) * 2005-04-13 2011-03-09 パナソニック株式会社 半導体記憶装置
KR100919433B1 (ko) * 2006-06-29 2009-09-29 삼성전자주식회사 비휘발성 메모리 소자 및 그 제조 방법
US7426127B2 (en) * 2006-12-21 2008-09-16 Intel Corporation Full-rail, dual-supply global bitline accelerator CAM circuit
US20120038597A1 (en) * 2010-08-10 2012-02-16 Coulson Michael P Pre-programming of in-pixel non-volatile memory
KR102463921B1 (ko) * 2016-02-19 2022-11-07 에스케이하이닉스 주식회사 넓은 동작 영역을 갖는 불휘발성 메모리 소자

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2576510B2 (ja) * 1986-11-14 1997-01-29 セイコーエプソン株式会社 半導体記憶装置
JPH1187660A (ja) * 1997-09-05 1999-03-30 Mitsubishi Electric Corp 不揮発性半導体記憶装置
JPH1196784A (ja) * 1997-09-24 1999-04-09 Mitsubishi Electric Corp 読み出し専用メモリ

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0567791A (ja) 1991-06-20 1993-03-19 Mitsubishi Electric Corp 電気的に書込および消去可能な半導体記憶装置およびその製造方法
US5675529A (en) * 1995-07-07 1997-10-07 Sun Microsystems, Inc. Fast access memory array
JP3372158B2 (ja) 1996-02-09 2003-01-27 株式会社東芝 半導体装置及びその製造方法
US5754469A (en) * 1996-06-14 1998-05-19 Macronix International Co., Ltd. Page mode floating gate memory device storing multiple bits per cell
JPH10228766A (ja) * 1997-02-17 1998-08-25 Hitachi Ltd マイクロコンピュータ
US5748545A (en) * 1997-04-03 1998-05-05 Aplus Integrated Circuits, Inc. Memory device with on-chip manufacturing and memory cell defect detection capability
JPH118324A (ja) * 1997-04-23 1999-01-12 Sanyo Electric Co Ltd トランジスタ、トランジスタアレイおよび不揮発性半導体メモリ
JPH11243185A (ja) * 1997-12-24 1999-09-07 Sanyo Electric Co Ltd 不揮発性半導体メモリ
FR2784219B1 (fr) * 1998-09-16 2001-11-02 St Microelectronics Sa Architecture de circuit memoire
US6262914B1 (en) * 1999-08-11 2001-07-17 Texas Instruments Incorporated Flash memory segmentation
US6310809B1 (en) * 2000-08-25 2001-10-30 Micron Technology, Inc. Adjustable pre-charge in a memory
US6507525B1 (en) * 2000-08-25 2003-01-14 Micron Technology, Inc. Differential sensing in a memory
US6426905B1 (en) * 2001-02-07 2002-07-30 International Business Machines Corporation High speed DRAM local bit line sense amplifier
JPWO2002082460A1 (ja) * 2001-04-02 2004-07-29 株式会社日立製作所 半導体不揮発性記憶装置
JP3573341B2 (ja) * 2001-05-09 2004-10-06 松下電器産業株式会社 半導体記憶装置
JP2003077282A (ja) * 2001-08-31 2003-03-14 Fujitsu Ltd 不揮発性半導体記憶装置
JP2003123493A (ja) * 2001-10-12 2003-04-25 Fujitsu Ltd ソース電位を制御してプログラム動作を最適化した不揮発性メモリ
KR100423894B1 (ko) * 2002-05-09 2004-03-22 삼성전자주식회사 저전압 반도체 메모리 장치

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2576510B2 (ja) * 1986-11-14 1997-01-29 セイコーエプソン株式会社 半導体記憶装置
JPH1187660A (ja) * 1997-09-05 1999-03-30 Mitsubishi Electric Corp 不揮発性半導体記憶装置
JPH1196784A (ja) * 1997-09-24 1999-04-09 Mitsubishi Electric Corp 読み出し専用メモリ

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006302436A (ja) * 2005-04-22 2006-11-02 Matsushita Electric Ind Co Ltd 半導体記憶装置
JP2012238377A (ja) * 2006-01-06 2012-12-06 Nec Corp 半導体記憶装置
EP2381450A1 (en) 2010-04-16 2011-10-26 Fujitsu Semiconductor Limited Semiconductor memory
EP2466589A1 (en) 2010-04-16 2012-06-20 Fujitsu Semiconductor Limited Semiconductor memory
EP2466588A1 (en) 2010-04-16 2012-06-20 Fujitsu Semiconductor Limited Semiconductor memory
US8385128B2 (en) 2010-04-16 2013-02-26 Fujitsu Semiconductor Limited Semiconductor memory
US9224487B2 (en) 2010-04-16 2015-12-29 Cypress Semiconductor Corporation Semiconductor memory read and write access
JP2014532953A (ja) * 2011-11-01 2014-12-08 シリコン ストーリッジ テクノロージー インコーポレイテッドSilicon Storage Technology, Inc. 省電力混合電圧不揮発性メモリ集積回路
US9378838B2 (en) 2011-11-01 2016-06-28 Silicon Storage Technology, Inc. Mixed voltage non-volatile memory integrated circuit with power saving

Also Published As

Publication number Publication date
JPWO2002082460A1 (ja) 2004-07-29
US20050237805A1 (en) 2005-10-27
US7180793B2 (en) 2007-02-20
US6944056B2 (en) 2005-09-13
US20040140485A1 (en) 2004-07-22

Similar Documents

Publication Publication Date Title
WO2002082460A1 (fr) Dispositif de stockage non volatile a semi-conducteurs
CN1825732B (zh) 电源切换电路
US7262986B2 (en) Memory system and semiconductor integrated circuit
EP1298671A3 (en) Bit line control decoder circuit, virtual ground type nonvolatile semiconductor storage device provided with the decoder circuit, and data read method of virtual ground type nonvolatile semiconductor storage device
JP4673455B2 (ja) 電力散逸制御を有する集積回路
WO2007133646A3 (en) Adaptive storage system including hard disk drive with flash interface
WO2003044803A3 (en) Sense amplifier for multilevel non-volatile integrated memory devices
WO2004015711A3 (en) Low leakage asymmetric sram cell devices
CN1497605A (zh) 控制内部电源电压的加电斜率的内部电压转换器方案
US20120036315A1 (en) Morphing Memory Architecture
TW201203242A (en) Write energy conservation in memory
JP2006073165A5 (ja)
KR100586171B1 (ko) 시스템 온 칩에 임베드된 메모리의 워드라인 구동회로 및구동방법
TW200734879A (en) Enhanced first level storage cache using nonvolatile memory
WO2003046922A3 (de) Halbleiteranordnung mit transistoren auf basis organischer halbleiter und nichtflüchtiger schreib-lese-speicherzellen
TW200614239A (en) Semiconductor memory device for low power system
TWI256050B (en) Nonvolatile memory device using serial diode cell
TW200639871A (en) Semiconductor memory device
WO2004077446A8 (ja) 不揮発性半導体記憶装置
US7414898B2 (en) Semiconductor memory device with internal power supply
US6738305B1 (en) Standby mode circuit design for SRAM standby power reduction
KR970071793A (ko) 멀티레벨 스토리지 반도체 장치
WO2006063312A3 (en) Variable voltage supply bias and methods for negative differential resistance (ndr) based memory device
ATE414318T1 (de) Statische direktzugriffspeicherzelle (sram) und speichereinheit die diese enthält mit extrem niedrigem leistungsverbrauch
US20010014050A1 (en) Semiconductor memory device and bit line connecting method thereof

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): CN JP KR US

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE TR

DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
121 Ep: the epo has been informed by wipo that ep was designated in this application
WWE Wipo information: entry into national phase

Ref document number: 2002580340

Country of ref document: JP

WWE Wipo information: entry into national phase

Ref document number: 10473817

Country of ref document: US

122 Ep: pct application non-entry in european phase