Classifications

• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
  • H04N19/85—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression
  • H04N19/88—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression involving rearrangement of data among different coding units, e.g. shuffling, interleaving, scrambling or permutation of pixel data or permutation of transform coefficient data among different blocks
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
  • H04N19/85—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression
  • H04N19/89—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression involving methods or arrangements for detection of transmission errors at the decoder
  • H04N19/895—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression involving methods or arrangements for detection of transmission errors at the decoder in combination with error concealment

Definitions

• the present invention relates to an encoding process that provides a robust error recovery due to data losses incurred during transmission of signals. More particularly, the present invention relates to a data shuffling method used in facilitating a robust error recovery.
• HDTV high definition television
• VCRs video cassette recorders
• HDTV National Television Systems Committee
• NTSC National Television Systems Committee
• a color television signal is converted for digital use it is common that the luminance and c_ u-ominance signals may be digitized using eight bits.
• Digital transmission of NTSC color television signals may require a nominal bit rate of about two-hundred and sixteen megabits per second.
• the transmission rate is greater for HDTV, which may nominally require about 1200 megabits per second.
• Such high transmission rates may be well beyond the bandwidths supported by current wireless standards. Accordingly, an efficient compression methodology is required.
• Compression methodologies also play an important role in mobile telecommunication applications.
• packets of data are comrnunicated between remote terminals in mobile telecommunication applications.
• the limited number of transmission channels in mobile communications requires an effective compression methodology prior to the transmission of packets.
• a number of compression techniques are available to facilitate high transmission rates.
• ADRC Adaptive Dynamic Range Coding
• DCT Discrete Cosine Transform
• At least one compression parameter is used to define a pseudorandom sequence and the psedurandom sequence is used to shuffle the data BRIEF DESCRIPTION OF THE DRAWINGS
• Figure la illustrates an embodiment of the processes of signal encoding, transmission, and decoding.
• Figures lb and lc illustrate embodiments of signal encoding, transmission, and decoding implemented as software executed by a processor.
• Figures Id and le illustrate embodiments of circuits for shuffling and recovery of data.
• Figure 2 illustrates one embodiment of a packet structure.
• Figure 3 is a flow diagram illustrating one embodiment of the encoding process in accordance with the teachings of the present invention.
• Figure 4 is a flow diagram illustrating one embodiment of the decoding process in accordance with the teachings of the present invention.
• FIG. 5 illustrates one embodiment of image-to-block mapping in accordance with the teachings of the present invention.
• Figure 5a illustrates one embodiment of a shuffling pattern used in image-to-block mapping.
• Figure 6 is an illustration of exemplary complementary and interlocking block structures.
• Figures 7a, 7b, 7c, 7d illustrate one embodiment of shuffling patterns for Y blocks within a frame set.
• Figure 8 is an illustration of one embodiment of cumulative DR distribution for Buffer 0.
• Figure 8a is an illustration of one embodiment of a partial buffering process in accordance with the teachings of the present invention.
• Figure 9 illustrates one embodiment of the intra buffer YUV block shuffling process in accordance with the teachings of the present invention.
• FIG. 10 illustrates one embodiment of the intra group VL-data shuffling process in accordance with the teachings of the present invention.
• Figure 11 illustrates one embodiment of Qcode concatenation within a 3- block group in accordance with the teachings of the present invention.
• Figure 11a illustrates one embodiment of Qcode concatenation for frame pairs including motion blocks in accordance with the teachings of the present invention.
• Figure 12 illustrates one embodiment of pixel data error caused by a 1/6 burst error loss.
• Figure 12a illustrates one embodiment of shuffling Qcodes and distributing Qcode bits in accordance with the teachings of the present invention.
• Figure 12b illustrates one embodiment of pixel data error caused by a 1/6 burst error loss of redistributed Qcodes.
• Figure 12c illustrates one embodiment of pixel data error caused by a 1/6 burst error loss of reassigned Qcodes.
• Figure 12d illustrates one embodiment of a randomization process.
• Figures 12e, 12f, 12g and 12h are examples of randomization processes.
• Figure 13 illustrates one embodiment of MLN shuffling in accordance with the teachings of the present invention.
• Figure 13a illustrates one embodiment of Motion Flag shuffling and of a fixed length data loss in one frame pair.
• Figure 14 illustrates one embodiment of a modular shuffling.
• Figure 14a illustrates one embodiment of a modular shuffling result and the fixed length data loss associated with the modular shuffling.
• Figure 14b illustrates an alternate embodiment of a modular shuffling result and the fixed length data loss associated with the modular shuffling.
• Figure 14c illustrates an alternate embodiment of a modular shuffling result and the fixed length data loss associated with the modular shuffling.
• Figure 15 illustrates one embodiment of variable length data buffering in a frame set.
• FIG 16 illustrates one embodiment of inter segment VL-data shuffling in accordance with the teachings of the present invention.
• the present invention provides a system and method for the shuffling of a signal stream to provide for a robust error recovery.
• numerous details are set forth in order to provide a thorough understanding of the present invention. However, it will be apparent to one skilled in the art that these specific details are not required in order to practice the present invention. In other instances, well known electrical structures and circuits are shown m block diagram form in order not to obscure the present invention unnecessarily
• ADRC Adaptive Dynarruc Range Coding
• DR dynamic range
• MIN minimum value
• the present invention is not limited to ADRC encoding and the particular compression parameters generated; rather it will be apparent that the present invention is applicable to different compression technologies, different types of correlated data, including, but not limited to, sound data and the like, and different compression parameters, including, but not limited to, the number of bits used to encode data (Qbit), maximum value (MAX) and central value (CEN), which may be used in ADRC processes.
• Qbit the number of bits used to encode data
• MAX maximum value
• CEN central value
• ADRC Adaptive Dynamic Range Coding Scheme for Future HDTV Digital VTR
• Kondo Fujimori, Nakaya, Fourth International Workshop on HDTV and Beyond, September 4-6, 1991, Turm, Italy.
• ADRC has been established as a feasible real-tame technique for coding and compressing images in preparation for constant bit-rate transmission.
• MAX represents the maximum level of a block
• MIN represents the minimum level of a block
• x represents the signal level of each sample
• Q represents the number of quantization bits
• q represents the quantization code (encoded data)
• x' represents the decoded level of each sample
• the square brackets [J represent a truncation operation performed on the value within the square brackets.
• Signal 100 is a data stream input to Encoder 110.
• Encoder 110 follows the Adaptive Dynamic Range Coding ("ADRC") compression algorithm and generates Packets 1, . . . N for transmission along Transmission Media 135.
• Decoder 120 receives Packets 1, . . . N from Transmission Media 135 and generates Signal 130.
• Signal 130 is a reconstruction of Signal 100.
• ADRC Adaptive Dynamic Range Coding
• Encoder 110 and Decoder 120 can be implemented a variety of ways to perform the functionality described herein.
• Encoder 110 and /or Decoder 120 may be embodied as software stored on media and executed by a general purpose or specifically configured computer system, typically including a central processing unit, memory and one or more input /output devices and co-processors, as shown in Figures lb and lc.
• the Encoder 110 and/or Decoder 120 may be implemented as logic to perform the functionality described herein, as shown in Figures Id and le.
• Encoder 110 and/or Decoder 120 can be implemented as a combination of hardware, software or firmware.
• Embodiments of the circuits are shown in Figures lb and lc.
• the methods described herein may be implemented on a specially configured or general purpose processor system 170. Instructions are stored in memory 190 and accessed by processor 175 to perform many of the steps described herein.
• Input 180 receives the input bitstream and forwards the data to processor 175.
• Output 185 outputs the data.
• the output may consist of the encoded data.
• the output may consist of the decoded data, such as image data decoded according to the methods described, sufficient to drive an external device such as display 195.
• Signal 100 may be a color video image comprising a sequence of video frames, each frame including information representative of an image in an interlaced video system.
• Each frame is composed of two fields, wherein one field contains data of the even lines of the image and the other field containing the odd lines of the image.
• the data includes pixel values that describe the color components of a corresponding location in the image.
• the color components consist of the luminance signal Y, and color difference signals U, and V. It is readily apparent the process of the present invention can be applied to signals other than interlaced video signals. Furthermore, it is apparent that the present invention is not limited to implementations in the Y, U, V color space, but can be applied to images represented in other color spaces.
• Signal 100 may be, for example, two- dimensional static images, hologram images, three-dimensional static images, video, two-dimensional moving images, three dimensional moving images, monaural sound, or N-channel sound.
• Encoder 110 divides the Y, U, and V signals and processes each group of signals independently in accordance with the ADRC algorithm.
• the following description for purposes of simplifying the discussion, describes the processing of the Y signal; however, the encoding steps may be replicated for the U and V signals.
• Encoder 110 groups Y signals across two subsequent frames, referred to herein as a frame pair, of Signal 100 into three dimensional blocks ("3D") blocks.
• 3D three dimensional blocks
• a 3D block is generated from grouping two 2D blocks from the same localized area across a given frame pair, wherein a two dimensional 2D block is created by grouping localized pixels within a frame or a field. It is contemplated that the process described herein can be applied to different block structures. The grouping of signals will be further described in the image-to-block mapping section below.
• Encoder 110 calculates whether there is a change in pixel values between the 2D blocks forming the 3D block.
• a Motion Flag is set if there are substantial changes in values. As is known in the art, use of a Motion Flag allows Encoder 110 to reduce the number of quantization codes when there is localized image repetition within each frame pair.
• DR MAX - MIN.
• the encoder may also determine a central value (CEN) that has a value between MAX and MIN.
• Encoder 110 encodes signals on a frame by frame basis for a stream of frames representing a sequence of video frames. In another embodiment, Encoder 110 encodes signals on a field by field basis for a stream of fields representing a sequence of video fields. Accordingly, Motion Flags are not used and 2D blocks may be used to calculate the MIN, MAX, CEN and DR values.
• Encoder 110 references the calculated DR against a threshold table of DR threshold values and corresponding Qbit values to determine the number of quantization bits ("Qbits") used to encode pixels within the block corresponding to the DR. Encoding of a pixel results in a quantization code ("Qcode").
• the Qcodes are the relevant compressed image data used for storage or transmission purposes.
• the Qbit selection is derived from the DR of a 3D block. Accordingly, all pixels within a given 3D block are encoded using the same Qbit, resulting in a 3D encoded block.
• Motion Flag, and DR for a 3D encoded block is referred to as a 3D ADRC block.
• 2D blocks are encoded and the collection of Qcodes, MIN, and DR for a given 2D block results in 2D ADRC blocks.
• the MAX value and CEN value may be used in place of the MIN value.
• the threshold table consists of a row of DR threshold values.
• a Qbit corresponds to the number of quantization bits used to encode a range of DR values between two adjacent DRs within a row of the threshold table.
• the threshold table includes multiple rows and selection of a row depends on the desired transmission rate. Each row in the threshold table is identified by a threshold index.
• a detailed description of one embodiment of threshold selection is described below in the discussion of partial buffering.
• a further description of an example of ADRC encoding and buffering is disclosed in US Patent No. 4,722,003 entitled "High Efficiency Coding Apparatus" and US Patent No. 4,845,560 also entitled “High Efficiency Coding Apparatus ', assigned to the assignee of the present invention.
• variable length data (VL-data)
• DR variable length data
• MIN MIN
• MAX MAX
• CEN Motion Flag
• FL-data fixed length data
• block attribute describes a parameter associated with a component of a signal element, wherem a signal element includes multiple components.
• the FL-data includes a Qbit code.
• the advantage is that the Qbit information does not have to be derived from the DR durmg the decoding process. Thus, if the DR information is lost or damaged, the Qbit information can still be determined from the Qbit code. Furthermore, if the Qbit code is lost or damaged, the Qbit information can be derived from DR. Thus the requirement to recover the DR and Qbit is reduced.
• the disadvantage to mcludmg the Qbit code is the additional bits to be transmitted for each ADRC block.
• Qbit codes for groups of ADRC blocks are combined, for example, m accordance with a function such as addition or concatenation. For example, if ADRC blocks are grouped m threes and if the Qbit values for each ADRC block are respectively 3, 4 and 4, the summed value that is encoded into the FL-data is 11. Thus the number of bits required to represent the sum is less than the number of bits required to represent each individual value and undamaged Qbit values of the group can be used to determine the Qbit value without performing a Qbit recovery process such as the one described subsequently.
• Motion Flag data may also be encoded.
• a tag with Qbit and Motion Flag data can be generated and used to reference a table of codes. The configuration and function of the coding can vary accordmg to application.
• An advantage of not mcludmg the Qbit code value in the FL-data is that no additional bits are need be transmitted for each ADRC block.
• a disadvantage of not including the Qbit value is that, if the DR is lost or damaged during transmission or storage, the Qcodes cannot be easilv recovered. The ADRC decoder must determine how many bits were used to quantize the block without relying on any DR information.
• VL-data shuffling logic 144 One embodiment of a circuit for shuffling to provide for a robust error recovery is shown in Figure Id.
• An input signal is received and VL-data shuffling logic 144 generates randomized Qcodes based upon the encoded and /or shuffled data. It should be noted that the output from the VL-data shuffling logic 144 may be precoded or further encoded as discussed herein.
• Figure le illustrates an embodiment of a circuit for recovering lost or damaged values such as compression parameters.
• An input signal is received and VL-data deshuffling logic 150 derandomizes the Qcodes from the input bitstream and recovers lost or damaged constants.
• VL-data deshuffling logic 150 may be further decoded and/or deshuffled as described herein.
• a pseudorandom sequence may be generated by, stored in or otherwise accessed by the shuffling logic 144 and deshuffling logic 150.
• Frames, block attributes, and VL-data describe a variety of components within a video signal.
• the boundaries, location, and quantity of these components are dependent on the transmission and compression properties of a video signal.
• these components are varied and shuffled within a bitstream of the video signal to ensure a robust error recovery during transmission losses.
• a data set includes a partition of data of a video or other type of data signal.
• a frame set is a type of data set that includes one or more consecutive frames.
• a segment includes a memory with the capacity to store a one-sixth division of the Qcodes and block attributes included in a frame set.
• a buffer includes a memory with the capacity to store a one-sixtieth division of the Qcodes and block attributes included in a frame set.
• the shuffling of data is performed by interchanging components withm segments and /or buffers. Subsequently, the data stored in a segment is used to generate packets of data for transmission. Thus, in the following description if a segment is lost all the packets generated from the segment are lost during transmission. Similarly, if a fraction of a segment is lost then a corresponding number of packets generated from the segment are lost durmg transmission.
• Packet Structure 200 used for the transmission of the data across point-to-point connections as well as networks.
• Packet Structure 200 is generated by Encoder 110 and is transmitted across Transmission Media 135.
• Packet Structure 200 comprises five bytes of header information, eight DR bits, eight MIN bits, a Motion Flag bit, a five bit threshold index, and 354 bits of Qcodes.
• the MIN bits may be replaced with CEN bits.
• the packet structure described herein is illustrative and may typically be implemented for transmission in an asynchronous transfer mode (“ATM") network.
• ATM asynchronous transfer mode
• the present invention is not limited to the packet structure described and a variety of packet structures that are used in a variety of networks can be utilized.
• Transmission Media (e.g., media) 135 is not assumed to provide error-free transmission and therefore packets may be lost or damaged.
• the system and methods of the present invention provide multiple level shuffling.
• the FL-data and the VL-data included in a transmitted packet comprise data from spatially and temporally disjointed locations of an image.
• Shuffling data ensures that any burst error is scattered and facilitates error recovery.
• the shuffling allows recovery of block attributes and Qbit values.
• Figure 3 is a flow diagram illustrating one embodiment of the encoding process performed by Encoder 110. Figure 3 further describes an overview of the shuffling process used to ensure against image degradation and to facilitate a robust error recovery.
• an input frame set also referred to as a display component, is decimated to reduce the transmission requirements.
• the Y signal is decimated horizontally to three-quarters of its original width and the U and V signals are each decimated to one-half of their original height and one-half of their original width. This results in a 3:1:0 video format with 3960 Y blocks, 660
• U blocks and 660 V blocks in each frame pair As noted earlier, the discussion will describe the processing of Y signals; however, the process is applicable to the U and V signals.
• the two Y frame images are mapped to 3D blocks.
• 3D blocks are shuffled.
• ADRC buffering and encoding is used.
• encoded Y, U and V blocks are shuffled within a buffer.
• the VL-data for a group of encoded 3D blocks and their corresponding block attributes are shuffled.
• the FL-data is shuffled across different segments.
• post-amble filling is performed in which variable space at the end of a buffer is filled with a predetermined bitstream.
• the VL-data is shuffled across different segments.
• the following shuffling description provides a method for manipulation of pixel data before and after encoding.
• independent data values are shuffled /deshuffled via hardware.
• the hardware maps the address of block values to different addresses to implement the shuffling /deshuffling process.
• address mapping is not possible for data dependent values because shuffling has to follow the processing of data.
• the intra group VL-data shuffling described below includes the data dependent values.
• the following shuffling description occurs on discrete sets of data.
• a signal is defined based on multiple data levels ranging from bits, to pixels, and to frames. Shuffling is possible for each level defined in the signal and across different data levels of the signal.
• Figure 4 is a flow diagram illustrating one embodiment of decoding process performed by Decoder 120.
• the conversion and deshuffling processes may be the inverse of the processes represented in Figure 3.
• a single frame typically comprises 5280 2D blocks wherein each 2D block comprises 64 pixels.
• a frame pair comprises 5280 3D blocks as a 2D block from a first frame and a 2D block from a subsequent frame are collected to form a 3D block.
• Image-to-block mapping is performed for the purpose of dividing a frame or frame set of data into 2D blocks or 3D blocks respectively. Moreover, image- to-block mapping includes using a complementary and /or interlocking pattern to divide pixels in a frame to facilitate robust error recovery during transmission losses. However, to improve the probability that a given DR value is not too large, each 2D block is constructed from pixels in a localized area.
• Figure 5 illustrates one embodiment of an image-to-block mapping process for an exemplary 16 pixel section of an image.
• Image 500 comprises 16 pixels forming a localized area of a single frame.
• Each pixel in Image 500 is represented by an intensity value.
• the pixel in the top left hand side of the image has an intensity value equal to 100 whereas the pixel in the bottom right hand side of the image has an intensity value of 10.
• pixels from different areas of Image 500 are used to create 2D Blocks 510, 520, 530, and 540.
• 2D Blocks 510, 520, 530, and 540 are encoded, shuffled (as illustrated below), and transmitted. Subsequent to transmission, 2D Blocks 510, 520, 530, and 540 are recombined and used to form Image 550.
• Image 550 is a reconstruction of Image 500.
• Figure 5 is an interlocking complementary block structure, one embodiment of which is illustrated in Figure 5, is used to reconstruct Image 550.
• the pixel selection used to create 2D Blocks 510, 520, 530, and 540 ensures that a complementary and /or interlocking pattern is used to recombine the blocks when Image 550 is reconstructed. Accordingly, when a particular 2D block's attribute is lost during transmission, contiguous sections of Image 550 are not distorted during reconstruction. For example, as illustrated in Figure 5 the DR of 2D Block 540 is lost during data transmission.
• the decoder utilizes multiple neighboring pixels of neighboring blocks through which a DR can be recovered for the missing DR of 2D Block 540.
• the combination of complementary patterns and shifting increases the number of neighboring pixels, preferably maximizing the number of neighboring pixels that originate from other blocks, significantly improving DR and MIN recovery.
• Figure 5a illustrates one embodiment of a shuffling pattern used to form 2D blocks in one embodiment of the image-to-block mapping process. An image is decomposed into two sub-images, Sub-Image 560 and Sub-Image 570, based on alternating pixels. Rectangular shapes are formed in Sub-Image 560 to delineate the 2D block boundaries.
• Tile 565 illustrates the pixel distribution for a 2D block within Sub-Image 560.
• Sub-Image 570 the 2D block assignment is shifted by eight pixels horizontally and four pixels vertically. This results in a wrap around 2D block assignment and overlap when Sub-Images 560 and 570 are combined during reconstruction.
• the 2D blocks are numbered 1, 3, 5, 6, 8, 10, 13, 15, 17, 18, 20, and 22.
• Tile 575 illustrates the pixel distribution for a 2D block within Sub-Image 570.
• Tile 575 is the complementary structure of Tile 565.
• Figure 6 illustrates other complementary and interlocking 2D block structures. Other structures may also be utilized. Similar to Figure 5, these 2D block structures illustrated in Figure 6, ensure surrounding 2D blocks are present despite transmission losses for a given 2D block.
• Patterns 610a, 610b, and 610d use horizontal and/or vertical shifting during the mapping of pixels to subsequent 2D blocks.
• Horizontal shifting describes shifting the tile structure in the horizontal direction a predetermined number of pixels prior to beginning a new 2D block boundary.
• Vertical shifting describes shifting the tile structure in the vertical direction a predetermined number of pixels prior to beginning a new 2D block boundary. In application, horizontal shifting only may be applied, vertical shifting may only be applied, or a combination of horizontal and vertical shifting may be applied.
• Pattern 610a illustrates a spiral pattern used for image-to-block mapping.
• Patterns 610b and 610d illustrate complementary patterns wherein pixel selection is moved by a horizontal and vertical shifting to create subsequent 2D blocks during the image-to-block mapping process. Further, Patterns 610b and 610d illustrate alternating offsets on pixels selection between 2D blocks. Pattern 610c illustrates using an irregular sampling of pixels to create a 2D block for image-to-block mapping. Accordingly, the image-to-block mapping follows any mapping structure provided a pixel is mapped to a 2D block only once.
• Figure 5a and Figure 6 describe image-to-block mapping for 2D block generation. It is readily apparent that the processes are applicable to 3D blocks. As described above, 3D block generation follows the same boundary definition as a 2D block, however the boundary division extends across a subsequent frame resulting in a 3D block.
• a 3D block is created by collecting the pixels used to define a 2D block in a first frame together with pixels from a 2D block in a subsequent frame. In one embodiment, both pixels in the 2D block from the first frame and the 2D block from the subsequent frame are from the exact same location.
• the pixels values for a given image are closely related for a localized area.
• the pixel values may have significantly different values.
• subsequent to encoding the DR and MIN values for spatially close 2D or 3D blocks in a section of an image have similar values, whereas the DR and MIN values for blocks in another section of the image may be significantly different.
• Intra frame set block shuffling occurs prior to ADRC encoding and includes shuffling the 2D or 3D blocks generated during the image-to-block mapping process. This shuffling process ensures an equalized buffer usage during a subsequent ADRC encoding.
• Figures 7a - 7d illustrate one embodiment of shuffling 3D Y-blocks.
• 3D Y-blocks in Figures 7a-7d are generated from applying the image-to-block mapping process described above to a frame pair containing only Y signals.
• 3D Y-blocks are shuffled to ensure that the buffers used to store the encoded frame pair contain 3D Y-blocks from different parts of the frame pair. This leads to similar DR distribution during ADRC encoding. A similar DR distribution within each buffer leads to consistent buffer utilization.
• Figure 7a -7d also illustrate 3D block shuffling using physically dis j ointed 3D blocks to ensure that transmission loss of consecutive packets results in damaged block attributes scattered across the image, as opposed to a localized area of the image
• the block shuffling is designed to widely distribute block attributes in the event of small, medium, or large, burst packet losses occur.
• a small burst loss is thought of as one where a few packets are lost, a medium loss is one in which the amount of data that can be held in one buffer is lost; and a large loss is one in which the amount of data that can be held in one segment is lost.
• each group of three adjacent blocks are selected from relatively remote parts of the image.
• each group is formed from 3D blocks that have differing statistical characteristics
• Distributed block attribute losses allow for a robust error recovery because a damaged 3D block is surrounded by undamaged 3D blocks and the undamaged 3D blocks can be used to recover lost data.
• Figure 7a illustrates a frame pair contaimng 663D Y-blocks in the horizontal direction and 60 3D Y-blocks m the vertical direction.
• the 3D Y- blocks are allocated into Segments 0 - 5.
• the 3D Y-block assignment follows a two by three column section such that one 3D Y-block from each section is asso ⁇ ated with a segment.
• FL-data shuffling is performed to further disperse block attribute losses.
• Figure 7b illustrates the scanning order of 3D Y-blocks numbered "0" used to enter mto Segment 0.
• Each "0" 3D Y-block of Figure 7a is numbered 0, 1, 2, 3, . . . ., 659 to illustrate their location m the stream that is inputted into Segment 0.
• the remammg 3D Y-blocks are inputted mto Segments 1 - 5, thus resulting m a frame pair shuffled across multiple segments.
• Figure 7c illustrates the 660 3D Y-blocks comprising one segment. The 3D Y-blocks numbered 0 - 65 are inputted into Buffer 0.
• Figure 7d illustrates the final ordering of the "0" 3D Y-blocks across a buffer.
• 3D Y-blocks 0, 1, and 2 occupy the first three positions in the buffer. The process is repeated for the rest of the buffer. Accordingly, loss of three 3D Y- blocks during data transmission results in missing 3D Y-blocks from distant locations within the image.
• Figures 7a-d illustrate one embodiment of 3D block distributions for 3D Y-blocks of a frame set.
• 3D block distributions for 3D U-blocks and 3D V-blocks are available.
• the 3D U-blocks are generated from applying the image-to-block mapping process, described above, to a frame set containing only U signals.
• 3D V-blocks are generated from applying the image-to-block mapping process to a frame set containing only V signals. Both the 3D U-block and the 3D V-block follow the 3D Y-block distribution described above. However, as previously described, the number of 3D U-blocks and 3D V-blocks each have a 1:6 proportion to 3D Y- blocks.
• Figures 7a-d are used to illustrate one embodiment of intra frame set block shuffling for a Y signal such that burst error of up to 1/6 of the packets lost during transmission is tolerated and further ensures equalized buffer use. It will be appreciated by one skilled in the art that segment, buffer, and ADRC block assignments can be varied to ensure against 1/n burst error loss or to modify buffer utilization.
• the ADRC encoding and buffering processes occur in step four.
• 2D or 3D blocks generated during the image-to-block mapping process are encoded resulting in
• a 3D ADRC block contains Qcodes, a MIN value, a Motion Flag, and a DR.
• a 2D ADRC block contains Qcodes, a MIN, and a DR.
• a 2D ADRC block does not include a Motion Flag because the encoding is performed on a smgle frame or a single field
• partial buffering des ⁇ ibes a method of selecting threshold values from a threshold table designed to provide a constant transmission rate between remote terminals while restricting error propagation.
• the threshold table is further designed to provide maximum buffer utilization.
• a buffer is a memory that stores a one-sixtieth division of encoded data from a given frame set. The threshold values are used to determine the number of Qbits used to encode the pixels in 2D or 3D blocks generated from the image-to-block mapping process previously described.
• the threshold table m cludes rows of threshold values, also referred to as a threshold set, and each row m the threshold table is indexed by a threshold index.
• the threshold table is organized with threshold sets that generate a higher number of Qcode bits located in the upper rows of the threshold table. Accordmgly, for a given buffer havmg a predetermined number of bits available, Encoder 110 moves down the threshold table until a threshold set that generates less than a predetermined number of bits is encountered. The approp ⁇ ate threshold values are used to encode the pixel data m the buffer.
• a transmission rate of no more than 30 Mbps is desired.
• the desired transmission rate results in 31,152 bits available for VL- data storage in any given buffer.
• a cumulative DR distribution is computed and a threshold set is selected from the threshold table to encode the pixels in 3D or 2D blocks into VL-data.
• Figure 8 illustrates one embodiment of selected threshold values and the DR distribution for Buffer 0.
• the vertical axis of Figure 8 includes the cumulative DR distribution.
• the value "b" is equal to the number of 3D or 2D blocks whose DR is greater than or equal to L3.
• the ho ⁇ zontal axis includes the possible DR values.
• DR values range from 0 to 255.
• Threshold values L 4 , L3, L 2 , and Li describe a threshold set used to determine the encoding of a buffer.
• all blocks stored in Buffer 0 are encoded using threshold values L 4 , L3, L2, and Li . Accordingly, blocks with DR values greater than L 4 have their pixel values encoded using four bits. Similarly, all pixels belonging to blocks with DR values between L3 and L4 are encoded using three bits. All pixels belonging to blocks with DR values between L2 and L3 are encoded using two bits. All pixels belonging to blocks with DR values between Li and L2 are encoded using one bit. Finally, all pixels belonging to blocks with DR values smaller than Li are encoded using zero bits. L4, L3, L2, and Li are selected such that the total number of bits used to encode all the blocks m Buffer 0 is as close as possible to a limit of 31,152 bits without exceeding the limit of 31,152.
• Figure 8a illustrates the use of partial buffering in one embodiment.
• Frame 800 is encoded and stored in Buffers 0 - 59.
• a transmission error inhibits data recovery, the decoding process is stalled for Frame 800 until error recovery is performed on the lost data.
• partial buffering restricts the error propagation within a buffer, thus allowing decoding of the remaining buffers.
• a transmission error inhibits the Qbit and Motion Flag recovery for Block 80 in Buffer 0.
• Partial buffering limits the error propagation to the remaining blocks within Buffer 0. Error propagation is limited to Buffer 0 because the end of Buffer 0 and the beginning of Buffer 1 are known due to the fixed buffer length. Accordingly, Decoder 120 can begin processing of blocks within Buffer 1 without delay.
• the use of different threshold sets to encode different buffers allows Encoder 110 to maximize /control the number of Qcodes bits included in a given buffer, thus allowing a higher compression ratio. Furthermore, the partial buffering process allows for a constant transmission rate because Buffers 0 - 59 consist of a fixed length.
• a buffer's variable space is not completely filled with Qcode bits because a limited number of threshold sets exist. Accordingly, the remaining bits in the fixed length buffer are filled with a predetermined bitstream pattern referred to as a post-amble. As will be described subsequently, the post-amble enables bidirectional data recovery because the post-amble delineates the end of the VL-data prior to the end of the buffer.
• Y, U, and V signals each have unique statistical properties.
• the Y, U, and V signals are multiplexed within a buffer. Accordingly, transmission loss does not have a substantial effect on a specific signal.
• FIG. 9 illustrates one embodiment of the intra buffer YUV block shuffling process in which YUV ADRC blocks are derived from the Y, U, and V signals respectively.
• Buffer 900 illustrates the ADRC block assignments after intra frame set block shuffling.
• Buffer 900 comprises 66 Y-ADRC blocks followed by 11 U-ADRC blocks which are in turn followed by 11 V-ADRC blocks.
• Buffer 910 shows the YUV ADRC block organization after intra buffer YUV block shuffling. As illustrated, three Y-ADRC blocks are followed by a U- ADRC block or three Y-ADRC blocks are followed by a V-ADRC block.
• Intra buffer YUV block shuffling reduces similarity between adjacent block's bitstreams within the buffer.
• Alternative embodiments of intra buffer YUV block shuffling with a different signal, i.e., YUV ratios or other color spaces are possible dependent on the initial image format.
• Intra group VL-data shuffling comprises three processing steps.
• the three processing steps include Qcode concatenation,
• FIG. 10 illustrates one embodiment of mtra group VL-data shuffling wherein three processing steps are applied consecutively to Qcodes stored in a buffer.
• one or more processing steps discussed herein may be applied to perform intra group VL-data shuffling.
• Each processing step independently assists in the error recovery of data lost during transmission. Accordingly, each processing step is described independently.
• Qcode concatenation ensures that groups of ADRC blocks are decoded together. Group decoding facilitates error recovery because additional information is available from neighbormg blocks during the data recovery process detailed below.
• Qcode concatenation is applied independently to each group of three ADRC blocks stored m a buffer.
• a group m cludes ADRC block(s) from different buffers.
• the concatenation of Qcodes a ⁇ oss three ADRC blocks is described as generating one concatenated ADRC tile.
• Figure 11 and Figure 11a illustrate one embodiment of generating concatenated ADRC tiles.
• Figure 11 illustrates one embodiment of generating a concatenated ADRC hie from 2D ADRC blocks.
• the concatenation is performed for each Qcode (qo - q ⁇ 3) included in 2D ADRC Blocks 0, 1, and 2 resulting in the sixty four Qcodes of Concatenated ADRC Tile A.
• the first Qcode qo,o (0th quantized value) of 2D ADRC Block 0 is concatenated to the first Qcode qo, ⁇ of 2D ADRC Block 1.
• the two concatenated Qcodes are in turn concatenated to the first Qcode qo,2 of 2D ADRC Block 2, thus resulting in Qo of Concatenated ADRC Tile A.
• the process is repeated until Q63 is generated.
• FIG. 11a illustrates one embodiment of generating a concatenated ADRC tile from frame pairs including motion blocks.
• a motion block is a 3D ADRC block with a set Motion Flag.
• the Motion Flag is set when a predetermined number of pixels within two 2D blocks structure created by image-to-block mapping process described earlier, change in value between a first frame and a subsequent frame.
• the Motion Flag is set when the maximum value of each pixel change between the 2D block of a first frame and a subsequent frame exceeds a predetermined value.
• non-motion (i.e., stationary) block includes a 3D ADRC block with a Motion Flag that is not set.
• the Motion Flag remains un-set when a predetermined number of pixels within the two 2D blocks of a first frame and a subsequent frame do not change m value.
• the Motion Flag remains un-set when the maximum value of each pixel change between a first frame and a subsequent frame does not exceed a predetermined value.
• a motion block includes Qcodes from an encoded 2D block m a first frame and an encoded 2D block in a subsequent frame.
• the collection of Qcodes corresponding to a single encoded 2D block are referred to as an ADRC tile. Accordingly, a motion block generates two ADRC tiles.
• a stationary block need only include one-half of the number of Qcodes of a motion block, thus generating only one ADRC tile.
• the Qcodes of a stationary block are generated by averaging corresponding pixels values between a 2D block in a first frame and a corresponding 2D block in a subsequent frame.
• Each averaged pixel value is subsequently encoded resulting m the collection of Qcodes forming a smgle ADRC hie. Accordingly, Motion Blocks 1110 and 1130 generate ADRC Tiles 0, 1, 3, and 4. Stationary Block 1120 generates ADRC Tile 2.
• Qcode reassignment ensures that bit errors caused by transmission losses are localized within spatially disjointed pixels.
• Qcodes are redistributed and the bits of the redistributed Qcodes are shuffled.
• Qcode reassignment facilitates error recovery because undamaged pixels surround each damaged pixel.
• DR and MIN recovery is aided because pixel damage is distributed evenly throughout an ADRC block.
• FIG. 12 illustrates one embodiment of pixel corruphon during the transmission loss of a 1/6 burst error loss.
• 2D ADRC Blocks 1210, 1220, and 1230 each include sixty four pixels encoded using three bits. Accordmgly, each pixel, Po through P ⁇ 3, of a 2D ADRC block is represented by three bits.
• 2D ADRC Block 1210 shows the bit loss pattern, mdicated by a darkened square, of bits when the first bit of every six bits are lost. Similarly, the bit loss pattern when the second bit or fourth bit of every six bits are lost are shown m 2D ADRC Blocks 1220 and 1230, respechvely.
• Figure 12 illustrates that without Qcode reassignment one-half of all the pixels 2D ADRC Blocks 1210, 1220, and 1230 are corrupted for a 1/6 burst error loss.
• Qcode reassignment is applied independently to each concatenated ADRC tile stored in a buffer, thus ensuring that bit errors are localized within spatially disjointed pixels upon deshuffling.
• Qcode reassignment is applied to each ADRC block stored m a buffer.
• Figure 12a illustrates one embodiment of Qcode reassignment that generates a bitstream of shuffled Qcode bits from a concatenated ADRC hie.
• Table 122 and Table 132 illustrate the Qcode redistribution.
• Bitstreams 130 and 140 illustrate the shuffling of Qcode bits.
• Table 122 shows the concatenated Qcodes for Concatenated ADRC Tile A.
• Q ⁇ is the first concatenated Qcode and Q63 is the final concatenated Qcode.
• Table 132 illustrates the redistribution of Qcodes. For one embodiment Qo, Q ⁇ , Ql2/ Qi8/ Q24/ Q30/ Q36/ Q42/ Q48 Q54, and Q ⁇ o are included in a first set, partition 0.
• Figure 12b illustrates one embodiment of the bit pattern loss ⁇ eated by the 1/6 burst error loss of redistributed Qcodes.
• 2D ADRC- blocks 1215, 1225, and 1235 each include sixty four pixels encoded using three bits. Accordingly, each pixel Po through P63, of each 2D ADRC block, is represented by three bits.
• the bit loss pattern indicated by a darkened square, is localized across a group of consecutive pixels. Accordingly, only eleven consecutive pixels within each 2D ADRC Block 1215, 1225, and 1235 are corrupted for a given segment loss.
• Qcode assignment to partitions include Qcodes from different motion blocks, thus providing both a disjointed spatial and temporal assignment of Qcodes to six segments. This results in additional undamaged spatial- temporal pixels during a 1/6 burst error loss and further facilitates a more robust error recovery.
• bits of the redistributed Qcodes in Table 132 are shuffled across a generated bitstream so that adjacent bits in the bitstream are from adjacent partitions.
• the Qcode bits for all the partitions in Table 132 are concatenated into Bitstream 130.
• adjacent bits in Bitstream 130 are scattered to every sixth bit location in the generated Bitstream 140. Accordingly, bits number zero through five, of Bitstream 140, include the first bit from the first Qcode in each partition. Similarly, bits number six through eleven, of Bitstream 140, include the second bit from the first Qcode in each partition.
• the process is repeated for all Qcode bits. Accordingly, a 1/6 burst error loss will result in a spatially disjointed pixel loss.
• Figure 12c illustrates one embodiment of the bit pattern loss created by the 1/6 burst error loss of reassigned ( i.e. redistributed and shuffled) Qcodes.
• 2D ADRC Blocks 1217, 1227, and 1237 each include sixty four pixels encoded using three bits. Accordingly, each pixel Po through P 63 , of each 2D ADRC Block, is represented by three bits.
• the bit loss pattern indicated by a darkened square, is distributed across spatially disjointed pixels, thus facilitating pixel error recovery.
• Randomization or shuffling may be applied to destroy the correlahon of incorrect candidate decodings that may be generated during a subsequent data decoding process in order to eshmate lost or damaged data.
• the randomization process does not change the properhes of the correct candidate decoding, as it is restored to its original condihon.
• subsequent derandomized data will tend to result in candidate decodings that exhibit highly correlated properties indicative that the corresponding candidate decoding is a good selection.
• the randomization process is chosen such that a correct derandomization results in a candidate decoding exhibiting highly correlated properhes and an incorrect derandomization results in a decoding exhibiting uncorrelated properties.
• Encoding parameters such as may be used to perform the randomization and derandomization processes. For example, a randomization pattern may be chosen based on the values of the compression parameters.
• a randomization process is illustrated in Figure 12d.
• a bit reallocation is performed.
• a code reallocation is performed.
• steps 1277 and 1279 each may be performed independently and still realize some coding benefits. In addihon, steps 1277 and 1279 may be executed in an order different than illustrated in Figure 12d.
• randomization is achieved using a code reallocation process.
• reallocation is performed using a masking key.
• a key referred to herein as KEY, is used to mask a bitstream of Qcodes.
• KEY may be used to mask a bitstream of Qcodes corresponding to multiple, e.g., three blocks, of data.
• Each key element (d,) of the masking key is generated by the combination of one or more compression parameters used to encode a corresponding block of data. This process may enhance error localization.
• the masking process to perform code reallocation results in a randomization of the locations or randomized address mapping of Qcodes a ⁇ oss blocks.
• the KEY may be generated a variety of ways.
• the motion flag (MF) and Qbit values are used to define KEY.
• the masking key may be generated using one or more of the following values: MF, Qbit, DR, CEN, MIN, MAX and the block address of the data of the block.
• MF and Qbit values are used to generate KEY.
• Key may be viewed as a pseudorandom sequence upon which the shuffling process is based.
• the value of the key elements composing KEY may be determined in accordance with the following equation:
• N is the number of blocks of data used
• d ⁇ represents a sub-mask value generated using predetermined parameters such as compression parameters.
• KEY is formed according to the following:
• KEY d 0 + 10 • d, + 100 • d 2
• KEY functions as a mask to indicate locations the Qcodes are to be shuffled to.
• the result of the process is a randomization of Qcodes, for example, as shown in Figure 12e.
• the sub-mask may be determined using a different parameters.
• a derandomization process is performed in which possible KEY values are regenerated depending upon the values used to create the masking keys.
• the regenerated KEY values are used to unmask the received bitstream of Qcodes resulting in candidate encoded data.
• the MF or Qbit value used to generate the mask is not correct, the corresponding Qcodes will exhibit a low level of correlation, which will be typically readily detectable.
• bit reallocation is achieved by simple bit weight inversion.
• the inversion pattern may be determined according to the number of bits used for encoding (e.g., Qbit). This randomization process can improve recovery of MF and Qbit values. Examples are shown in Figures 12e, 12f, 12g, and 12h.
• Figure 12f illustrates a bit reallocation process for 2 bit encoding
• Figure 12g illustrates a bit reallocation for 3 bit encoding
• Figure 12h illustrates a bit reallocation for 4 bit encoding.
• Alternate processes may be applied to perform code reallocation and /or bit reallocation.
• bit reallocation may be dependent upon one or more parameters such as is discussed above with respect to code reallocation.
• Weight inversion processes may also be applied to code reallocation.
• a compression parameter such as the Qbit value of a block may be used as a randomizing or seed value for a pseudorandom number generator (PNG).
• PNG pseudorandom number generator
• the PNG may create a statistically distinct pseudorandom number sequence for each unique seed value as well as a correspondmg or the same statistically distinct sequence for each application of the same seed value.
• the pseudorandom sequence may be used to transform the VL-data on a bit by bit or code by code basis.
• the FL-data may be transformed or both the VL-data and FL-data may be transformed.
• the transformation T of the VL-data may be achieved by applying a bitwise XOR (exclusive OR) function to the pseudorandom number sequence (y) and the VL-data (x).
• a variety of sets of transformations may be used to generate the statistically distinct sequences.
• a table of predefined sequences may be used.
• the seed value may be based upon selected parameters such as compression parameters.
• the Qbit value of the block is used as the seed value.
• Other values based upon DR, MF, CEN, MIN, MAX and block address may also be used.
• the seed value may be determined as (5*m, + q,), (lODR, ) + (5 ⁇ n) + q j , or (2560»BA, ) + (10-DR, ) + ( ⁇ »m) + q,.
• a similar process may be used to decode the parameter.
• a similar process may be used to decode the Qbit value from the DR of the current block. If the DR arrives undamaged, the Qbit value may be determined by using the threshold table as was used for the Qcode encoding. The DR is used to look-up the Qbit value in the table and the Qbit value is then used as a seed value to the PNG to produce the pseudorandom number sequence. The decoder transforms the randomized VL-data by applying a bitwise XOR function to the pseudorandom number sequence and the randomized VL-data to produce the original, non-randomized VL-data. In this embodiment, because the same PNG and seed value are used, the same pseudorandom number sequence is produced. In alternate embodiments, corresponding variations of the PNG and seed value may be used and corresponding process steps may be applied to determine a pseudorandom sequence.
• the decoder may attempt to decode the block with all possible Qbit values and associated possible seed values.
• a local correlation metric is applied to each candidate decoding, and a confidence metric is computed for the block.
• enhanced recovery of a lost or damaged Qbit value may is realized by means of shuffling of Qcodes.
• the shuffling process described can utilize a variety of types of data to enchance subsequent recovery of that data if lost or damaged.
• the Motion Flag, DR or block address of the data, or a combination of the Qbit value, the Motion Flag, DR and /or block address may be used to generate the seed value.
• Figures 10 - 12 illustrate intra group VL-data shuffling tolerated up to 1/6 packet data loss during transmission. It will be appreciated by one skilled in the art, that the number of total partitions and bit separation can be varied to ensure against 1/n burst error loss.
• Inter segment FL-data shuffling describes rearranging block attributes among different segments. Rearranging block attributes provides for a distributed loss of data. In particular, when FL-data from a segment is lost during transmission the DR value, MIN value, and Motion Flag value lost do not belong to the same block.
• Figures 13 and 14 illustrate one embodiment of inter segment FL-data shuffling.
• each segment comprises 880 DRs, 880 MINs, 880 Motion Flags, and
• MIN Shuffling 1300 the MIN values for Segment 0 are moved to Segment 2
• the MIN values for Segment 2 are moved to Segment 4
• the MIN values for Segment 4 are moved to Segment 0. Additionally, the
• FIG. 13a illustrates Motion Flag shuffling. As illustrated, in graph
• Motion Flag Shuffling 1305 the Motion Flag values for Segment 0 are moved to
• Loss pattern 1310 illustrates the FL-data loss after Segment 0 is lost during transmission.
• both Figure 13 and Figure 13a illustrate shuffling all instances of the specific block attribute between segments.
• the 880 MLN values from Segment 0 are collectively exchanged with the 880 MIN values in Segment 2.
• the 880 Motion Flags for Segment 0 are collectively exchanged with the 880 Motion Flags in Segment 4.
• this collective shuffling of block attributes results in a disproporhonate loss of a specific block attributes for a block group.
• a block group includes three ADRC blocks.
• Figure 14 illustrates one embodiment of a modular three shuffling process for DR, MIN, and Mohon Flag values.
• a modular three shuffling describes a shuffling pattern shared across three blocks (i.e., a block group) in three different segments. The shuffling pattern is repeated for all block groups within the three different segments. However, a different shuffling pattern is used for different block attributes. Accordingly, the modular three shuffling process distributes block attributes over all three segments. In parhcular, for a given block group a modular three shuffling ensures that only one instance of a specific block attribute is lost during the transmission loss of a segment. Thus, during the data recovery process, des ⁇ ibed below, a reduced number of candidate decodings are generated to recover data loss within a block.
• a segment stores 880 DR values. Accordingly, the DR values are numbered 0 - 879 dependent on the block from which a given DR value is derived.
• the FL-data contents of three segments are shuffled.
• a count of 0 - 2 is used to identify each DR value in the three segments identified for a modular shuffling. Accordingly, DR's belonging to blocks numbered 0, 3, 6, 9 . . . belong to Count 0.
• DR's belonging to blocks numbered 1, 4, 7, 10, . . . belong to Count 1 and DR's belonging to blocks numbered 2, 5, 8, 11 . . . belong to Count 2.
• the DR values associated with that count are shuffled across Segment 0, 2, and 4.
• the DR values associated with the same count are shuffled across Segments 1, 3, and 5.
• DR Modular Shuffle 1410 the DR values belonging to Count 0 are left un-shuffled.
• the DR values belonging to Count 1 are shuffled.
• DR Modular Shuffle 1410 the DR values belonging to Count 0 are left un-shuffled.
• the DR values belonging to Count 1 are shuffled.
• the DR Modular Shuffle 1410 the DR values belonging to Count 0 are left un-shuffled.
• DR values belonging to Count 1 are shuffled.
• Count 1 DR values in Segment A are moved to Segment B, the Count 1 DR values in Segment B are moved to Segment C, and the Count 1 DR values in Segment C are moved to Segment A.
• the DR values belonging to Count 2 are also shuffled.
• the Count 2 DR values in Segment A are moved to Segment C
• the Count 2 DR values in Segment B are moved to Segment A
• the Count 2 DR values in Segment C are moved to Segment B.
• MIN Modular Shuffle 1420 illustrates one embodiment of a modular three block attribute shuffling process for MIN values.
• a segment includes 880 MIN values.
• the shuffling pattern used for Count 1 and Count 2 m DR Modular Shuffle 1410 are shifted to Count 0 and Count 1.
• the shuffling pattern used for Count 1 m DR Modular Shuffle 1410 is applied to Count 0.
• the shuffling pattern used for Count 2 in DR Modular Shuffle 1410 is applied to Count 1 and the MLN values belonging to Count 2 are left un-shuffled.
• Motion Flag Modular Shuffle 1430 illustrates one embodiment of a modular three block attribute shuffling process for Mohon Flag values.
• a segment includes 880 Mohon Flag values.
• the shuffling pattern used for Count 1 and Count 2 in DR Modular Shuffle 1410 are shifted to Count 2 and Count 0 respectively.
• the shuffling pattern used for Count 2 in DR Modular Shuffle 1410 is applied to Count 0.
• the shuffling pattern used for Count 1 in DR Modular Shuffle 1410 is applied to
• Figure 14a illustrates the modular shuffling result of Modular Shuffles
• Modular Shuffle Result 1416 shows each attribute destination of blocks belonging to Segment 0.
• Segment 0 corresponds to Segment A of Figure 14. This destination is defined accordmg to
• Figure 14a also illustrates the distribution loss of block attributes after Segment 0 is lost durmg transmission.
• Loss Pattern 1415 shows the DR, Mohon Flag, and
• Spatial Loss Pattern 1417 illustrates the deshuffled spatial distribution of damaged FL-data after Segment 0 is lost during transmission
• Spahal Loss Pattern 1417 shows the DR, Mohon Flag, and MIN value loss after a subsequent deshuffling is applied to the received data.
• Spahal Loss Pattern 1417 a damaged block is surrounded by undamaged blocks and damaged block attributes can be recovered with surrounding undamaged blocks.
• Figure 14 and Figure 14a illustrate a modular three shuffling pattern and the dist ⁇ bution loss of block attributes after a segment is lost during transmission. In alternahve embodiments, the count variables or the number of segments are varied to alternate the distribution of lost block attributes.
• Figure 14b illustrates Modular Shuffle Result 1421 and Loss Pattern 1420.
• Figure 14c illustrates Modular Shuffle Result 1426 and Loss Pattern 1425. Both Loss Pattern 1420 and Loss Pattern 1425 illustrate the distribution loss of block attributes across six segments, as opposed to three segments as previously described.
• bits between a predetermined number of segments are arranged to ensure a spatially separated and periodic VL-data loss during an up to 1/6 packet transmission loss.
• Figure 15 and 16 illustrate one embodiment of the mter segment VL-data shuffling process.
• a transmission rate approaching 30 Mbps is desired. Accordingly, the desired transmission rate results in 31,152 bits available for the VL-data m each of the 60 buffers. The remaining space is used by FL-data for the eighty eight blocks included in a buffer.
• Figure 15 includes the VL-data buffer organization within a frame set for a transmission rate approaching 30 Mbps. As previously described, parhal buffering is used to maximize the usage of available VL-data space within each buffer, and the unused VL-data space is filled with a post-amble.
• Figure 16 illustrates one embodiment of the shuffling process to ensure a spatially separated and periodic VL-data loss.
• the first row illustrates the VL- data from the 60 buffers in Figure 15 rearranged into a concatenated sheam of 1,869,120 bits.
• the second row illustrates the collection of every sixth bit into a new sheam of bits.
• the third row illustrates grouping every 10 bits of Stream 2 into a new stream of bits, Stream 3.
• the boundary of a grouping is also defined by the number of bits in a segment.
• Grouping of Stream 2 for every tenth bit ensures that a 1/60 data loss results in fifty-nine undamaged bits between every set of two damaged bits. This provides for a spatially separated and periodic VL-data loss in the event that 88 consecutive packets of data are lost.
• the fourth row illustrates grouping every 11 bits of Stream 3 into Sheam 4.
• the boundary of a grouping is also defined by the number of bits in a segment.
• Grouping of Stream 3 for every eleventh bit ensures that 1/660 data loss results in 659 undamaged bits between to damaged bits, resulting in a spatially separated and periodic VL-data loss during a transmission loss of 8 consecutive packets.
• Each group of 31,152 bits within Stream 4 is consecutively re-stored in Buffers 0 - 59, with the first group of bits stored in Buffer 0 and the last group of bits stored in Buffer 59.
• the previously described shuffling process creates buffers with intermixed FL-data and VL-data.
• packets are generated from each buffer, according to packet structure 200, and transmitted across Transmission media 135.
• the data received is subsequently decoded. Lost or damaged data may be recovered using data recovery processes
• FIG. 4 a flow diagram illustrating one embodiment of a decoding process performed by decoder 120 is shown.
• the conversion and de-shufflmg processes are the inverse of the processes represented m Figure 3. These processes mclude the code reallocahon and bit reallocahon processes discussed with reference to Figures 12d-12h.

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