WO1998057370A1 - Element comprenant des puces a protuberances, materiau de scellage de type film, dispositif a semi-conducteur et procede de fabrication de ce dernier - Google Patents
Element comprenant des puces a protuberances, materiau de scellage de type film, dispositif a semi-conducteur et procede de fabrication de ce dernier Download PDFInfo
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- WO1998057370A1 WO1998057370A1 PCT/JP1998/002512 JP9802512W WO9857370A1 WO 1998057370 A1 WO1998057370 A1 WO 1998057370A1 JP 9802512 W JP9802512 W JP 9802512W WO 9857370 A1 WO9857370 A1 WO 9857370A1
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
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- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
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- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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Definitions
- the present invention relates to a flip chip member used for flip chip mounting, a sheet sealing material, a semiconductor device manufactured by flip chip mounting, and a method of manufacturing the same.
- the surface electrode of the semiconductor element is directly joined to the circuit wiring on the circuit board without using a lead frame and a bonding wire. Weight and weight can be reduced.
- a process of filling a gap between a semiconductor element and a circuit board with a sealing resin when mounting a semiconductor element is required. This process is indispensable for improving the reliability of semiconductor devices after mounting, especially for TCT (Thermal Cyc1 e Test; temperature cycle test).
- thermosetting resin is applied as a sealing resin onto a circuit board using a dispenser, and the semiconductor element is applied onto the circuit board. After mounting the flip chip, the liquid thermosetting resin is cured by heating. Alternatively, after mounting the flip chip, a liquid thermosetting resin is poured into a gap between the circuit board and the semiconductor element, and then the thermosetting resin is cured by heating.
- thermosetting resin As described above, since a liquid thermosetting resin is used, it is necessary to store the thermosetting resin in a refrigerator and control shelf time. In addition, during use, a series of tasks must be performed while managing the pot life. In addition, during flip-chip mounting, liquid thermosetting resin is applied to the circuit board using a dispenser, or liquid thermosetting resin is poured into the gap between the circuit board and the semiconductor element. Work is required. As a result, the productivity of the semiconductor device decreases.
- Japanese Patent Application Laid-Open No. Hei 5-334473 discloses that an adhesive sheet provided with an adhesive layer on a film base is attached to a wiring surface of a semiconductor element and bump-bonded to a circuit board.
- a method has been proposed in which the resin melts and flows into the gap between the semiconductor element and the circuit board, and the gap is sealed.
- the adhesive sheet is adhered to the entire wiring surface of the semiconductor element and has a configuration in which bonding bumps are provided on the circuit board side, the semiconductor element, the bump and the circuit board are not provided. Is difficult to align with the bonding bumps.
- the adhesive sheet extends to the outside of the bonding bumps, it is easy to take in external air into the gap between the semiconductor element and the circuit board as the adhesive resin melts and flows, resulting in sealing. Air bubbles remained in the area, and cracks and the like sometimes occurred inside the sealed area due to temperature changes.
- An object of the present invention is to provide a flip chip member capable of manufacturing a highly reliable semiconductor device with high productivity by flip chip mounting, and a sheet-like sealing material used therefor.
- Another object of the present invention is to provide a highly reliable semiconductor device that can be manufactured with high productivity by flip-chip mounting.
- Still another object of the present invention is to provide a manufacturing method capable of manufacturing a highly reliable semiconductor device with high productivity by flip-chip mounting. is there. Disclosure of the invention
- a flip chip member has a sheet-like sealing material made of a semiconductor element and an organic resin, and the sheet-like sealing material is provided on an electrode portion at a peripheral portion of the semiconductor element.
- the semiconductor device has an area that fits inside the bonding bump and a thickness equal to or greater than the height of the bonding bump, and is arranged inside the bonding bump on the electrode surface of the semiconductor element.
- the sheet sealing material made of an organic resin is disposed inside the bonding bump on the electrode surface of the semiconductor element. Therefore, when a semiconductor element is pressed onto a circuit board during flip chip mounting, the organic resin of the sheet-like sealing material having a thickness greater than the height of the bump flows out to the periphery of the bonding bump, and the bonding is performed. In such a state as to cover the bumps for use, the gap between the circuit board and the semiconductor element and the periphery of the bonding bumps are sealed, and the semiconductor element is bonded on the circuit board.
- the sheet-like sealing material can be stored at room temperature, so that management is easy.
- a flip-chip member includes a circuit board on which a semiconductor element can be mounted and a sheet-shaped sealing material made of an organic resin, and the sheet-shaped sealing material is provided at a peripheral portion of the semiconductor element.
- the electrode has an area that fits inside the bonding bump provided on the electrode portion and a thickness equal to or greater than the height of the bonding bump. It is characterized in that it is arranged inside the loop joint.
- the sheet sealing material made of an organic resin is disposed inside the bump bonding portion of the circuit board. Therefore, when a semiconductor element is pressed onto a circuit board during flip-chip mounting, the organic resin of the sheet sealing material having a thickness equal to or greater than the height of the bump flows out to the periphery of the bonding bump and is bonded. The gap between the circuit board and the semiconductor element and the periphery of the bonding bump are sealed while the semiconductor bump is covered, and the semiconductor element is bonded to the circuit board.
- the sheet-shaped sealing material flows out from the inside of the bonding bump to the outside, so that no air bubbles are built in between the circuit board and the semiconductor element, and the moisture-proof reliability and the cooling-resistant cycle are achieved.
- a semiconductor device having excellent performance can be obtained.
- the sheet-like sealing material arranged to the outside of the bonding bump as described in Japanese Patent Application Laid-Open No. 5-344733 air bubbles are generated between the circuit board and the semiconductor device. Since the semiconductor device is easily interposed, a highly reliable semiconductor device as in the present invention cannot be obtained.
- the sheet-like sealing material can be stored at room temperature, so that management is easy.
- the sheet sealing material preferably has a thickness of 1 to 3 times the height of the bonding bump provided on the electrode portion at the peripheral edge of the semiconductor element. This allows the gap between the circuit board and the semiconductor element and the periphery of the bump to be sufficiently sealed when the semiconductor element is crimped onto the circuit board during flip-chip mounting, and the semiconductor element to be mounted on the circuit board. Adhered securely.
- the sheet sealing material is preferably formed by forming a sealing material layer containing an organic resin as a main component on both surfaces of a heat-resistant base material.
- the self-supporting property of the heat-resistant base material facilitates the handling of the sheet-like sealing material, and the circuit board and the semiconductor element can be bonded with high reliability.
- the heat-resistant base material is preferably made of an organic polymer or a metal foil having a melting point of 250 ° C. or more.
- the soldering temperature of the circuit board The generation of distortion due to a change in the coefficient of linear expansion of the heat-resistant substrate at a high temperature is prevented.
- the organic resin constituting the sheet-shaped sealing material contains polycarbonate as a main component.
- the sheet sealing material has properties such as low hygroscopicity, flexibility, high adhesiveness, and high heat resistance.
- the organic resin constituting the sheet-like sealing material contains an inorganic filler. In this case, it is possible to suppress the water absorption and to reduce the distortion due to the difference in linear expansion coefficient between the semiconductor element and the circuit board.
- a sheet-like sealing material according to a third aspect of the present invention is a sheet-like sealing material used when a semiconductor element is mounted on a circuit board by a flip chip, and includes an electrode portion on a peripheral portion of the semiconductor element. It has an area that can be accommodated inside the bonding bump provided on the substrate and a thickness equal to or greater than the height of the bonding bump, and is made of an organic resin.
- the sheet-like sealing material according to the present invention When the sheet-like sealing material according to the present invention is disposed inside the bonding bump provided on the semiconductor element or inside the bump bonding portion of the circuit board, and the semiconductor element is crimped on the circuit board at the time of mounting the flip chip, When the organic resin of the sheet-like sealing material having a thickness equal to or greater than the height of the bonding bump flows out to the peripheral portion of the bonding bump and covers the bonding bump, a problem occurs between the circuit board and the semiconductor element. The gap between the two and the periphery of the bonding bump are sealed, and the semiconductor element is bonded onto the circuit board.
- the sheet-like sealing material can be stored at room temperature, it can be easily managed. As a result, it is possible to easily manufacture a semiconductor device with high reliability and improved productivity.
- a semiconductor device is a semiconductor device comprising an organic resin having an area that fits inside a bonding bump provided on an electrode portion at a peripheral portion of a semiconductor element and a thickness equal to or greater than the height of the bonding bump.
- the sealing material is placed inside the bonding bumps on the electrode surfaces of the semiconductor element or inside the bump joints on the circuit board, the bump sealing and sealing resin are applied between the circuit board and the semiconductor element. It is characterized in that it is flip-chip mounted by performing adhesive sealing. Therefore, there is an advantage that the alignment of the bonding bumps is easy because the bumps are exposed during the bump bonding.
- the bump alignment cannot be substantially performed.
- the sheet-shaped sealing material made of an organic resin is placed inside the bonding bump on the electrode surface of the semiconductor element or inside the bump bonding portion of the circuit board. Since the bumps are bonded between the substrate and the semiconductor element and bonded and sealed with a sealing resin, a sheet-like sealing material having a thickness equal to or greater than the height of the bonding bumps is applied to the periphery of the bonding bumps.
- the circuit board and the semiconductor element are sealed and adhered in such a manner as to flow out to the part and cover the bonding bump.
- high humidity resistance and cooling cycle resistance are realized.
- the height of the bumps after bonding is smaller than the height of the bumps before bonding. Therefore, when the thickness of the sheet-like sealing material is considered in consideration of this, the appearance without excess sealing material is good. Semiconductor device can be obtained.
- a method of manufacturing a semiconductor device comprises an organic resin having an area that fits inside a bonding bump provided on an electrode portion at a peripheral portion of a semiconductor element and a thickness equal to or greater than the height of the bonding bump.
- a semiconductor device According to the method of manufacturing a semiconductor device according to the present invention, flip-chip mounting is performed in a state where the sheet-like sealing material made of an organic resin is arranged inside the bonding bump on the electrode surface of the semiconductor element. Thickness more than the height of the bonding bump The gap between the circuit board and the semiconductor element and the periphery of the bonding bump are sealed in such a state that the sheet-shaped sealing material flows out to the periphery of the bonding bump and covers the bonding bump. The semiconductor element is bonded on the circuit board. As a result, a semiconductor device having excellent moisture resistance reliability and cooling cycle resistance can be obtained with high productivity and a simple manufacturing process.
- the method of manufacturing a semiconductor device comprises an organic resin having an area that fits inside a bonding bump provided on an electrode portion at a peripheral portion of a semiconductor element and a thickness equal to or greater than the height of the bonding bump.
- flip-chip mounting is performed in a state where the sheet-like sealing material made of an organic resin is arranged inside the bump joint of the circuit board.
- a gap between the circuit board and the semiconductor element in a state where the sheet-shaped sealing material having a thickness equal to or greater than the height of the bonding bump flows out to the peripheral portion of the bonding bump and covers the bonding bump.
- the periphery of the bonding bump is sealed, and the semiconductor element is bonded on the circuit board.
- FIG. 1 is a first schematic sectional view showing an example of a sheet-like sealing material according to the present invention.
- FIG. 2 is a second schematic process sectional view illustrating an example of the method for manufacturing a semiconductor device according to the present invention.
- FIG. 3 is a third schematic process sectional view showing an example of the method for manufacturing a semiconductor device according to the present invention.
- FIG. 4 is a fourth schematic process sectional view illustrating an example of the method for manufacturing a semiconductor device according to the present invention.
- FIG. 5 is a fifth schematic process sectional view illustrating an example of the method for manufacturing a semiconductor device according to the present invention.
- FIG. 6 is a sixth schematic process sectional view illustrating an example of the method for manufacturing a semiconductor device according to the present invention.
- FIG. 7 is a schematic diagram showing a plurality of semiconductor elements formed on a semiconductor wafer.
- FIGS. 1 to 6 are schematic sectional views showing an example of a method for manufacturing a semiconductor device according to the present invention.
- FIG. 7 is a schematic diagram showing a plurality of semiconductor elements formed on a semiconductor wafer.
- FIG. 1 shows an example in which the laminated film 1 is used as a sheet-like sealing material.
- the laminated film 1 is formed by laminating adhesive layers 3 and 4 on both surfaces of a heat-resistant base layer 2 as an intermediate layer.
- the thickness of the laminated film 1 is practically used in the range of 100 m to 500 m, but the area that fits inside the bonding bumps provided on the electrode on the periphery of the semiconductor element and the bonding area It is higher than the height of the bump.
- the thickness of the laminated film 1 is more preferably about 1 to 3 times the height of the bonding bump provided on the semiconductor element.
- the thickness of the laminated film i may exceed three times the height of the bonding bumps.
- the height of the bump provided on the electrode portion of the semiconductor element is 10
- the preferred thickness of the laminated film 1 is from 10 to 150 / m, since the thickness of ⁇ 40 ⁇ m is often used.
- an organic polymer such as a metal foil (metal layer) of copper, 42 alloy, aluminum or the like, or a polyimide base material having a melting point of 250 ° C. or more is used.
- a metal foil metal layer
- a polyimide base material having a melting point of 250 ° C. or more
- copper it is preferable to use copper as the metal foil from the viewpoint of mounting characteristics and workability.
- the thickness of the base layer 2 is preferably 5 m to 100 m.
- a heat-resistant resin such as an epoxy resin, a polyester yarn resin, a polyamide resin, or a silicone resin can be used.
- New —R— in the general formula (1) may be any of the structural formulas (A) to (D), and in particular, the fluorine-containing polycarbonate represented by the structural formula (D) It is preferable to use it.
- the polymer position medium can be obtained by a method disclosed in Japanese Patent Application Laid-Open No. 2-229316 and Japanese Patent Application Laid-Open No. 4-27559.
- an inorganic filler is added to the adhesive layers 3 and 4 as necessary for the purpose of suppressing water absorption and reducing distortion due to a difference in linear expansion coefficient from a semiconductor element or a circuit board. May be.
- the inorganic filler for example, silica, alumina, titania, glass, iron oxide, silicon nitride, or the like can be used. If the amount of the inorganic filler is more than about 90% by weight of the heat-resistant resin of the adhesive layers 3 and 4, the adhesiveness is reduced. Therefore, the amount of the inorganic filler should be about 0 to 90% by weight of the heat-resistant resin. I like it.
- the laminated film for example, a method of applying a polycarbodiimide resin solution to both surfaces of a copper foil and drying it may be used. Also, for example, thickness
- the laminated film 1 of FIG. 1 is attached on the upper surface (electrode formation surface) of the semiconductor element 5. At this time, a hole or a slit is formed in a predetermined portion of the laminated film 1 as needed so that the surface electrode (pad) portion of the semiconductor element 5 is not covered with the laminated film 1. It is provided.
- the method of attaching the laminated film 1 to the semiconductor element 5 is not particularly limited.
- a method in which one adhesive layer 3 of the laminated film 1 is in contact with the upper surface of the semiconductor element 5 unfavorable Ppuchippubonda Chief by the pressure 5 kg / cm 2 ⁇ 4 0 kg / cm 2, time 5 seconds to 9 0 sec and the temperature 2 1 0 - 4 0 0 ° Doing metal bonding of the electrode portions in C and also Then, the laminated film 1 may be thermocompression-bonded to the semiconductor element 5. Further, after one adhesive layer 3 of the laminated film 1 is melted by heat, the adhesive layer 3 may be spread on the upper surface of the semiconductor element 5.
- the heat resistance may be improved by thermocompression-bonding the laminated film 1 to the upper surface of the semiconductor element 5 and then thermosetting the adhesive layer 3 by heating.
- the laminated film 1 thermocompression-bonded to the semiconductor element 5 is heated by an arbitrary heating means such as a drier, a hot air dryer, and a semiconductor element solder mounting heating apparatus.
- the heating temperature is set in the range of 100 ° C to 360 ° C, preferably in the range of 110 ° C to 250 ° C.
- the adhesive layer 3 is made of polycarbonate
- the above-mentioned heating crosslinks and cures the polycarbonate and improves the heat resistance.
- the lamination film 1 may be attached to the semiconductor element 5 before the semiconductor element 5 is separated from the semiconductor wafer 6 shown in FIG. 7, or the semiconductor element 5 is separated from the semiconductor wafer 6. You may go after you are done. In this way, the semiconductor element laminated film fixed body 9 is manufactured as a flip-chip member.
- connection bump 8 made of a solder material or the like is formed on the surface electrode of the semiconductor element 5 using a solder bump forming apparatus.
- the height of the bump 8 is not less than 1/3 and not more than 1 time of the thickness of the laminated film 1.
- the bump 8 of the semiconductor element laminated film fixing body 9 is positioned on the circuit wiring 12 of the circuit board 10 and, as shown in FIG. 5, the flip chip is mounted.
- the semiconductor element 5 is mounted on the circuit board 10 with the laminated film 1 interposed therebetween.
- the heat-resistant resin of the adhesive layers 3 and 4 of the laminated film 1 is placed between the semiconductor element 5 and the circuit board 10 so that the bump 8 and the circuit wiring 12 are formed. It spreads in the gap except the area of.
- the semiconductor device 11 in which the semiconductor element 5 is bonded on the circuit board 10 with the laminated film 1 is manufactured.
- the semiconductor chip 5 is sealed between the semiconductor element 5 and the circuit board 10 during flip chip mounting.
- the resin can be filled, and the semiconductor element 5 can be easily bonded on the circuit board 10.
- the sealing material for the adhesive layers 3 and 4 is used for the adhesive sealing. Since the fluid flows from the side to the outside, no air bubbles remain in the adhesive layers 3 and 4, and a highly reliable semiconductor device 11 can be obtained.
- the laminated film 1 exists inside the bump 8, there is an effect that the alignment at the time of bump connection between the semiconductor element 5 and the circuit board 10 becomes easy.
- the laminated film 1 can be stored at room temperature, it is easy to manage. In addition, there is no need to apply a liquid thermosetting resin onto the circuit board 10 by a dispenser. Further, since the base material layer 2 functions as a support for the adhesive layers 3 and 4, the handleability is improved. Therefore, the productivity of the semiconductor device 11 is improved.
- the adhesive layers 3 and 4 are formed on both sides of the base layer 2 of the laminated film 1, the adhesion between the laminated film 1 and the semiconductor element 5 and the circuit board 10 is improved. . Moreover, since the base layer 2 is sandwiched between the adhesive layers 3 and 4, warpage is prevented. Therefore, the reliability of the semiconductor device is improved.
- the flip chip member may be configured by attaching 1 to the inside of the bump joint of the circuit board 10.
- the semiconductor device 11 of the example was manufactured by the manufacturing method shown in FIG. 1 to FIG.
- the bump height is 30 m.
- the laminated film 1 was formed as follows.
- the semiconductor devices of the example and the comparative example were subjected to a temperature cycling test (temperature cycle test) of 150 ° C./5 minutes to 150 ° C./5 minutes, and the number of separated semiconductor elements from the circuit board was measured. Was measured. Table 1 shows the measurement results. table 1
- the number of peeling occurred was 5 out of 10 in 200 cycles, and 10 out of 10 in 400 and 800 cycles. It became.
- the number of occurrences of peeling was 0 out of 10 in 200 cycles, and 1 out of 10 in 400 cycles and 800 cycles.
- the semiconductor device of the present example had far fewer occurrences of separation and improved reliability as compared with the comparative semiconductor device.
- a flip-chip member and a sheet-like encapsulation used for the same that enable highly reliable semiconductor devices to be manufactured with high productivity by flip-chip mounting Material and flip chip mounting 37
- a highly reliable semiconductor device that can be manufactured with higher productivity and a manufacturing method that can manufacture a highly reliable semiconductor device with high productivity by flip-chip mounting are provided.
Description
Claims
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP98923154A EP1030358A1 (en) | 1997-06-11 | 1998-06-05 | Flip-chip member, sheetlike sealing material, semiconductor device, and process for manufacturing the same |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9/154017 | 1997-06-11 | ||
JP9154017A JPH113909A (ja) | 1997-06-11 | 1997-06-11 | フリップチップ部材、シート状封止材料、半導体装置およびその製造方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO1998057370A1 true WO1998057370A1 (fr) | 1998-12-17 |
Family
ID=15575095
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP1998/002512 WO1998057370A1 (fr) | 1997-06-11 | 1998-06-05 | Element comprenant des puces a protuberances, materiau de scellage de type film, dispositif a semi-conducteur et procede de fabrication de ce dernier |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP1030358A1 (ja) |
JP (1) | JPH113909A (ja) |
WO (1) | WO1998057370A1 (ja) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2000057467A1 (fr) * | 1999-03-22 | 2000-09-28 | Gemplus | Procede de fabrication de puces de circuits integres |
EP1061574A1 (en) * | 1999-06-17 | 2000-12-20 | Ming-Tung Shen | Semiconductor device and method for manufacturing the same |
EP1065718A1 (en) * | 1999-06-17 | 2001-01-03 | Ming-Tung Shen | Semiconductor chip module and method for manufacturing the same |
EP1087435A1 (en) * | 1999-09-23 | 2001-03-28 | Ming-Tung Shen | Electro-optic device and method for manufacturing the same |
US6278183B1 (en) | 1999-04-16 | 2001-08-21 | Ming-Tung Shen | Semiconductor device and method for manufacturing the same |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3215686B2 (ja) | 1999-08-25 | 2001-10-09 | 株式会社日立製作所 | 半導体装置及びその製造方法 |
JP6856317B2 (ja) | 2015-02-20 | 2021-04-07 | 株式会社日本触媒 | 硬化性樹脂組成物及びそれを用いてなる封止材 |
WO2016132889A1 (ja) | 2015-02-20 | 2016-08-25 | 株式会社日本触媒 | 硬化性樹脂組成物及びそれを用いてなる封止材 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04363811A (ja) * | 1991-06-07 | 1992-12-16 | Nitto Denko Corp | 異方導電性接着フィルムを用いた実装構造 |
JPH0661304A (ja) * | 1992-08-06 | 1994-03-04 | Nec Corp | 半導体素子のボンディング方法 |
JPH0831870A (ja) * | 1994-07-21 | 1996-02-02 | Toshiba Corp | 半導体装置 |
JPH08298301A (ja) * | 1995-04-26 | 1996-11-12 | Nitto Denko Corp | 半導体装置 |
-
1997
- 1997-06-11 JP JP9154017A patent/JPH113909A/ja active Pending
-
1998
- 1998-06-05 WO PCT/JP1998/002512 patent/WO1998057370A1/ja not_active Application Discontinuation
- 1998-06-05 EP EP98923154A patent/EP1030358A1/en not_active Withdrawn
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04363811A (ja) * | 1991-06-07 | 1992-12-16 | Nitto Denko Corp | 異方導電性接着フィルムを用いた実装構造 |
JPH0661304A (ja) * | 1992-08-06 | 1994-03-04 | Nec Corp | 半導体素子のボンディング方法 |
JPH0831870A (ja) * | 1994-07-21 | 1996-02-02 | Toshiba Corp | 半導体装置 |
JPH08298301A (ja) * | 1995-04-26 | 1996-11-12 | Nitto Denko Corp | 半導体装置 |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2000057467A1 (fr) * | 1999-03-22 | 2000-09-28 | Gemplus | Procede de fabrication de puces de circuits integres |
FR2791471A1 (fr) * | 1999-03-22 | 2000-09-29 | Gemplus Card Int | Procede de fabrication de puces de circuits integres |
US6278183B1 (en) | 1999-04-16 | 2001-08-21 | Ming-Tung Shen | Semiconductor device and method for manufacturing the same |
US6420210B2 (en) | 1999-04-16 | 2002-07-16 | Computech International Ventures Limited | Semiconductor device and method for manufacturing the same |
EP1061574A1 (en) * | 1999-06-17 | 2000-12-20 | Ming-Tung Shen | Semiconductor device and method for manufacturing the same |
EP1065718A1 (en) * | 1999-06-17 | 2001-01-03 | Ming-Tung Shen | Semiconductor chip module and method for manufacturing the same |
EP1087435A1 (en) * | 1999-09-23 | 2001-03-28 | Ming-Tung Shen | Electro-optic device and method for manufacturing the same |
Also Published As
Publication number | Publication date |
---|---|
JPH113909A (ja) | 1999-01-06 |
EP1030358A1 (en) | 2000-08-23 |
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