WO1994023448A1 - Package for semiconductor chip - Google Patents
Package for semiconductor chip Download PDFInfo
- Publication number
- WO1994023448A1 WO1994023448A1 PCT/JP1994/000571 JP9400571W WO9423448A1 WO 1994023448 A1 WO1994023448 A1 WO 1994023448A1 JP 9400571 W JP9400571 W JP 9400571W WO 9423448 A1 WO9423448 A1 WO 9423448A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- layer
- power supply
- package
- ground
- ground layer
- Prior art date
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- H—ELECTRICITY
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- H01L23/00—Details of semiconductor or other solid state devices
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- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
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- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
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Definitions
- the present invention relates to a novel package for mounting a semiconductor element. More specifically, a package for semiconductor device mounting that can reduce simultaneous switching noise at the input and output of the semiconductor device and effectively prevent noise around the package, especially noise generated in the power supply system, from adversely affecting the semiconductor device.
- a package for semiconductor device mounting that can reduce simultaneous switching noise at the input and output of the semiconductor device and effectively prevent noise around the package, especially noise generated in the power supply system, from adversely affecting the semiconductor device.
- Figure 1a shows a schematic cross-sectional view of a semiconductor device mounted on the three-layer structure package.
- This package is composed of three layers: power supply layer 3, ground layer 4, and signal layer 5. Note that the power supply layer and the ground layer may be interchanged.
- Each layer is connected by an adhesive tape 7.
- This adhesive tape 7 also serves as an insulating layer.
- the semiconductor element 2 is mounted on this three-layer package, the semiconductor element and each layer of the package are electrically connected by bonding wires 6, and the external lead 8 of the signal layer is electrically connected to the outside. Used as a lead for That is, the electrical connection to the outside of the power supply layer 4 and the ground layer 3 is performed by connecting to one or a plurality of thin leads of the external lead 8 of the signal layer.
- the semiconductor element and the package include the connection portion and a part of the external lead 8 and are sealed with the resin 9. Have been.
- Figure 1b schematically shows a plan view of a typical example of a power supply layer or a ground layer.
- the plane shape of the power supply layer or the ground layer is a square, and an external lead exists on the outer periphery.
- a large number of through holes are provided in the current-carrying part between the internal lead provided in a frame shape at the center and the external lead.
- FIG. 1c is a schematic cross-sectional view of the package.
- the adhesive tape 7a and the adhesive tape 7b are connected through the through-hole, and act so that the signal layer 5, the power supply layer 4, and the ground layer 3 are laminated more firmly.
- the self-inductance of the power supply layer and the ground layer of such a three-layer package is relatively low, and the noise of the power supply system is relatively low.
- the present inventor has studied to obtain a package with further reduced power supply system noise, and as a result, obtained the following findings and completed the present invention.
- an object of the present invention is to provide a novel package for mounting a semiconductor element with low power supply system noise.
- Another object of the present invention is to provide a multilayer package for mounting a semiconductor element having a power supply layer and a ground layer separately from a signal layer, and having low self-inductance of the power supply layer and the ground layer.
- Another object of the present invention is to provide a multilayer package for mounting a semiconductor element in which a high-capacity capacitor can be formed between a power supply layer and a ground layer in the multilayer package.
- the power supply layer and the ground layer are formed by exposing the inner lead region and the outer lead region exposed from the intermediate layer, and the energization sandwiched between these two regions and covered by the intermediate layer. Area, and
- a package for mounting a semiconductor element characterized in that the entire energized area of each of the power supply layer and the ground layer is substantially constituted by a planar energized member.
- FIG. 1a is a cross-sectional view schematically illustrating a conventional semiconductor element mounting package having a three-layer structure.
- FIG. 1b is a schematic plan view of a typical example of a power supply layer or a ground layer of a conventional package for mounting a semiconductor element having a three-layer structure.
- FIG. 1c is a schematic cross-sectional view of a part of a conventional package for mounting a semiconductor element having a three-layer structure.
- FIG. 1d is a schematic cross-sectional view of a conventional package for mounting a semiconductor manufactured for comparison with the package for mounting a semiconductor element of the present invention.
- FIG. 2 is a schematic plan view showing a typical example of a power supply layer or a ground layer of the package of the present invention.
- FIG. 3 is a diagram for explaining an internal lead region, an external lead region, and a conduction region of a power supply layer or a ground layer.
- FIG. 4 is a diagram schematically showing a plan view of a power supply layer or a ground layer which may be used for the package of the present invention.
- FIG. 5 is a diagram for explaining a current-carrying region of the power supply layer or the ground layer shown in FIG.
- FIG. 6 is a schematic plan view of a lead frame that can be used as a signal layer of the semiconductor element mounting package of the present invention.
- FIG. 7 is a cross-sectional view schematically showing one embodiment of the semiconductor element mounting package of the present invention.
- FIG. 8 is a cross-sectional view schematically showing one embodiment of the semiconductor element mounting package of the present invention.
- FIG. 9 is a cross-sectional view schematically showing one embodiment of the semiconductor element mounting package of the present invention.
- FIG. 10 is a cross-sectional view schematically showing one embodiment of the semiconductor element mounting package of the present invention.
- FIG. 11 is a cross-sectional view schematically showing one embodiment of the package for mounting a semiconductor element of the present invention.
- FIG. 12 is a schematic cross-sectional view showing one example of an intermediate layer between the power supply layer and the ground layer.
- FIG. 13 is a schematic cross-sectional view showing one example of an intermediate layer between the power supply layer and the ground layer.
- FIG. 14 is a cross-sectional view schematically showing one embodiment of the semiconductor element mounting package of the present invention.
- FIG. 15 is a schematic cross-sectional view showing one example of an intermediate layer between the power supply layer and the ground layer.
- FIG. 16 is a plan view of a copper plate for a power supply layer of the package manufactured in the tenth embodiment.
- FIG. 17 is a plan view of a copper plate for a power supply layer of the package manufactured in the tenth embodiment.
- FIG. 18 is a plan view of an aluminum thin plate for a power supply layer of a package manufactured in Example 12.
- FIG. 19 is a plan view of an aluminum thin plate for a ground layer of a package manufactured in Example 12.
- FIG. 20 is a cross-sectional view schematically showing one embodiment of the semiconductor element mounting package of the present invention.
- FIG. 7 is a diagram schematically showing a cross-sectional view of one embodiment of the package of the present invention.
- a power supply layer 52 is laminated on a ground layer (51) via an insulating layer (ceramic layer) 39 serving as an intermediate layer, and further an insulating layer (adhesive layer) 4 4 , A signal layer is laminated.
- the ground layer 51 is provided with an external lead region 36 and an internal lead region 35 which are formed so as to be exposed from the insulating layer 39. Region 38 exists. This energized area Region 38 is covered by insulating layer 39.
- the power supply layer 52 is provided with an external lead region 34 and an internal lead region 33 which are formed by being exposed from the insulating layer 44. There are three seven. This energized area 37 is covered with an insulating layer 44.
- the entire energized area 38 of the ground layer 51 and the energized area 37 of the power supply layer 51 are substantially constituted by energized members.
- the power supply layer and the ground layer are each composed of an internal lead region, an external lead region, and an energization region sandwiched between these two regions.
- the inner lead region and the outer lead region are formed so as to be exposed from the insulating layer laminated with the power supply layer or the ground layer, and the energized region is covered with the insulating layer.
- FIG. 2 schematically shows a plan view of a typical example of a power supply layer or a ground layer.
- the power supply layer or the ground layer indicated by 10 has an external lead 11 on the outer periphery thereof to form an external lead area, and an intermediate area surrounded by a dotted line and a solid line has an internal lead.
- the existing internal lead regions 12 are present, and the region sandwiched between these regions is the conduction region 14.
- a portion 13 surrounded by a solid line is a position where the semiconductor element is located, and may be deleted.
- the internal lead region in the power supply layer or the ground layer 10 is a planar region 12 which is sandwiched between a frame surrounded by a solid line and a frame surrounded by a broken line, and is hatched.
- the external lead area is an area 15 where hatching is applied and the external lead 11 is present.
- the region between the outer lead region 15 and the inner lead region is a conduction region 14, There are current carrying members.
- the internal lead region 12 and the external lead region 15 are formed so as to be exposed from the intermediate layer laminated with the power supply layer or the ground layer, and the energized region 14 is covered with the intermediate layer. .
- each lead of the internal lead region and the external lead region is electrically connected by the planar conduction member having substantially no deletion present in the conduction region 14. That is, the entire energizing region 14 is practically constituted by a planar, for example, planar energizing member. Therefore, there is virtually no through-hole (see Figure lb) as a missing part that existed in the current-carrying regions of the power supply layer and the ground layer of the conventional three-layer package.
- the power supply layer, the ground layer, and the signal layer having such a current-carrying region are strongly bonded and laminated by an intermediate adhesive layer, which will be described in detail later. No resin reinforcement is required. Therefore, it is possible to substantially eliminate the linear current-carrying portion existing in the sealing portion of the conventional package.
- the self-inductance of the power supply layer and the ground layer of the package of the present invention can be 2 nH or less, preferably 1 nH or less.
- the value of the self-inductance of each layer is
- the value is measured between a lead portion located 1 mm outside the outer edge of the sealing resin and the internal lead.
- a high-capacity capacitor for example, a capacitor having a capacitance of 500 pF or more, for example, 500 to 100 pF, can be formed between the power supply layer and the ground layer.
- the power supply system noise of the package for mounting a semiconductor device having a multilayer structure of the present invention is extremely smaller than that of the conventional package.
- FIG. 4 is a plan view schematically showing an example in which a power supply layer or a ground layer is divided with a slight gap.
- the energization area in this example is shown by FIG. That is, in FIG. 5, a frame-like inner lead area 12 surrounded by a broken line and hatched, and an outer lead area 15 including the outer lead 11 hatched and including the outer lead 11 are shown.
- the energized area 14 is sandwiched therebetween.
- the area excluding the deletion 16 is made of an energized member. If the deletion 16 has a very small area, the power supply layer or the ground layer shown in FIG. 4 can be used for the package of the present invention.
- the current-carrying regions 14 are formed of planar current-carrying members, they can be used as the power supply layer or the ground layer of the present invention. Can be.
- the shape of the internal lead existing in each of the internal lead regions of the power supply layer and the ground layer is not particularly limited as long as it constitutes a terminal connected to the semiconductor element. Not done.
- Examples of the shape of the internal lead include a wire shape and a planar shape. Can be. If it is planar, it may have holes. In particular, it is preferable to make the internal leads planar, because there is no need to separately provide a bonding pad for wire bonding.
- the external leads existing in the respective external lead regions of the power supply layer and the ground layer are not particularly limited as long as they constitute terminals that can be electrically connected to wirings leading to the power supply and the ground.
- These external leads are external leads of the signal layer if necessary, and are connected to external leads that are not used for signals, and are connected to external leads for power, ground, and signals. Collectively, it can be bent into gullwing, J-lead, etc.
- a capacitor is formed between the empty lead of the ground layer adjacent to the signal layer or the power supply layer and the signal layer. Further, a capacitor is formed between empty leads of the signal layer to which external leads of the power supply layer and the ground layer are joined. The formation of these capacitors leads to an increase in the capacitance of the capacitors between the power supply layer and the ground layer, with favorable results.
- the thickness of the power supply layer and the ground layer is preferably from 1 to 100 m, particularly preferably from 10 to 300 m, from the viewpoint of reducing self-inductance and obtaining a smaller package. It is.
- a conventionally known semiconductor element a signal layer (lead frame) of a single-layer or multi-layer package for mounting can be used.
- a plurality of internal leads and a plurality of external leads are electrically connected by a linear conductive member.
- FIG. 6 schematically shows a plan view of a typical example of the signal layer.
- the external leads 22 are connected by tie bars 21 so that the lead wires do not fall apart.
- the diver 21 is cut and removed after the semiconductor element is mounted.
- the electric signal from the external lead 22 is supplied to the live section 23, the internal lead 24 and the bonding wire. (Not shown) to the semiconductor device.
- the material constituting the power supply layer, the ground layer, and the signal layer is not particularly limited as long as the material has conductivity, and a material having a melting point of 400 or more is preferable. Due to such a high melting point, when the semiconductor element is bonded to a package, when thermocompression bonding is performed during wire bonding, or when the package on which the semiconductor element is mounted is further sealed with a cap, etc. The trouble that the material melts can be avoided.
- a conductive material having a melting point of 40 OeC or more As such a conductive material having a melting point of 40 OeC or more, Au, Ag, Cu, AW, Mo, Mn, Ni, Fe, Co, Be, Cr, Ir, Pure metals such as Rh, Pt, Pd, and 0 s, and alloys containing at least one of these metals are preferred.
- Materials for the power and ground layers include pure metals such as Au, Ag, Cu, Al, W, Mo, and Mn, which have low magnetic permeability in order to reduce self-inductance. Alloys containing at least one of the following metals are preferred.
- Cu or Cu alloy-based materials are preferable when the insulating layer is made of ceramics, since the ceramics can be firmly bonded to the ceramics by an inorganic adhesive such as a brazing material. More specifically, oxygen-free copper, tough copper, Cu—Sn alloy (EFTEC—3S, etc.), Cu—Zr alloy (CA—151, etc.), Cu—Fe alloy (CA-194, etc.) and phosphor bronze.
- a or an A ⁇ alloy is preferably used as a material for these two layers the c can, when using a low bondability with the adhesive layer of the intermediate layer metal as the material of the power supply layer or ground layer, main luck method junction having good metallic layer of the adhesive layer on the surface It can be provided by means such as vapor deposition or cladding.
- the signal layer is not particularly required to have low self-inductance, the signal layer can be selected from a wide range of materials. Concrete Fe—Ni alloy, eg, 42% Ni—remaining Fe, Co—Ni—Fe alloy, eg, Kovar R (K ovar R : 25-34% Ni—15-20% C o —remaining Fe), Cu and Cu alloys are preferred.
- the signal layer be located outside the power supply layer and the ground layer in order to form a high-capacity capacitor between these layers. Therefore, the order of lamination of the power supply layer, the ground layer, and the signal layer is typically as follows.
- an intermediate layer exists between these adjacent layers.
- the first type of intermediate layer is a type including a ceramic layer and an inorganic adhesive layer as an insulating layer.
- the ceramic as the insulating layer one having a thermal conductivity (300 K) of 1 W / m ⁇ K or more is preferable because the heat dissipation of the package of the present invention can be further improved.
- the preferred ceramics are glass ceramics, mullite, zircon, forsterite, steatite, silica glass, Vycor glass, partially stabilized zirconium, silicon nitride, alumina, aluminum nitride, and carbonized carbon. Examples include silicon, agnea, beryllia, boron nitride, and diamond. Of these, the most preferred is nitriding, which has sufficient mechanical strength. Aluminum and alumina.
- the content of alumina in the ceramic is usually preferably 80 to 99.9% by weight.
- the alumina, Mg 0, C a 0, S i 0 sintering aid such as 2 and T i 02, C r 2 0 3, Mo 0 3, C 00, Mn 0 2 and F e 2 0 3, etc. May be included.
- the content of aluminum nitride in the ceramic is preferably 80 to 99.9% by weight.
- the aluminum nitride, C a 0, S r IIA group elements compound such as 0, Y 2 0 3, D y 2 0 3 s H o 2 0 3, E r 2 0 3, Y b 2 0 3 , etc. contained sintering aids such as group IIIA compound, W0 3, Mo 0 3, T i 0 2, V 2 0 5, N b 2 0 5, C o 3 0 4, N i 0 colored compounds such as etc. It may be.
- an insulating layer existing in an intermediate layer between the power supply layer and the ground layer can be formed.
- the thickness of the ceramic layer as the insulating layer is not particularly limited, but is preferably 30 m or more, particularly 100 to 500 m. When the thickness is 30; / m or more, there is an advantage that the connection between the power supply layer and the ground layer can be easily performed.
- a package in which the current-carrying members of the power supply layer and the ground layer are made of copper or a copper alloy, and the main component of the ceramic is alumina or aluminum nitride has a high heat dissipation property, It is preferable because the difference in the coefficient of thermal expansion between the ceramic layer and the ceramic layer (insulating layer) is small and strong against temperature changes.
- a package can be suitably used particularly as a package for a semiconductor device with high speed and high power consumption, such as a microprocessor and an ECL gate array.
- the bonding of the ceramic to the power and ground layers is made of inorganic adhesives such as low-melting lead glass and lead borosilicate glass, and conductive materials such as Ag-glass mixed with these glass and Ag components.
- An inorganic adhesive having: Ag—Cu-based wax (eg, 15 to 85% by weight of Ag, 5 to 85% by weight of Cul), Ag—Cu—Ti wax (eg, Ag 15-85 wt%, Cu 15-85 wt%, Ti 0.05-20 wt%, Ag—Cu—Zr wax (eg, Ag 15 to 85% by weight, 111 to 85% by weight, ZrO.O 5 to 20% by weight), and a conductive metal adhesive consisting of a precious metal brazing such as Au-Cu brazing. it is.
- these inorganic adhesive is heated to 700 ⁇ 1 1 00 ° C in vacuum or non-oxidizing atmosphere (N 2, H 2, a r, H e or these mixed gas) supply Layer, ground layer and ceramic layer are joined.
- the ceramic layer (insulating layer) and the power and ground layers bonded in this way are strongly bonded. Its adhesive strength is 1 kcm or more at 90 ° beer separation strength. Since the ceramic layer (insulation layer) is strongly bonded to the power supply layer and the ground layer in this way, the conventional three-layer package is provided on the power supply layer and the ground layer to improve the bonding strength. No through hole is required, and a current-carrying member having substantially no deletion can be present in the current-carrying region.
- the surface of the ceramic layer particularly the surface of the power supply layer and the ground layer, which are formed in a planar shape, which are bonded to the current-carrying regions are covered with an oxide film.
- an oxide film is preferably 0.1 to: L0 m.
- FIGS. 7 to 11 schematically show cross-sectional views of several types of packages in the case where an intermediate layer between a power supply layer and a ground layer is formed from a ceramic insulating layer and an inorganic adhesive layer.
- the current-carrying member in the current-carrying region 37 and the ceramic layer 39 are joined via a thin inorganic adhesive layer (not shown).
- a thin inorganic adhesive layer (not shown).
- an outer lead region 36 and an inner lead region 35 of the ground layer 51 are provided on the other surface of the ceramic layer 39.
- ′ There is an energized area 38 of the ground layer 51 that is sandwiched.
- the current-carrying member in the current-carrying region 38 and the ceramic layer 39 are joined via a thin adhesive layer (not shown).
- the internal lead area of the power supply layer 52 has a frame shape.
- the semiconductor element 32 is fixed to a portion of the ground layer 51 surrounded by the internal lead region 35 via a ceramic insulating layer or a layer 45 made of a low thermal expansion metal such as molybdenum.
- a signal layer 53 is provided on an energized region 37 of the power supply layer 52 via an insulating layer 44.
- the insulating layer 44 is made of an insulating organic polymer described later.
- the semiconductor element 32, the ground layer 51, the power supply layer 52, and the signal layer 53 are wire-bonded to their respective internal leads.
- a concave cap 43 is provided on the signal layer 53 via a sealing material 40.
- a frame may be provided via the sealing material 40, and the cavities may be filled with the sealing agent and cured. Further, the outer surface of the ground layer may be exposed as shown in FIG. 7, or the outer surface may be covered with a ceramic or other insulating material.
- the package 46 shown in FIG. 8 is obtained by replacing the power supply layer and the ground layer in FIG. Providing the ground layer directly under the signal layer reduces crosstalk noise. Further, since there is no through-hole in the power supply layer, further lower self-inductance is achieved.
- the signal layer 53 is provided on the power supply layer 52 via the ceramic insulating layer 47. Otherwise, it has the same structure as the package shown in Fig. 7.
- a terminating resistor for reducing reflected noise can be provided between the external lead of the signal layer 53 and the external lead 36 of the ground layer 51.
- the package 49 shown in FIG. 10 since the ground layer 51 and the power supply layer 52 are formed on the ceramic layer 54 as a base, each of them has a frame shape. The cutout portion surrounded by the internal lead region 33 of the power supply layer 52 is closed by a ceramic layer 54 serving as a base, and the semiconductor layer 3 2 is fixed.
- Other structures are the same as those of the package 46 shown in FIG.
- the insulating layer 44 can be a ceramic layer.
- the package 56 shown in FIG. 11 has a package 49 shown in FIG. 10 and a power supply conducting layer 55 joined to the ceramic layer 54 to which the semiconductor element 32 is fixed. It has a structure which has.
- the power supply conducting layer 55 and the external lead 34 of the power supply layer 52 are electrically connected outside the package.
- the outer surface of the power supply conductive layer 55 may be exposed or may be covered with an insulating material such as ceramic.
- the second type of intermediate layer between the power supply layer and the ground layer comprises an organic adhesive layer and an insulating layer provided in the adhesive layer, preferably substantially at the center.
- the insulating layer examples include a ceramic thin plate, a resin film, and a metal plate in which both surfaces are covered with a metal oxide film or an insulating resin film.
- FIG. 12 schematically shows a cross-sectional view in a case where the insulating layer 61 is disposed substantially at the center of the adhesive layer 62 and an intermediate layer is provided between the power supply layer and the ground layer.
- Resin films include silicon resin, polyurethane resin, epoxy resin, acrylic resin, polyimide resin, polyamide resin, fluororesin, phenolic resin, polyester resin (polyethylene terephthalate resin), Resin films such as polyacetal resin, polycarbonate resin, polysulfone resin, polyarylate resin, polyetherketone resin, and polyphenylene sulfide resin can be given.
- M g, aT i, Z r , ⁇ ⁇ can be exemplified those covered with a film of oxide of a metal such as N b N T a.
- the oxide coating can be formed by a known method described later.
- Metal sheets such as A, Cu, Ni, 42% Ni—Fe alloy, Kovar, or plates of these alloys are considered to have both surfaces covered with insulating resin film. Examples thereof include those having both surfaces coated with a resin such as a silicone resin, an epoxy resin, a fluorine resin, a polyphenylene sulfide resin, or a polyester resin.
- the thickness thereof is preferably 0.5 to 500 m.
- a metal plate covered with a metal oxide film and having the above thickness can make the thickness of the insulating layer extremely thin, so a large-capacity capacitor must be placed between the power supply layer and the ground layer. It is preferable because it can be formed.
- the relative permittivity of the metal oxide film or the insulating resin film is preferably 2 or more in order to form a large-capacity capacitor.
- the adhesive layer is preferably one that can maintain the adhesive strength between the intermediate layer and the power supply layer or the ground layer to beer strength of 1 kg Zcm or more.
- the adhesive layer can be formed from an organic insulating adhesive and an organic conductive adhesive. These organic adhesives can be handled in the form of a film, and have the feature that the thickness can be easily controlled during bonding.
- organic insulating adhesive examples include epoxy resin, polyurethane resin, silicon resin, acrylic resin, polyimide resin, polyamide resin, fluororesin, phenol resin, Known adhesives such as polyester resin and nitrile rubber can be used. These adhesives include inorganic fibers such as alumina fibers and glass fibers and silica, alumina, mullite, aluminum nitride, silicon carbide, and silicon nitride. Can be used in combination.
- Examples of the organic conductive adhesive include those obtained by adding a conductive substance such as AII, Ag, Pd, and Cu to the organic insulating adhesive described above.
- the thickness of the insulating layer present in the second type of intermediate layer is from 0.5 to 350 m, particularly from 2 to 150 m, from the viewpoint of increasing the adhesive strength and the capacity of the capacitor formed by the power supply layer and the ground layer. m is preferable.
- the second type of intermediate layer between the power supply layer and the ground layer in which a ceramic thin plate or a resin film as an insulating layer is interposed in the adhesive layer is shown in FIGS. 7 to 11. In the package shown, it can be used in place of the intermediate layer including the ceramic insulating layer 39.
- the third type of intermediate layer is substantially composed of only an insulating adhesive layer, and the adhesive layer forms an insulating layer between the power supply layer and the ground layer.
- Examples of the adhesive for forming the adhesive layer include the above-mentioned organic insulating adhesive and inorganic insulating adhesive.
- Such an intermediate layer of the third type as an insulating layer substantially composed only of an insulating adhesive layer is a ceramic insulating layer in the package shown in FIGS. 7 to 11. It can be used in place of the intermediate layer containing 39.
- an insulating layer is formed on at least one of the two current-carrying member surfaces (metal surfaces) present in opposing current-carrying regions of the power supply layer and the ground layer; There is an adhesive layer between the layer and the ground layer.
- FIG. 13 schematically shows a cross-sectional view in a case where the insulating layer 63 is formed on the surface of the ground layer 51 and the power supply layer 52 is laminated via the adhesive layer 64.
- the intermediate layer existing between the power supply layer 52 and the ground layer 51 can be replaced with the above-described fourth type intermediate layer.
- Form insulating layer on metal surface in energized area examples include a method of forming a metal oxide film on a portion where the metal surface contacts the adhesive layer and a method of coating an insulating resin.
- an insulating layer having a high dielectric constant can be formed with a thin oxide film of about 0.1 m.
- a capacitor having a higher capacity can be formed between the power supply layer and the ground layer.
- the metal of the current-carrying member in the current-carrying region and the metal of the metal oxide film formed on the surface thereof may be different or the same.
- Suitable materials for forming the oxide film include Mg, A, Ti, Zr, Hf, Nb, Ta, and alloys containing these metals. Oxide films of these metals have a high relative dielectric constant and are suitable for increasing the capacitance of the formed capacitor. Of these, A and Ta are particularly preferred in terms of electrical insulation.
- aluminum for example, high-purity aluminum (materials according to JIS: 1N90, 1N99, etc.), aluminum alloys (materials according to JIS: 1085, 1080, 1060, 1100, 1200, 1 N 30, 2024, 5052, 5056, 6063, 7075 etc. can be used.
- Resistivity of the oxide layer of high purity aluminum for example, in the case of anodic oxidation coating A, dry 20 10 15 ⁇ ⁇ cm or so, a 1 0 14 ⁇ cm approximately at 200 ° C, sufficiently high electrical insulating property .
- the functions as a package of an insulating layer of the present invention is specific resistance is sufficient as long as room temperature 1 0 8 ⁇ ⁇ cm or more, the oxide film of the high purity Al Miniumu package of insulating layers of the present invention Can function satisfactorily.
- a known method for forming the metal oxide film on the metal surface a known method can be employed without particular limitation.
- 0 2, H 2 0, C 0 method of high temperature heating in an oxidizing atmosphere containing 2 or the like who is anodized in an electrochemical technique Method, a chemical conversion method and the like can be suitably used.
- the metal oxide film formed by anodic oxidation has high electrical insulation, high hardness, and a porous structure consisting of fine pores. Can be preferred.
- a solution obtained by dissolving the insulating resin in a solvent or a paste of a curable insulating resin is applied by a spin coating method, a screen printing method, a spray method, an electrodeposition method, or the like.
- a method of forming an insulating resin film at a predetermined place by means such as an immersion method, a method of heat-fusing an insulating resin powder or an insulating resin film, or the like can be employed.
- P b T i 0 3 - can also be left by mixing P b Z r 0 3, B a T i 0 high conductivity Sera Mi click substances such as 3 .
- the intermediate layer between the power supply layer and the ground layer has an adhesive strength of 90 between the power supply layer and the ground layer. It is preferable that the beer peel strength be 1 kg / cm or more, particularly 1.5 km / m or more.
- Such high-strength bonding eliminates the need for conventional through holes in the power and ground layers. As a result, the self-inductance of the power supply layer and the ground layer is reduced.
- the capacitance of the capacitor formed by the power supply layer and the ground layer is 110 pF or more, particularly 200 to 500 p, for the purpose of reducing noise. It is preferably F.
- the intermediate layers between the power supply layer and the ground layer of the first to fourth types described above can also be used as intermediate layers between the power supply layer and the signal layer or between the ground layer and the signal layer.
- a base may be provided outside the power supply layer and the ground layer in contact with the power supply layer or the ground layer.
- the base is laminated in contact with the power supply layer or the ground layer via the above-mentioned insulating adhesive layer, and the presence of the base precedes the intermediate layer existing between the power supply layer and the ground layer.
- the recording eves 2 to 4 it is possible to form the intermediate layer by controlling the thickness of the intermediate layer with extremely high precision. As a result, an extremely thin intermediate layer of 350 m or less can be formed stably, and a high-capacity capacitor can be formed between the power supply layer and the ground layer with good reproducibility.
- FIG. 14 and FIG. 15 schematically show cross-sectional views of one embodiment of the package of the present invention provided with a base.
- the semiconductor element 32 is bonded on the base 71, and the power supply layer 52 is bonded to the base by the adhesive layer 76.
- the external leads of the power supply layer 52 are electrically connected to the empty leads 72 and 73 of the signal layer.
- 74 and 75 indicate intermediate layers (insulating layers), and 40, 42 and 43 indicate the same as in FIG.
- 77 is an insulator such as resin. That is, the portion of the package 80 below the signal layer is covered with the insulator 77.
- the substrate is not particularly limited as long as it has a bending strength that does not substantially deform due to pressure applied to the surface when the power supply layer, the ground layer, and the like are bonded by the adhesive bond layer.
- the substrate may be formed using a known material so as to have a thickness satisfying such characteristics.
- the above materials include Cu, Ag, Au, Be, Mg, Zn, Cd, iGa, In, T, Ge, Sn, Pb, Sb, Bi, Ti. , Zr, Hf, V, Nb, Ta, Cr, Mo, W, Mn, Tc, Re, Fe, Co, Ni, Ru, Rh, Pd, Os , Ir, Pt, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu And alloys containing these metals can be used.
- high-purity aluminum alloy (1N90, 1N99, etc. specified in JISH 4170)
- aluminum alloy JIS 114000 or 13H41 1085, 1080, 1060, 1100, 1200, 1N30, 2024, 5052, 6063, 7075, etc. specified in 00 can be used.
- Cu for example, oxygen-free copper (C-1 020, C-1 101 1 specified in JISH 3100 or JISH 35 101), tough pitch copper (material according to JIS standard; C-1 100), Z r—Cu alloy (Material according to JIS: C—15 1 (0.05 -0.15% Zr—remaining copper)), Fe—Cu alloy (Material according to JIS: C-194 (2.3% Fe-0.1 2% Zn-0.03% P-Copper remaining)), Cr-Cu alloy (JIS standard material; OMC L-1 (0.3% Cr-0.1% Zr -0.05% Mg -0.02) % S i —remaining copper)) etc.
- OMC L-1 (0.3% Cr-0.1% Zr -0.05% Mg -0.02
- S i —remaining copper
- alloys such as W—Cu alloy (Cu: 1 to 50% by weight), Mo—Cu alloy (Cu: 1 to 60% by weight), and Cu—M0—Cu, Cu—
- a clad plate such as Kovaru Cu, Cu—Invar—Cu can also be used.
- the base material may be aluminum nitride sintered body, silicon carbide based sintered body, beryllia based sintered body, alumina based sintered body, magnesia based sintered body, zirconia based sintered body.
- Materials such as ceramic, zircon-based sintered body, mullite-based sintered body, crystallized glass, amorphous glass, etc., and composite materials such as alumina fiber reinforced aluminum, carbon fiber reinforced plastic, etc. Can also be used.
- the base acts as a heat sink of the package, and extremely.
- a semiconductor element mounting package having good heat dissipation can be obtained.
- the base is preferably in the form of a fin in order to efficiently dissipate heat.
- the shape of the fin is generally skewed, and other shapes such as a cylinder and a prism can also be adopted.
- the material of the base is a metal
- an electrical insulating film such as an oxide film or a film made of an insulating resin on the surface by a known method.
- the non-laminated surface of the base does not necessarily need to be entirely exposed to the outside of the package, and may be a state in which a part or the whole is covered with an insulator.
- the package shown in FIG. 15 shows an aspect in which the side surface of the base 71 is covered with an insulator 77 such as an insulating resin.
- a power supply layer, a ground layer, and a signal layer can be laminated on the surface thereof with extremely high thickness accuracy via an adhesive layer to form a package.
- the power and ground layers are joined with empty leads that are not used as signal lines of the signal layer lead frame, for example, electric welding such as spot welding, arc welding, electron beam welding, laser welding, and hang. It is joined by means such as brazing, brazing, bonding with a conductive adhesive, ultrasonic bonding, and crimping, and can be integrated on a lead frame.
- the electrical exchange between the power supply layer and the ground layer and the outside is performed via the lead of the joined lead frame.On the other hand, when the joining is performed by welding, for example, the power supply layer and the ground layer are connected.
- the lead frame is bent into a gull-wing, J-shape, etc. by a normal method, and is used for mounting. You.
- a cap 43 can be provided in the opening of the package via a sealing layer 40 as shown in each drawing.
- a sealing layer 40 as shown in each drawing.
- the method of manufacturing a package for mounting a semiconductor element according to the present invention is, as specifically shown in Examples, for example, a method in which a thin metal plate processed into a predetermined shape is formed on a rigid base with an adhesive layer interposed therebetween.
- a method is used in which conductive layers such as a power layer and a ground layer, and further a signal layer (lead frame) are sequentially laminated in a predetermined order.
- Example 1
- a package for mounting a semiconductor element having a cross-sectional structure shown in FIG. 10 was manufactured according to the procedure described below.
- An aluminum nitride substrate ( ⁇ ) having a square-shaped (21.5 mm square) notch having a side length of 21.5 mm in the center and having no through hole was prepared.
- Amm square means “square shape with a side length of A mm”.
- the aluminum nitride substrate (I) becomes the base 54 of the package shown in FIG.
- the aluminum nitride substrate ( ⁇ ) becomes an insulating layer (ceramic layer) 39.
- An active metal brazing powder paste having a composition of 40% by weight of Ag, 57% by weight of Cu, and 3% by weight of Ti was applied on one side of the aluminum nitride substrate (I) and on both sides of the aluminum nitride substrate ( ⁇ ). It was applied to a thickness of 40 m. Separately, it is the same shape and thickness as the copper plate (I) with a corner of 38.8 8 111 111 square thickness 150/111, 18.5 mm square notch in the center, 21.8 mm square in the center A copper plate ( ⁇ ) having a notch was prepared. These copper plates each had a total of 32 external leads with a width of 0.3 mm on each of the four sides.
- the inner lead area is the area between the 18.5 mm square and the 21.5 mm square in the center, and the area between the 21.8 mm square and the 23.8 mm square, respectively. It is.
- the outer lead area is the area between the 38.8 mm square and the 50 mm square.
- the copper plate (I) becomes the power supply layer 52, and the copper plate ( ⁇ ) becomes the ground layer 51.
- An aluminum nitride substrate (I), a copper plate (I), an aluminum nitride substrate ( ⁇ ), and a copper plate ( ⁇ ) were stacked in this order, heated at 890 ° C. for 20 minutes in a vacuum, and joined to obtain a laminate.
- a 2 m-thick A thin film was deposited on the exposed portion of the copper sheet ( ⁇ ⁇ ) of the obtained laminate, except for the external lead.
- a low thermal expansion type lead borate-based glass powder base (LS-3051 and LS-0451, manufactured by NEC Corporation) was applied and baked.
- This lead frame is made of a low thermal expansion type Ni-C0-Fe alloy (Kovar R ), has a thickness of 150 m, an external lead width of 0.3 mm, and an external lead pitch. Is 0 65 mm, and A is deposited on the inner lead to a thickness of 2 m.
- Kovar R low thermal expansion type Ni-C0-Fe alloy
- the outer leads of the power supply layer (copper plate (I)) and the ground layer (copper plate ( ⁇ )) and 64 external leads that are not used for signal of the signal lead frame are welded, and the cavities are reduced. Only the signal lead frame was bent into a gull-wing shape in the direction of, and the Sn lead was applied to the external lead of the signal lead frame.
- the self-inductance of the power supply layer and the grounding layer of the package of the present invention obtained by the above method was measured. In the following Examples and Comparative Examples, the self-inductance is determined by the value measured as described above.
- a wire bonding is performed by ultrasonic method (diameter 30 m, Vcc (power supply), GND (ground), lead (or bin). Simultaneous switching noise was measured.
- Power supply layer 3 is thick It consists of a 150 mm, 26 mm square copper flat plate, and two external leads (three each side) with a width of 0.3 mm and a length of 2 mm protrude from the outer edge of the 26 mm square.
- the ground layer 4 is 150 ⁇ m thick and 26 mm square, with a 10.5 mm square notch in the center, and a 0.3 mm wide, 2 mm long external recess from the outer edge of the 26 mm square. 1 door 1 2 8 8 3 on each side)
- Each of the power supply layer 3 and the ground layer 4 has 40 circular holes (through holes) with a diameter of 1.5 mm in each of the 26 mm square flat plates.
- the signal layer 5 is a 196-lead copper lead frame having the shape shown in FIG. 6, and has a thickness of 150 / im, an external lead width of 0.3 mm, and an external lead pitch of 0.65 mm.
- the power supply layer 3 and the ground layer 4 are adhered by a thermosetting polyimide tape 7 having a thickness of 38 m, and the ground layer 4 and the signal layer 5 are similarly adhered.
- the outer leads of the power supply layer 3 and the grounding layer 4 extending outward from the outer edges of the 26 mm square are welded to dedicated power supply and grounding leads of the signal lead frame.
- a 0.4 mm thick semiconductor element 2 is mounted within a 9 mm square at the center of the power supply copper plate, and is wire-bonded to the internal leads of the power supply layer 3, the ground layer 4, and the signal layer 5.
- the internal lead regions of the power supply layer 3, the ground layer 4, and the signal layer 5 were sandwiched between the central 9 mm square and 10.5 mm square, and the 10.5 mm square and 12 mm square, respectively. This is the part sandwiched between the 12 mm square and the 13.5 mm square.
- the outside of such a structure is sealed with black epoxy resin 9.
- the external shape of the package sealed with this epoxy resin is 3.5 mm thick and 34 mm square.
- Example 4 Silicon carbide (Example 3) Alumina (Example 4) I got As a result, the ratio of the current-carrying members in the current-carrying region was 100%, and the self-inductance of the power supply layer and the ground layer was almost the same as in Example 1.
- Table 1b The results shown in Table 1b were obtained for the capacitor capacity, adhesive strength and thermal resistance. Table 1b
- Example 5 The sealing was performed in the same manner as in Example 1, but the reliability was not a problem.
- Example 5 The sealing was performed in the same manner as in Example 1, but the reliability was not a problem.
- a package was prepared in the same manner as in Example 1 except that the A1 thin film was made to have an Ag plating and an electroless Ni plating was made to have a thickness of 2.5 m. Thereafter, the wire bonding properties, electrical characteristics of the package, heat dissipation characteristics, and sealing reliability were examined.
- Example 6 Joining the A g of copper plate in Example 1 - C u -T i system without using the Hare active metal filtration of, except conducted with C u- 0 2 based eutectic in direct 1065 ⁇ 1 083 ° C
- a package was prepared in the same manner as in Example 1 (however, an aluminum nitride substrate which had been previously subjected to oxidation treatment and had a 1.2 ⁇ m alumina film formed on the surface was used).
- the wire bonding properties, the electrical properties of the package, the heat radiation properties, and the reliability of the sealing were examined.
- the 90 ° peeling strength between the power supply layer and the insulating layer and between the ground layer and the insulating layer was lOkgZcm.
- Example 1 the following two types of Zr—Cu alloys (21 *: 0.15%, remaining 0 1; copper 15%) and Fe—Cu alloys (Fe) were used instead of copper plates. : 2.3%, Zn: 0.12 P: 0.03%, remaining Cu; CA-194)
- a package was produced in the same manner as in Example 1 except that a plate was used.
- the wire bondability, package electrical characteristics, heat radiation characteristics, and sealing reliability were equivalent to those of Example 1.
- the 90 ° peeling strength between the power supply layer and the insulating layer and between the ground layer and the insulating layer was 17 kgZcm.
- Example 1 a Ni—Co—Fe alloy (Kovar R ) plate having a thickness of 125 m was used in place of the copper plate, and the brazing material composition was Ag: 40% by weight, Cu: 55% by weight, Ti A package was prepared in the same manner as in Example 1 except that the content was 5% by weight.
- Example 9 We examined wire bonding, package electrical characteristics, heat radiation characteristics, and sealing reliability. We found that the self-inductance of the power supply system tended to increase slightly (approximately 0.33 to 0.3 mH; frequency 50 MHz). Others were at the same level as in Example 1. Power and insulation layers and connections The 90 ° peeling strength between the formation and the insulating layer was 8.5 kgcm. Example 9
- the power supply layer and the ground layer are replaced with those shown in the plan view of FIG. That is, a power supply layer and a ground layer divided into four by a 1.5 mm-width linear deletion 16 were used. Otherwise, Example 1 was repeated.
- Example 10 The area of the current-carrying member in the current-carrying area was 93%. The self-inductance of the power layer and the ground layer was 0.5 nH. Other electrical properties and adhesive strength were almost the same as in Example 1.
- Example 10 The area of the current-carrying member in the current-carrying area was 93%. The self-inductance of the power layer and the ground layer was 0.5 nH. Other electrical properties and adhesive strength were almost the same as in Example 1.
- Example 10 The area of the current-carrying member in the current-carrying area was 93%. The self-inductance of the power layer and the ground layer was 0.5 nH. Other electrical properties and adhesive strength were almost the same as in Example 1.
- a package for mounting a semiconductor device having the structure shown in FIG. 14 was prepared by the following method.
- Each of these copper thin plates has an external lead 11 with a width of 0.2 mm 11 (10 on each side) protruding outside.
- This lead is created so that it does not overlap.
- a wire bonding area 33 is provided on one side of these copper thin plates, and Ag plating is applied.
- This plating is applied to the part sandwiched between the 19.5 mm square and 23.5 mm square in the case of the copper thin plate forming the power supply layer 52, and to the 21.8 mm square and 25.8 mm square in the case of the copper thin plate forming the ground layer 51. It is applied to the part to be sandwiched.
- a black aluminum nitride sintered ceramic plate having a thickness of l.O mm and a square of 40 mm was prepared as a rigid substrate 71.
- a fluororesin adhesive film of PFA (titanium tetrafluoride-perfluorovinyl ether copolymer) having a thickness of 28 is laminated on one surface of the substrate 71 made of the above aluminum nitride, and an adhesive layer is formed. 76 was formed. At this time, the adhesive layer was cut out and left in the center within 19.5 mm square. The surface of the copper thin plate for forming the power supply layer 52 on which the Ag plating was not applied was placed on the adhesive side, and the copper thin plate was temporarily bonded. A region within a center of 19.5 mm square of the rigid body 71 made of aluminum nitride is a portion on which the semiconductor element 32 is mounted. The bonding was performed so that the base member 1 made of aluminum nitride was evenly exposed to the outside of the copper thin plate by 0.5 mm on each side.
- PFA titanium tetrafluoride-perfluorovinyl ether copolymer
- the above-mentioned fluororesin-based adhesive film having a different thickness was formed. Lum was laminated. This adhesive layer is formed except for the portion inside the central 21.8 mm square. After the formation of the adhesive layer, the surface of the thin copper plate for forming the ground layer 51, on which the Ag plating was not applied, was placed on the adhesive layer side and temporarily bonded. At this time, bonding was performed by aligning with the outer size of the 19.5 mm square copper sheet with the center notch bonded first.
- the insulating layer between the power supply layer 52 and the ground layer 51 is made of the resin-based adhesive.
- the above-mentioned fluororesin-based adhesive film having a thickness of 28 m is laminated on a copper thin plate for forming the grounding layer 51 adhered to the substrate 71 and a polyimide having a thickness of 125 m is formed thereon.
- the film was placed according to the external shape of the copper thin plate and temporarily bonded. Further, the fluororesin-based adhesive film having a thickness of 38 m was laminated on the polyimide film.
- the lamination area is a part except the inside of the central 24 mm square.
- the shape of the polyimide film is It is a 39 mm square with a 24 mm square notch in the center.
- a lead frame made of copper material: C-151; manufactured by Hitachi Cable, Ltd.
- This lead frame has a thickness of 150 m for both the outer lead 22 and the inner lead 24, and the outer lead 22 has a pitch of 0.5 mm, a width of 0.2 mm, and a tie bar 21 to 7 in length. mm, and the total number of leads is 304 (bin). In the center there is a space 27 of 24mm square without leads.
- the lead at the center of the 24-27 mm square portion is plated with Ag to form a wire bonding area 28.
- the lead frame (signal layer) 53 in FIG. 14 was formed.
- Power layer 52 temporarily adhered state as described above, the ground layer 5 1, a load of 20 GZC m 2 over the re-one lead frame 3, 350. After heating and curing for 1 hour at C, these three layers were adhered to the substrate.
- the bonding between the power supply layer 52, the grounding layer 51, and the external leads 11 outside the base 71 and the external leads 22 of the lead frame 53 are formed by bonding. Welding was performed at positions 72 and 73 by electric welding. The number of external leads welded on the copper thin plates for forming the power supply layer 52 and the ground layer 51 is 40 each, and the total number of leads on the lead frame 53 is 80 (20 per side). Used for joining power and ground layers. Joining (welding) positions 72 and 73 are 1 mm outside each edge from the outer edge of the aluminum nitride base of 40 mm square. The remaining 224 leads of the unwelded lead frame are mainly used as signal layers.
- the material of the above lead frame is C-151 to 42 alloy (42% Ni-remaining Fe), Kovar, and four kinds of copper (1 oxygen-free copper: material C-1020 according to JIS standard, 2 OMC L-1: manufactured by Mitsubishi Shindoh Copper Co., Ltd. 3 C-194: manufactured by Aurin Co., Ltd. 4 EFTEC 6 4 T: Furukawa Electric Co., Ltd.)
- a package that was simply replaced with a copper power supply layer 52 and the external lead of the ground layer 51 were welded successfully.
- the values of the self-inductance of the power supply layer 52 and the grounding layer 51 measured from the external lead of the lead frame via the welding portion were 0.3 ⁇ , respectively.
- Table 2 shows the relationship between the thickness of the adhesive layer 74 between the power supply layer 52 and the ground layer 51 and the capacitance of the capacitor formed between the power supply layer 52 and the ground layer 51. Indicated. This result clearly shows that the package of the present invention can form a capacitor having a large capacitance between the power supply layer and the ground layer.
- the characteristic impedance of the signal line formed by the lead of the lead frame (the inner lead at the center of the package: length 8 mm, average width 160 m):
- the measured value of Z 0 is It was 50 ⁇ .
- the 90 ° peel strength between the power supply layer 52 and the ground layer 51 formed as described above and the adhesive layer 74 forming an intermediate layer between these layers was 4.3 kgZcm.
- a semiconductor element 32 having a size of 17 mm square and a thickness of 0.4 mm was mounted with Ag-polyimide resin. After that, using a gold wire with a diameter of 30 as the bonding eye 42 and using thermocompression bonding at 350 ° C, it is used as a signal in the semiconductor element, the power supply layer 52, the ground layer 51, and the lead frame. Connected to the lead. Next, a 40 mm square, 1.2 mm thick, centered 28 mm square, 0.4 mm deep cavity was made into an aluminum drum, and a 13 / m thick black anode was formed on its surface. A cap 43 provided with an oxide film was prepared.
- An epoxy-based adhesive having a thickness of 120 m was applied as a sealing layer 40 to a portion having a width of 28 mm to 40 mm square on the outer periphery of the cap, and the semiconductor element was sealed by heating and curing. In this way, a package having the structure shown in FIG. 14 was completed.
- the package for mounting a semiconductor element having the structure shown in FIG.
- Substrate made of aluminum nitride used in the manufacture of aluminum 7 7 In place of 1, a 40 mm square overall, 10 mm overall height, 1.2 mm thick fin, 8 mm high fin, 1 fin
- a semiconductor element mounting package was prepared in the same manner except that two substrates 71a made of aluminum nitride were used.
- the thermal resistance of the two types of packages shown in FIGS. 14 and 20 in this example was examined. As shown in Table 3, the thermal resistance was small and excellent. The thermal resistance is a value measured when the power consumption of the semiconductor device is 8 W, natural air cooling (no wind), and forced air cooling (wind speed 3 mZ seconds). Table 3
- a semiconductor element mounting package 91 having the structure shown in FIG. 17 was created by the following method.
- Each of these Ai thin plates has an outer lead 11 with a width of 0.2 mm, each of which is exposed to the outside (40 on each side).
- This lead is designed so that the leads do not overlap when the technicians are stacked so that the outer shape matches.
- FIG. 19 it is 0.5 mm thick, 4 Omm square, has a notch 83 with a 19.8 mm square in the center, and has various thicknesses of black on the surface (over the entire surface including the side surfaces).
- a metal plate made of aluminum on which the anodized film 93 was formed was prepared. This metal plate is used as an intervening layer (insulating layer) 92 provided between the power supply layer 52 and the ground layer 51.
- An epoxy resin-based adhesive was screen-printed as an adhesive layer 76 on the one surface of the base 71 made of aluminum to a thickness of 38 m to form an adhesive layer 76. At this time, the central part within 17.5 mm square was left without screen printing.
- the copper thin plate for forming the power supply layer 52 was placed on the epoxy adhesive side, and the copper thin plate was temporarily bonded.
- the area within the center of the base 71 made of aluminum within 17.5 mm square is a portion where the semiconductor element 32 is mounted.
- the bonding was performed so that the base made of aluminum came out of the copper thin plate by 0.5 mm evenly on each side.
- an Ag-epoxy resin-based conductive adhesive is formed with a dispenser to form an adhesive layer 74 on the copper thin plate for forming the power supply layer 52. 38 was applied.
- Contact The application of the adhesive was removed from the area inside the central 19.8 mm square.
- the same Ag-epoxy conductive adhesive was applied on the aluminum metal plate to a thickness of 28 to form an adhesive layer 74.
- the adhesive was applied over the entire aluminum plate except for the inside of the 19.8 mm square at the center notch.
- a copper thin plate for forming the grounding layer 51 was placed and temporarily bonded. At this time, bonding was performed by aligning with the outer size of the copper thin plate for forming the power supply layer 52 that was bonded first.
- the insulating layer between the power supply layer 52 and the ground layer 51 is made of an anodized aluminum film.
- an epoxy resin-based adhesive was applied to a thickness of 210 m on a thin copper plate serving as the ground layer 51.
- This epoxy resin layer forms the adhesive layer 75.
- a lead frame made of 42 alloy (42% Ni—the remaining Fe) having the same shape as that shown in FIG. 6 was mounted thereon and temporarily bonded.
- This lead frame has a thickness of 150 m for both the outer lead 22 and the inner lead 24.
- the pitch of the outer lead 22 is 0.5 mm, the width is 0.2 mm, and the length is 7 mm from the tie bar.
- the total number is 304 bottles.
- In the center is a space section 27 without a lead of 22 mm square.
- a Ag plating is applied to the lead in the 22 to 25 mm square portion at the center, and a wire bonding area 28 is formed. In this way, the lead frame (signal layer) 53 in FIG. 17 was formed.
- the power supply layer 5 2 temporarily adhered state, intervening layer 92, only one load of the ground layer 5 1, 1 from the top of the lead frame 5 3 0 g / cm 2, at 1 50 ° C After heating and curing for 3 hours, these four layers were adhered on an aluminum substrate 71.
- the power supply layer 52, the ground layer 51, and the base 71 thus formed by adhesion are formed.
- the outer lead 11 outside the lead frame and the outer lead 22 of the lead frame 53 were joined by electric welding at the joining positions 72 and 73.
- For the power supply layer 52 and the grounding layer 51 there are 40 welded outer leads each for the copper sheet for formation, and the lead frame 53 has a total of 80 leads (20 leads per side). Used for bonding between layers and ground layers.
- Joining (welding) positions 72 and 73 are 1 mm outside each edge from the outer edge of the 40 mm square aluminum base.
- the remaining 224 leads of the unwelded lead frame are mainly used as signal layers.
- the material of the above-mentioned lead frame was changed from 42 alloy to copper and 5 types of copper (1 oxygen-free copper: material C_1020 according to JIS standard, 2 C151: manufactured by Hitachi Cable, Ltd., 3 OM CL—1: Mitsubishi Shindo Copper Co., Ltd., ⁇ C-194: Olin Corporation, ⁇ EFTEC 64 T: Furukawa Electric Co., Ltd.) Welding of the external lead of the power supply layer 52 and the ground layer 51 was successfully performed.
- a package excluding the semiconductor element 32 and the cap 43 was prepared.
- the A-thin plate immediately below the lead frame is used as a ground layer, a microstrip line is formed in the signal layer.
- Table 4 shows the relationship between the capacitance of one capacitor formed between the power supply layer 52 and the ground layer 51 sandwiching the intervening layer 92 and the thickness of the anodic oxide film on the surface of the intervening layer. This result clearly shows that in the package of this embodiment, a capacitor having a large capacitance between the power supply layer and the ground layer. It was shown that a sensor could be formed.
- the surface resistance of 2 0 ° C Package samples in Table 4 (N o. L ⁇ 8) interposed layer 4 which an anodized film has been used has been subjected in the of 1 0 10 ⁇ 1 0 13 ⁇ It was in the range.
- the method of measuring the surface resistance is the same as that of the aluminum base 71 used in the present embodiment described above.
- the characteristic impedance of the signal line formed by the leads of the lead frame 53 (the inner lead at the center of the package: length 8 mm, average width 160 m): Measurement of Z0 The value was 50 ⁇ . Table 4
- a semiconductor element 32 having a size of 15 mm square and a thickness of 0.4 mm was attached with an Ag-epoxy resin-based conductive adhesive.
- the power supply layer 52, the ground layer 51, and the lead frame were formed by ultrasonication at room temperature.
- the lead used for the signal of the system 53 was connected to the semiconductor element.
- a 40 mm square, 1.2 mm thick aluminum plate with a cavity of 28 mm square and 0.4 mm depth in the center was created, and a 13 m thick black anodic oxide film was formed on its surface.
- Cap 43 was prepared.
- An epoxy-based adhesive having a thickness of 120 m was applied as a sealing layer 40 to a portion of an outer periphery of the cap having a width of 28 mm to 40 mm square, and the semiconductor element was sealed by heating and curing.
- a package 91 having the structure shown in FIG. 17 was completed.
- a package for mounting a semiconductor element having the structure shown in FIG. 14 was manufactured as follows. The method is the same as that of Example 10 except that the material changes in 1) to 7) described below and the preparation conditions in 8 to 9) are changed.
- an aluminum plate having a black anodic oxide film having a thickness of 1.2 mm, a square of 40 mm, and a thickness of 13 / m was prepared.
- the surface resistance of this substrate at 20 ° C. is 3.8 ⁇ 10 11 ⁇ , which is the same as in Example 3.
- a 39 mm square aluminum thin plate having a thickness of 100 m and a center with a 19.5 mm square notch 83 was prepared, which is used as a power supply layer as shown in Fig. 16.
- This aluminum thin plate is coated with an anodic oxide film of various thicknesses on one side except for the wire bonding area 33 and the external lead 11 as shown by a hatched portion 94 in FIG.
- the surface of the aluminum thin plate on which the anodic oxide film is not applied is used as a surface to be adhered to the substrate side.
- a 39 mm square aluminum thin plate having a thickness of 100 m and a notch 83 of 21.8 mm square in the center, having the shape shown in Fig. 16 and used as the ground layer was prepared.
- This aluminum sheet is provided with an anodic oxide film of various thicknesses on one side except the external lead 11 as shown by a hatched portion 95 in FIG.
- the surface of the aluminum thin plate on which the anodic oxide film is applied is used as a surface to be bonded to the power supply layer side.
- An anodic oxide coating is applied to the side surface of the thin aluminum plate in contact with the adhesive layer 74 over a thickness of 100 / zm.
- An Ag-epoxy resin conductive adhesive was used as an adhesive for attaching the semiconductor element 32 to the base 71.
- the wire bonding was performed by the ultrasonic method at room temperature from the thermocompression bonding method using a gold wire at 350 ° C instead of the aluminum wire containing 1% silicon.
- Table 5 shows the values of the self-inductance of the power supply layer 52 and the ground layer 51 measured from the external lead of the lead frame through the welded part. This result shows that even when aluminum is used for the power supply layer and the ground layer, the same low self-inductance as in Example 10 can be achieved, and the alumina multilayer ceramic package by the conventional simultaneous firing method, and Obviously smaller than conventional plastic multilayer packages.
- Table 6 shows the capacitance of one capacitor formed between the power layer 52 and the ground layer 51, the thickness of the anodic oxide film formed on the surface of the power layer 52 and the ground layer 51, and The relationship is shown.
- the characteristic impedance of the signal line formed by the lead of the lead frame (internal lead at the center of the package: length 8 mm, average width 200 zm): Z. was 50 ⁇ .
- the 90 ° peel separation strength between the power supply layer and the intermediate layer and between the ground layer and the intermediate layer was 2.4 kg / cm.
- a package for mounting a semiconductor element having the structure shown in FIG. 14 was manufactured as follows. The same method as in Example 10 is used except for the material changes 1) to 6) described below.
- a fluororesin adhesive is coated on both sides with a thickness of 25 jt / m each.A total thickness of 75 m, a 19.5 mm square notch at the center A polyimide film having the following was used.
- Adhesive layer (intermediate layer) 74 a fluororesin-based adhesive coated on both sides of a polyimide film of various thicknesses at 7.5 zm each, 39 mm square, center Those having a notch of 21.8 mm square were used.
- the adhesive layer (intermediate layer) 75 a polystyrene resin adhesive with a thickness of 25 m is coated on both sides.
- the wire bonding between the semiconductor element and the package is performed by room-temperature ultrasonic method using a 30 m diameter aluminum wire containing 1% silicon.
- the characteristic impedance of the signal line was 50 ⁇ .
- the beer peel strength of the power supply layer and the intermediate layer and the ground layer and the intermediate layer was 2.5 kcm. Examples 14 to 16
- Example 14 A clad 42% Ni—Fe alloy (Example 15) were used instead of the copper thin plate as the material of the power supply layer 52 and the ground layer 51, respectively.
- AI Grad Kovar Example 16
- thermoplastic polyimide-based adhesive (Examples 14 and 16) and an epoxy resin adhesive (Example 15) are respectively used.
- Example 10 was repeated except that a package having the structure shown in FIG. 14 was produced.
- the self-inductance of the power supply layer 52 and the ground layer of the obtained package and the capacitance of the capacitor formed by these layers were almost the same as those of the tenth embodiment.
- the 90 ° peel separation strength between the power supply layer 52 and the ground layer 51 and the adhesive layer 74 forming an intermediate layer between them is 6.7 kgZ cm.
- Example 14 3.1 kg cm (Example 15), and 2.0 kg / cm (Example 16).
- the package for mounting a semiconductor element of the present invention has a small power supply noise and is compact, a package for mounting a semiconductor element used for a microprocessor and a gate array having a high operating frequency is used. It can be suitably used for the purpose.
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Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
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KR1019940704399A KR950702068A (ko) | 1993-04-06 | 1994-04-06 | 반도체 소자용 패키지(package for semiconductor chip) |
US08/347,484 US5629559A (en) | 1993-04-06 | 1994-04-06 | Package for semiconductor device |
EP94912058A EP0645810A4 (en) | 1993-04-06 | 1994-04-06 | SEMICONDUCTOR CHIP PACKAGE. |
Applications Claiming Priority (4)
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JP7967593 | 1993-04-06 | ||
JP5/79675 | 1993-04-06 | ||
JP5/315382 | 1993-12-15 | ||
JP31538293 | 1993-12-15 |
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PCT/JP1994/000571 WO1994023448A1 (en) | 1993-04-06 | 1994-04-06 | Package for semiconductor chip |
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US (1) | US5629559A (ja) |
EP (1) | EP0645810A4 (ja) |
KR (1) | KR950702068A (ja) |
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JP2018147938A (ja) * | 2017-03-01 | 2018-09-20 | 東芝メモリ株式会社 | 半導体装置 |
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- 1994-04-06 EP EP94912058A patent/EP0645810A4/en not_active Withdrawn
- 1994-04-06 KR KR1019940704399A patent/KR950702068A/ko not_active Application Discontinuation
- 1994-04-06 US US08/347,484 patent/US5629559A/en not_active Expired - Fee Related
- 1994-04-06 WO PCT/JP1994/000571 patent/WO1994023448A1/ja not_active Application Discontinuation
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JPH05291453A (ja) * | 1992-04-13 | 1993-11-05 | Shinko Electric Ind Co Ltd | 多層リードフレームの製造方法 |
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WO1996012299A1 (en) * | 1994-10-17 | 1996-04-25 | W.L. Gore & Associates, Inc. | Integrated circuit package |
US5977617A (en) * | 1996-05-10 | 1999-11-02 | Nec Corporation | Semiconductor device having multilayer film carrier |
Also Published As
Publication number | Publication date |
---|---|
EP0645810A1 (en) | 1995-03-29 |
KR950702068A (ko) | 1995-05-17 |
US5629559A (en) | 1997-05-13 |
EP0645810A4 (en) | 1997-04-16 |
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