US6814801B2 - Method for producing semi-insulating resistivity in high purity silicon carbide crystals - Google Patents

Method for producing semi-insulating resistivity in high purity silicon carbide crystals Download PDF

Info

Publication number
US6814801B2
US6814801B2 US10/064,232 US6423202A US6814801B2 US 6814801 B2 US6814801 B2 US 6814801B2 US 6423202 A US6423202 A US 6423202A US 6814801 B2 US6814801 B2 US 6814801B2
Authority
US
United States
Prior art keywords
crystal
silicon carbide
cooling
wafer
heating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime, expires
Application number
US10/064,232
Other languages
English (en)
Other versions
US20030233975A1 (en
Inventor
Jason Ronald Jenny
David Phillip Malta
Hudson McDonald Hobgood
Stephan Mueller
Valeri F. Tsvetokov
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wolfspeed Inc
Original Assignee
Cree Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cree Inc filed Critical Cree Inc
Priority to US10/064,232 priority Critical patent/US6814801B2/en
Assigned to CREE, INC. reassignment CREE, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: JENNY, JASON RONALD, HOBGOOD, HUDSON MCDONALD, MALTA, DAVID PHILLIP, MUELLER, STEPHAN
Priority to KR1020047019323A priority patent/KR101024328B1/ko
Priority to JP2004515747A priority patent/JP4670006B2/ja
Priority to AU2003237489A priority patent/AU2003237489A1/en
Priority to DE60326843T priority patent/DE60326843D1/de
Priority to PCT/US2003/018068 priority patent/WO2004001836A1/en
Priority to AT03736939T priority patent/ATE426916T1/de
Priority to EP20030736939 priority patent/EP1516361B1/en
Priority to CNB03814624XA priority patent/CN100356524C/zh
Priority to CA002485594A priority patent/CA2485594A1/en
Priority to TW92117120A priority patent/TWI285404B/zh
Publication of US20030233975A1 publication Critical patent/US20030233975A1/en
Priority to US10/842,749 priority patent/US20040206298A1/en
Priority to US10/876,963 priority patent/US7601441B2/en
Publication of US6814801B2 publication Critical patent/US6814801B2/en
Application granted granted Critical
Priority to US11/248,458 priority patent/US7323051B2/en
Priority to US11/249,107 priority patent/US9200381B2/en
Priority to US11/248,579 priority patent/US7316747B2/en
Priority to US11/248,998 priority patent/US7351286B2/en
Assigned to CREE, INC. reassignment CREE, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: TSVETKOV, VALERI F.
Priority to US12/490,615 priority patent/US9059118B2/en
Priority to US12/772,254 priority patent/US8147991B2/en
Priority to US13/181,167 priority patent/US9790619B2/en
Adjusted expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
    • C30B29/36—Carbides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure

Definitions

  • the present invention relates to the inventions set forth in commonly assigned U.S. Pat. No. 6,218,680 (“the ′′680 patent”) and in co-pending applications Ser. No. 09/866,129 (published as No. 20010023945); Ser. No. 09/757,950 (published as No. 20010019132); Ser. No. 09/810,830 (published as No. 20010017374); and Ser. No. 09/853,375 filed May 11, 2001 for “High Resistivity Silicon Carbide Substrate for Semiconductor Devices with High Breakdown Voltage.”
  • the present invention relates to semi-insulating silicon carbide single crystals, and in particular, relates to a method of forming high purity semi-insulating silicon carbide single crystal substrates that have intrinsic point defects and resulting deep level electronic states in an amount greater than the net concentration of any compensating shallow dopants (i.e., an amount greater than the uncompensated shallow dopants), and to maintain the semi-insulating quality of the silicon carbide substrate during additional process steps of device manufacture.
  • vanadium can produce a semi-insulating silicon carbide crystal, its presence has been observed to create a back-gating effect; i.e., the trapped negative charge on the vanadium acts as a grown-in gate in devices in which a vanadium-doped crystal is used as the semi-insulating substrate. Thus, for a number of device considerations, vanadium is best avoided.
  • a semi-insulating silicon carbide crystal that includes donor dopants, acceptor dopants and intrinsic point defects that produce deep level states.
  • concentration of intrinsic point defects exceeds the difference between the concentration of donors and the concentration of acceptors, the states resulting from intrinsic point defects can provide semi-insulating characteristics in the functional absence of vanadium; i.e., including a minimal presence that is less than the presence that can affect the electronic properties of the crystal.
  • the ′′680 patent explains that superior microwave performance can be achieved by the fabrication of silicon carbide field effect transistors (FETs) and related devices on high purity, vanadium-free semi-insulating monocrystalline silicon carbide substrates.
  • FETs field effect transistors
  • the substrates derive their semi-insulating properties from the presence of intrinsic (point defect related) deep electronic states lying near the middle of the silicon carbide bandgap.
  • the intrinsic deep states generally arise during growth of a crystal boule at high temperatures from which substrate wafers are cut in a manner generally well understood in this art.
  • the substrate In devices that incorporate these substrates, and in order to provide the appropriate low-loss RF performance, the substrate must act as a low-loss dielectric medium by continuously maintaining its semi-insulating characteristics. In turn, the ability to maintain semi-insulating behavior is dependent upon the total number of intrinsic deep states in the substrate. In current practice, if the density of the intrinsic deep levels is not sufficiently high it has been observed in practice that the semi-insulating characteristics of the substrate can become reduced or functionally eliminated when subsequent steps are carried out on or using a semi-insulating silicon carbide wafer. Such steps include the growth of epitaxial layers at temperatures of about (for illustrative purposes) 1400° or above on the semi-insulating silicon carbide wafer. movemoveThis in turn reduces the number of useful devices that can be formed on or incorporating the wafers.
  • the crystal equilibrium or near-equilibrium will shift to one in which the number of point defects is reduced; i.e., the crystal becomes more ordered (fewer point defects) at lower temperatures than it was at higher temperatures, in a manner expected in accordance with well-understood thermodynamic principles.
  • the invention meets this object with a method of producing high quality semi-insulating silicon carbide crystals in the absence of relevant amounts of deep level trapping elements.
  • the method comprises heating a silicon carbide crystal to a temperature above the temperatures required for CVD growth of silicon carbide from source gases, but less than the temperatures at which disadvantageously high rates of silicon carbide sublimation occur under the ambient conditions to thereby thermodynamically increase the concentration (i.e., number per unit volume) of point defects and resulting states in the crystal; and then cooling the heated crystal to approach room temperature at a sufficiently rapid rate to minimize the time spent in the temperature range in which the defects are sufficiently mobile to disappear or be re-annealed into the crystal to thereby produce a silicon carbide crystal with a concentration of point defect states that is greater than the concentration of point defect states in an otherwise identically grown silicon carbide crystal that has not been heated and cooled in this manner.
  • the invention is the semi-insulating silicon carbide crystal made by the method of the invention.
  • the invention is a method of producing semiconductor device precursors on semi-insulating substrates.
  • the invention comprises heating a silicon carbide substrate wafer to a temperature of at least about 2000° C., then cooling the heated wafer to approach room temperature at a rate of at least about 30° C. per minute, and then depositing an epitaxial layer of a semiconductor material on the substrate wafer.
  • FIG. 1 is a schematic diagram illustrating the temperature ranges referred to in the detailed description and several different cooling rates.
  • FIG. 2 is a plot of the change in capacitance against temperature in degrees Kelvin as measured by deep level transient spectroscopy (DLTS).
  • DLTS deep level transient spectroscopy
  • FIG. 3 is a comparative set of three plots from electron paramagnetic resonance (EPR) evaluation of silicon carbide crystal samples.
  • one object of the invention is to avoid the use of vanadium to produce semi-insulating character in silicon carbide. Instead, the present invention creates a sufficiently large concentration of point defect states in the silicon carbide so that the concentration remaining after normal semiconductor processing and device manufacture still exceeds the number necessary to produce semi-insulating character.
  • a semi-insulating compensated crystal of silicon carbide can have a relatively high concentration of both acceptor and donor atoms, provided that the number of point defects is in excess of the difference between those concentrations. This concentration of point defects can also be expressed as the concentration needed to exceed any uncompensated shallow dopants.
  • the invention is a method of producing high quality semi-insulating silicon carbide crystals in the absence of relevant amounts of deep level trapping elements.
  • the invention comprises heating a silicon carbide crystal to a temperature above the temperature required for chemical vapor deposition (CVD) growth of silicon carbide from source gases, but less than the temperature at which disadvantageously high rates of silicon carbide sublimation occur under the ambient conditions to thereby thermodynamically increase the concentration of point defects and resulting states in the crystal.
  • CVD chemical vapor deposition
  • the starting crystals are preferably of high purity and are produced by a seeded sublimation technique such as is set forth in U.S. Pat. No. RE34,861 (reissued from U.S. Pat. No. 4,866,005) or as discussed in Mueller, Status Of SiC Bulk Growth From An Industrial Point Of View, J. Crystal. Growth v. 211 No. 1 (2000) pp 325-332.
  • the method then comprises cooling the heated crystal to approach room temperature at a sufficiently rapid rate to maintain a concentration of point defects in the cooled crystal that remains greater than the first concentration.
  • the method comprises the step of cooling the heated crystal to approach room temperature at a sufficiently rapid rate to reduce the time spent in the temperature range in which the defectsincluding, but not limited to, those created by the heating step—are sufficiently mobile to be re-annealed into the crystal to thereby produce a silicon carbide crystal with a concentration of point defect-related deep level states that is greater than the concentration of such states in an otherwise identically grown silicon carbide crystal that has not been heated and cooled in this manner.
  • the crystal is heated to a temperature of between about 2,000° C. and 2,400° C. at atmospheric pressure. These temperatures provide a useful range at atmospheric pressure. At temperatures higher than 2400° C. the silicon carbide tends to sublime at undeniably high rates and thus temperatures above 2400° C. are less favored or disadvantageous at atmospheric pressure.
  • the upper temperature limit of the method of the invention will to some extent be bounded by the subjective degree of sublimation found to be troublesome in particular circumstances. As noted above, at atmospheric pressure, 2400° C. has been found to be a convenient upper limit, but is not an absolute one.
  • thermodynamic one in a normally expected fashion, the entropy of the crystal is higher at higher temperatures, and thus, more of the point defects and resulting states that can produce semi-insulating character are present at higher temperatures. Additionally, those familiar with silicon carbide and the thermodynamics of crystals will recognize that as the temperature increases, additional types of states can exist that do not occur at lower temperatures. If the heated crystal is properly cooled in accordance with the present invention, these additional types of states can be preserved and will contribute to the desired semi-insulating properties.
  • heating the crystals to these temperatures creates a more disordered crystal
  • the invention freezes (in a relative sense) these desired states in the crystals as the crystal is returned to room temperature.
  • the cooling step is significant because if the crystal is allowed to spend too much time in intermediate temperature ranges, such as those above about 1400° C., the crystal will undergo the aforementioned annealing process, and can reach a different equilibrium or near-equilibrium condition in which the states disappear (or are functionally reduced to an irrelevant number) as the crystal becomes more ordered.
  • 2400° C. is a preferred upper temperature when using relatively typical equipment operating at atmospheric pressure. Those having the ordinary skill expected in this field could carry out the heating at higher temperatures without undue experimentation, but would have to add additional equipment and techniques such as incorporating an overlying silicon and carbon atmosphere or using some other high pressure technique to prevent the sublimation of silicon carbide that begins to occur in statistically significant amounts at such higher temperatures.
  • the method of the invention heats the crystal to a temperature as high as practical to produce as many states as possible in the crystal while avoiding or minimizing degradation or sublimation of the crystal.
  • the crystal is preferably maintained at the elevated temperature for a period of at least about two minutes, an interval that has practical and functional considerations. From a practical standpoint, it will take several minutes under most circumstances to heat the silicon carbide crystal to this temperature. From a functional standpoint, this also provides sufficient time for the crystal to reach an equilibrium or near equilibrium condition with respect to the states that are desirably generated.
  • the heating time is presently functionally best expressed as a time sufficient to obtain a thermal equilibrium or near equilibrium in the crystal having the desired number of states.
  • the crystal does not need to reach a full equilibrium in the most proper or restricted sense of that term, but the term is used herein to describe a condition in which the crystal reaches a given temperature and is maintained there for a time sufficient to develop the desired number of states.
  • the step of heating the crystal preferably comprises heating the crystal in an induction heater, in which case the step of cooling the crystal includes (at least) reducing the power to the induction coil.
  • Induction heaters and their method of operation in semiconductor manufacture are generally well understood in the art and can be incorporated according to the invention without undue experimentation. Thus, as the particular induction heater is not critical to the claimed invention, it will not be discussed in detail otherwise herein. Additionally, other types of heating can be used by those of ordinary skill in this art and without undue experimentation.Once the crystal has been heated for the desired period of time at the temperature of 2000° C.
  • a rate of cooling in excess of about 30° C. per minute appears to be preferred with a rate of 150° C. per minute appearing to be a useful upper limit.
  • the rate of cooling need be neither constant nor exact throughout the entire cooling process.
  • the rate of cooling should desirably range between the 30° C. per minute and 150° C. per minute preferred limits.
  • the heat loss and thus the rate of cooling will tend to be most rapid as the crystal cools from the highest temperatures and will tend to moderate as the crystal approaches and reaches lower temperatures.
  • the rate of cooling can become slower without any functional disadvantage. Accordingly, as an individual crystal is cooled, the rate at which it cools can vary within the 30°-150° C. per minute preferred range while still taking advantage of the method of the invention.
  • a rate of cooling that is too slow allows the crystal to spend too much time in the temperature range at which the states will heal and the crystal become sufficiently ordered to reduce the number of states below the number necessary to retain the semi-insulating characteristics.
  • cooling at an overly-rapid rate can produce mechanical stresses in the crystal including fracturing if the thermal stress is sufficiently great.
  • the cooling step includes both passive and active steps.
  • the power to the induction heater is either reduced or turned off entirely.
  • the initial heat loss is a radiation heat loss.
  • the heating chamber can be flooded with an inert gas, typically argon. Additionally, the thermal mass of the crystal and of the materials with which it is placed in contact can be used to help control the cooling rate.
  • three basic ways to control the rate of cooling include adjusting the power to the induction coil (or to any other relvant heating mechanism well understood in this art such as resistance heating); flowing a cooling gas around and over the silicon carbide crystal; and controlling the thermal mass of the crystal and its surroundings; i.e. such as the use of a heat sink. Because these are thermodynamic conditions, they can be addressed in a number of different ways that are not critical to the claimed invention and can be carried out by those of ordinary skill in this art without undue experimentation.
  • the preferred cooling rate of between about 30° and 150° C. per minute can be also expressed as cooling the crystal to about room temperature in less than about 70 minutes, or—at a more rapid pace—cooling the crystal to about room temperature in less than about 20 minutes.
  • the method of the invention can further comprise the steps of heating the silicon carbide substrate wafer to a temperature of about 2,000° C. (and preferably to between 2,000° and 2,400° C.), cooling the heated wafer to approach room temperature at a rate of at least about 30° C. per minute (and preferably approaching 150° C. per minute), and then depositing one or more epitaxial layers of semiconductor material on the substrate wafer.
  • the step of depositing the epitaxial layer will comprise depositing an epitaxial layer selected from the group consisting of other wide bandgap semiconductors such as silicon carbide or Group III nitrides using chemical vapor deposition (CVD) techniques.
  • the step of depositing the epitaxial layer is typically carried out at temperatures greater than about 1,400° C. As noted above, in prior techniques steps carried out at such temperatures tended to reduce the number of defects to a point at which the substrate would no longer have appropriate semi-insulating characteristics.
  • the invention provides a method for controllably increasing the number of point defects and resulting deep level states as compared to “as-grown”crystals, these later processing steps do not spoil the semi-insulating character of the crystal even though some of the defects are expected to heal.
  • the invention comprises the wafer and epitaxial layer(s) produced by this aspect and embodiment of the invention.
  • the invention can be carried out on substrate wafers or single crystal boules, with substrates being the preferred embodiment because their large surface-to-volume ratio enables them to cool at the relatively rapid rates that are useful in the invention without suffering undue or catastrophic thermal stress.
  • the invention can also comprise the steps of heating a silicon carbide boule to a temperature of at least about 2,000° C., then cooling the heated boule to approach room temperature at the rate of at least about 30° C. per minute, then slicing a silicon carbide wafer from the boule and then depositing one or more epitaxial layers of semiconductor material on the sliced wafer.
  • the method can comprise the steps of slicing the silicon carbide wafer from the single crystal boule, then heating the sliced wafer to the temperature of at least about 2,000° degrees C. at atmospheric pressure, and then cooling the heated wafer to approach room temperature at a rate of at least 30° C. per minute, and thereafter depositing the epitaxial layer(s) of semiconductor material on the sliced wafer.
  • the sliced silicon carbide wafer is generally not used immediately after having been sliced, but instead is cleaned and polished to prepare a more favorable surface for epitaxial growth.
  • the polishing and cleaning steps for semiconductor materials in general and silicon carbide in particular are well established in this art, can be practiced without undue experimentation, and will not be otherwise discussed in detail herein.
  • the invention further comprises the wafer and one or more epitaxial layers, and can further comprise devices that incorporate the wafer and epitaxial layers formed according to the methods of the embodiments of the invention.
  • the invention is not limited to use with any particular devices, but commonly used microwave devices that incorporate semi-insulating silicon carbide substrates include various types of field effect transistors (FETs), metal oxide semiconductor field effect transistors (MOSFETs), junction field effect transistors (JFETs), metal-semiconductor field effect transistors (MESFETs), heterostructure field effect transistors (HFETs), high electron mobility transistors (HEMTs), and DMOS transistors.
  • FETs field effect transistors
  • MOSFETs metal oxide semiconductor field effect transistors
  • JFETs junction field effect transistors
  • MEFETs metal-semiconductor field effect transistors
  • HFETs heterostructure field effect transistors
  • HEMTs high electron mobility transistors
  • DMOS transistors DMOS transistors
  • FIG. 1 schematically illustrates the temperature ranges and the cooling rates used in the present invention. Those familiar with these techniques will recognize that FIG. 1 is explanatory in nature rather than an exact representation of particular experiments.
  • FIG. 1 is a plot of temperature versus time. Three general sets of temperatures are characterized.
  • the uppermost line designated at 10 represents the temperature, preferably 2,000° C. for silicon carbide, above which the desired number of point defects is produced in the manner according to the present invention.
  • the invention includes the step of heating the silicon carbide crystal to the temperature represented by line 10 or higher.
  • the second highest line is designated at 12 and represents a lower temperature (which will be understood as relative rather than exact, but which in preferred embodiments is about 1200° C.) that together with the upper temperature line 10 defines a temperature range (represented by the arrow 11 ) within which the states created above the temperature line 10 will be expected to heal if the crystal is allowed to remain in this temperature range for a period of time sufficient to approach an equilibrium or a near equilibrium condition. Accordingly, the invention as described herein minimizes the time that the crystal spends in the temperature range 11 once the increased number of states has been produced. As noted above, maintaining the cooling rate at between about 30° C. and 150° C. per minute is particularly helpful while the crystal is within the temperature range schematically illustrated at 11 in FIG. 1 .
  • the third line designated at 14 represents room temperature (25° C., 298 K) and defines another temperature range (designated by the arrow 13 ) between room temperature and the temperature line 12 .
  • the temperature range symbolized by the arrow 13 represents temperatures that are still above room temperature, but within which the amount of reordering that may occur is statistically insignificant to the semi-insulating characteristics.
  • the crystal normally can be expected to cool all the way to room temperature whether during pre-manufacture, storage, shipping or even use. It will be understood, however, that provided the crystal is heated to a temperature above that represented by the line 10 , and then cooled sufficiently rapidly to a temperature below the temperature represented by the line 12 , the benefits of the invention will be accomplished, regardless of whether room temperature is ever reached.
  • FIG. 1 Three cooling curves are schematically illustrated as the lines at 15 , 16 , and 17 .
  • FIG. 1 abscissa represents time, it will be understood that the line 15 represents the slowest rate of cooling, while the line 17 represents the most rapid.
  • the extended curve 15 illustrates that the crystal would spend a much greater period of time in the temperature range designated by the arrow 11 as compared to crystals following the cooling curves designated by the lines at 16 or 17 .
  • the curve 15 schematically represents a prior art approach (intentional or unintentional) to cooling the crystal, while the lines 16 and 17 schematically represent the more rapid cooling steps of the present invention.
  • the rate need not be constant.
  • FIG. 2 illustrates that the desired high concentrations of deep-levels correlate with higher growth temperatures.
  • FIG. 2 plots the change in capacitance as measured by deep level transient spectroscopy (DLTS) against temperature.
  • the higher amplitude (e.g. at 300 K) of the crystal samples grown at higher temperatures (solid line) represents a larger concentration of deep levels as compared to a sample grown at a lower temperature (dashed line).
  • Deep level transient spectroscopy is generally well understood in the semiconductor arts and is a sensitive method used to study deep levels in semiconductors.
  • the method is based on the capacitance charge of a reversed biased diode when deep levels emit their carriers after they have been charged by a forward bias pulse.
  • the emission rate is temperature dependent and characteristic for each type of defect. Using the temperature dependence of the emission rate, the activation energy of a deep level can be determined. See, e.g. ASTM International Test No. F978-02, “Standard Test Method For Characterizing Semiconductor Deep Levels By Transient Capacitance Techniques.”
  • Other techniques for evaluating the crystal can include capacitance versus voltage (CV) techniques, as well as electron paramagnetic resonance (EPR).
  • CV capacitance versus voltage
  • EPR electron paramagnetic resonance
  • FIG. 3 is a comparative set of three plots from electron paramagnetic resonance (EPR) evaluation of silicon carbide crystal samples.
  • EPR is a well-understood technique for measuring certain characteristics of materials and is also known as electron spin resonance (ESR) or electron magnetic resonance (EMR).
  • EPR represents the process of resonance absorption of microwave radiation by paramagnetic ions or molecules, with at least one unpaired electron spin and in the presence of a magnetic field.
  • EPR is used to measure the number of charges occupying deep traps in the crystal bandgap. By measuring the change in absorption of microwave energy within a continuously varying strong magnetic field, EPR detects the number of unpaired spins of electronic charges trapped at various defects in the crystal lattice. The EPR measurement does not, however, evict the charges from the traps, but merely detects their presence, thus permitting repeated analysis of the same sample.
  • the three plots of FIG. 3 represent (from left to right), a silicon carbide crystal grown conventionally, a silicon carbide crystal heated and cooled in the range of 30° C. per minute according to the present invention and a crystal heated and cooled in the range of 150° C. per minute according to the present invention.
  • each of the sections of FIG. 3 is sized identically and the magnitude (arbitrary units) of the EPR signal of the carbon vacancy (V c )i.e. one of the types of point defects that provides the states that in turn provide semi-insulating characteris proportional to the number of defect centers detected by the EPR.
  • V c carbon vacancy
  • the “g-factor”(or “g-value”) is characteristic of the type of electron trap and is related to the microwave frequency and the magnetic field strength. Accordingly, given that the sample sizes measured were the same within expected margins of experimental error, the magnitude of the EPR line for the carbon vacancies (from the trough to the peak) is proportional to the concentration of defects in the sample.
  • FIG 3 illustrates a significant increase in the number of carbon vacancies (and a resulting improvement in semi-insulating character) from the as-grown condition (left panel) to the process of the invention using a 30° C. rate of cooling (middle panel) to the process of the invention using a 150° C. rate of cooling (right hand panel).

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Ceramic Products (AREA)
  • Silicon Compounds (AREA)
US10/064,232 2002-06-24 2002-06-24 Method for producing semi-insulating resistivity in high purity silicon carbide crystals Expired - Lifetime US6814801B2 (en)

Priority Applications (20)

Application Number Priority Date Filing Date Title
US10/064,232 US6814801B2 (en) 2002-06-24 2002-06-24 Method for producing semi-insulating resistivity in high purity silicon carbide crystals
CA002485594A CA2485594A1 (en) 2002-06-24 2003-06-10 Method for producing semi-insulating resistivity in high purity silicon carbide crystals
JP2004515747A JP4670006B2 (ja) 2002-06-24 2003-06-10 高純度炭化珪素結晶において半絶縁性抵抗率を生成する方法
AU2003237489A AU2003237489A1 (en) 2002-06-24 2003-06-10 Method for producing semi-insulating resistivity in high purity silicon carbide crystals
KR1020047019323A KR101024328B1 (ko) 2002-06-24 2003-06-10 고순도 실리콘 카바이드 결정 내 반절연성 비저항의 생성방법
DE60326843T DE60326843D1 (de) 2002-06-24 2003-06-10 Chreinen siliciumcarbid-kristallen
PCT/US2003/018068 WO2004001836A1 (en) 2002-06-24 2003-06-10 Method for producing semi-insulating resistivity in high purity silicon carbide crystals
AT03736939T ATE426916T1 (de) 2002-06-24 2003-06-10 Verfahren zur herstellung von halb-isolierenden hochreinen siliciumcarbid-kristallen
EP20030736939 EP1516361B1 (en) 2002-06-24 2003-06-10 Method for producing semi-insulating resistivity in high purity silicon carbide crystals
CNB03814624XA CN100356524C (zh) 2002-06-24 2003-06-10 在高纯碳化硅晶体中产生半绝缘电阻率的方法
TW92117120A TWI285404B (en) 2002-06-24 2003-06-24 Method for producing semi-insulating resistivity in high purity silicon carbide crystals
US10/842,749 US20040206298A1 (en) 2002-06-24 2004-05-11 Method for producing semi-insulating resistivity in high purity silicon carbide crystals
US10/876,963 US7601441B2 (en) 2002-06-24 2004-06-25 One hundred millimeter high purity semi-insulating single crystal silicon carbide wafer
US11/248,998 US7351286B2 (en) 2002-06-24 2005-10-12 One hundred millimeter single crystal silicon carbide wafer
US11/248,458 US7323051B2 (en) 2002-06-24 2005-10-12 One hundred millimeter single crystal silicon carbide wafer
US11/249,107 US9200381B2 (en) 2002-06-24 2005-10-12 Producing high quality bulk silicon carbide single crystal by managing thermal stresses at a seed interface
US11/248,579 US7316747B2 (en) 2002-06-24 2005-10-12 Seeded single crystal silicon carbide growth and resulting crystals
US12/490,615 US9059118B2 (en) 2002-06-24 2009-06-24 Method for producing semi-insulating resistivity in high purity silicon carbide crystals
US12/772,254 US8147991B2 (en) 2002-06-24 2010-05-03 One hundred millimeter single crystal silicon carbide wafer
US13/181,167 US9790619B2 (en) 2002-06-24 2011-07-12 Method of producing high quality silicon carbide crystal in a seeded growth system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/064,232 US6814801B2 (en) 2002-06-24 2002-06-24 Method for producing semi-insulating resistivity in high purity silicon carbide crystals

Related Child Applications (2)

Application Number Title Priority Date Filing Date
US10/842,749 Division US20040206298A1 (en) 2002-06-24 2004-05-11 Method for producing semi-insulating resistivity in high purity silicon carbide crystals
US10/876,963 Continuation-In-Part US7601441B2 (en) 2002-06-24 2004-06-25 One hundred millimeter high purity semi-insulating single crystal silicon carbide wafer

Publications (2)

Publication Number Publication Date
US20030233975A1 US20030233975A1 (en) 2003-12-25
US6814801B2 true US6814801B2 (en) 2004-11-09

Family

ID=29731606

Family Applications (3)

Application Number Title Priority Date Filing Date
US10/064,232 Expired - Lifetime US6814801B2 (en) 2002-06-24 2002-06-24 Method for producing semi-insulating resistivity in high purity silicon carbide crystals
US10/842,749 Abandoned US20040206298A1 (en) 2002-06-24 2004-05-11 Method for producing semi-insulating resistivity in high purity silicon carbide crystals
US12/490,615 Expired - Fee Related US9059118B2 (en) 2002-06-24 2009-06-24 Method for producing semi-insulating resistivity in high purity silicon carbide crystals

Family Applications After (2)

Application Number Title Priority Date Filing Date
US10/842,749 Abandoned US20040206298A1 (en) 2002-06-24 2004-05-11 Method for producing semi-insulating resistivity in high purity silicon carbide crystals
US12/490,615 Expired - Fee Related US9059118B2 (en) 2002-06-24 2009-06-24 Method for producing semi-insulating resistivity in high purity silicon carbide crystals

Country Status (11)

Country Link
US (3) US6814801B2 (ja)
EP (1) EP1516361B1 (ja)
JP (1) JP4670006B2 (ja)
KR (1) KR101024328B1 (ja)
CN (1) CN100356524C (ja)
AT (1) ATE426916T1 (ja)
AU (1) AU2003237489A1 (ja)
CA (1) CA2485594A1 (ja)
DE (1) DE60326843D1 (ja)
TW (1) TWI285404B (ja)
WO (1) WO2004001836A1 (ja)

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050126471A1 (en) * 2002-06-24 2005-06-16 Jenny Jason R. One hundred millimeter high purity semi-insulating single crystal silicon carbide wafer
US20060032434A1 (en) * 2004-08-10 2006-02-16 Stephan Mueller Seed and seedholder combinations for high quality growth of large silicon carbide single crystals
US20060075958A1 (en) * 2004-09-21 2006-04-13 Adrian Powell Low basal plane dislocation bulk grown SiC wafers
US20060118037A1 (en) * 2004-12-08 2006-06-08 Adrian Powell Process for producing high quality large size silicon carbide crystals
US20060130742A1 (en) * 2004-12-22 2006-06-22 Carter Calvin H Jr Process for producing silicon carbide crystals having increased minority carrier lifetimes
US20060213430A1 (en) * 2002-06-24 2006-09-28 Jenny Jason R Seeded single crystal silicon carbide growth and resulting crystals
US20060225645A1 (en) * 2005-04-07 2006-10-12 Adrian Powell Three inch silicon carbide wafer with low warp, bow, and TTV
US20070062441A1 (en) * 2005-09-16 2007-03-22 Yaroslav Koshka Method for epitaxial growth of silicon carbide
US20080067524A1 (en) * 2006-09-14 2008-03-20 Cree, Inc. Micropipe-free silicon carbide and related method of manufacture
US20080072817A1 (en) * 2006-09-26 2008-03-27 Ii-Vi Incorporated Silicon carbide single crystals with low boron content
US20080197363A1 (en) * 2005-02-04 2008-08-21 Seoul Opto Device Co., Ltd. Light Emitting Device Having a Plurality of Light Emitting Cells and Method of Fabricating the Same
US20090256162A1 (en) * 2002-06-24 2009-10-15 Cree, Inc. Method for Producing Semi-Insulating Resistivity in High Purity Silicon Carbide Crystals
US20100006867A1 (en) * 2006-09-30 2010-01-14 Seoul Opto Device Co., Ltd. Light emitting diode having light emitting cell with different size and light emitting device thereof
US8772757B2 (en) 2005-05-27 2014-07-08 Cree, Inc. Deep ultraviolet light emitting devices and methods of fabricating deep ultraviolet light emitting devices
US8858709B1 (en) 2006-04-11 2014-10-14 Ii-Vi Incorporated Silicon carbide with low nitrogen content and method for preparation
US20160208412A1 (en) * 2013-05-02 2016-07-21 Melior Innovations, Inc. HIGH PURITY SiOC AND SiC, METHODS COMPOSITIONS AND APPLICATIONS
US10322974B2 (en) 2013-05-02 2019-06-18 Pallidus, Inc. Pressed and self sintered polymer derived SiC materials, applications and devices
US10322936B2 (en) 2013-05-02 2019-06-18 Pallidus, Inc. High purity polysilocarb materials, applications and processes
US11091370B2 (en) 2013-05-02 2021-08-17 Pallidus, Inc. Polysilocarb based silicon carbide materials, applications and devices
US12024794B2 (en) 2021-06-17 2024-07-02 Wolfspeed, Inc. Reduced optical absorption for silicon carbide crystalline materials

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE525574C2 (sv) * 2002-08-30 2005-03-15 Okmetic Oyj Lågdopat kiselkarbidsubstrat och användning därav i högspänningskomponenter
US6974720B2 (en) * 2003-10-16 2005-12-13 Cree, Inc. Methods of forming power semiconductor devices using boule-grown silicon carbide drift layers and power semiconductor devices formed thereby
US7055807B2 (en) * 2004-06-25 2006-06-06 Pool Cover Corporation Expandable pole socket with twist and lock insert
US7314520B2 (en) 2004-10-04 2008-01-01 Cree, Inc. Low 1c screw dislocation 3 inch silicon carbide wafer
JP4470690B2 (ja) * 2004-10-29 2010-06-02 住友電気工業株式会社 炭化珪素単結晶、炭化珪素基板および炭化珪素単結晶の製造方法
WO2006070480A1 (ja) * 2004-12-27 2006-07-06 Nippon Steel Corporation 炭化珪素単結晶、炭化珪素単結晶ウェハ及びその製造方法
KR100775983B1 (ko) * 2005-09-29 2007-11-15 네오세미테크 주식회사 반절연 탄화규소 단결정 성장방법
CN101724893B (zh) * 2009-11-18 2013-09-04 中国科学院物理研究所 一种制备高纯半绝缘碳化硅晶体的方法
US8377806B2 (en) * 2010-04-28 2013-02-19 Cree, Inc. Method for controlled growth of silicon carbide and structures produced by same
JP2011243640A (ja) * 2010-05-14 2011-12-01 Sumitomo Electric Ind Ltd 炭化珪素基板の製造方法、半導体装置の製造方法、炭化珪素基板および半導体装置
KR101905823B1 (ko) 2011-07-27 2018-10-08 엘지이노텍 주식회사 웨이퍼 제조 장치 및 웨이퍼 제조 방법
JP6107450B2 (ja) * 2013-06-12 2017-04-05 住友電気工業株式会社 炭化珪素半導体装置の製造方法
US9245944B2 (en) * 2013-07-02 2016-01-26 Infineon Technologies Ag Silicon carbide device and a method for manufacturing a silicon carbide device
KR101537385B1 (ko) * 2013-12-05 2015-07-17 재단법인 포항산업과학연구원 탄화규소(SiC) 단결정 성장 방법
CN105821471B (zh) * 2016-05-10 2018-10-30 山东大学 一种低应力高纯半绝缘SiC单晶的制备方法
CN106757357B (zh) * 2017-01-10 2019-04-09 山东天岳先进材料科技有限公司 一种高纯半绝缘碳化硅衬底的制备方法
CN109280965B (zh) * 2018-10-16 2020-03-24 山东天岳先进材料科技有限公司 一种掺杂少量钒的高质量半绝缘碳化硅单晶及衬底
CN109338463B (zh) * 2018-10-16 2020-08-11 山东天岳先进材料科技有限公司 一种高纯碳化硅单晶衬底
EP3666935B1 (en) * 2018-10-16 2024-05-22 Sicc Co., Ltd. High-purity silicon carbide single crystal substrate and preparation method therefor
TWI698397B (zh) 2019-11-11 2020-07-11 財團法人工業技術研究院 碳化矽粉體的純化方法
JP2023508691A (ja) 2019-12-27 2023-03-03 ウルフスピード インコーポレイテッド 大口径炭化ケイ素ウェハ
CN113990752A (zh) * 2020-07-27 2022-01-28 环球晶圆股份有限公司 碳化硅材料的制备方法
CN113073392A (zh) * 2021-03-31 2021-07-06 哈尔滨科友半导体产业装备与技术研究院有限公司 一种减少晶体热应力的处理方法

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3615930A (en) * 1966-10-25 1971-10-26 Philips Corp Method of manufacturing silicon carbide crystals
JPS6473000A (en) 1987-09-16 1989-03-17 Hitachi Metals Ltd Heat treatment of gallium arsenide single crystal
US4866005A (en) 1987-10-26 1989-09-12 North Carolina State University Sublimation of silicon carbide to produce large, device quality single crystals of silicon carbide
US5611955A (en) * 1993-10-18 1997-03-18 Northrop Grumman Corp. High resistivity silicon carbide substrates for high power microwave devices
WO1999017345A1 (de) 1997-09-30 1999-04-08 Infineon Technologies Ag Verfahren zum thermischen ausheilen von durch implantation dotierten siliziumcarbid-halbleitern
US6218680B1 (en) 1999-05-18 2001-04-17 Cree, Inc. Semi-insulating silicon carbide without vanadium domination
US6396080B2 (en) 1999-05-18 2002-05-28 Cree, Inc Semi-insulating silicon carbide without vanadium domination
US20020167010A1 (en) 2001-05-11 2002-11-14 Stephan Mueller High-resistivity silicon carbide substrate for semiconductor devices with high break down voltage

Family Cites Families (53)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB8816632D0 (en) 1988-07-13 1988-08-17 Raychem Ltd Electrical device
US5119540A (en) 1990-07-24 1992-06-09 Cree Research, Inc. Apparatus for eliminating residual nitrogen contamination in epitaxial layers of silicon carbide and resulting product
GB9206086D0 (en) 1992-03-20 1992-05-06 Philips Electronics Uk Ltd Manufacturing electronic devices comprising,e.g.tfts and mims
US5709745A (en) 1993-01-25 1998-01-20 Ohio Aerospace Institute Compound semi-conductors and controlled doping thereof
US5679153A (en) 1994-11-30 1997-10-21 Cree Research, Inc. Method for reducing micropipe formation in the epitaxial growth of silicon carbide and resulting silicon carbide structures
JPH08208380A (ja) 1995-01-25 1996-08-13 Nippon Steel Corp 単結晶炭化珪素の製造方法
JP4056562B2 (ja) 1995-08-16 2008-03-05 エスアイクリスタル アクチエンゲゼルシャフト 単結晶を製造するための種結晶、種結晶の使用方法並びにＳｉＣ単結晶或いは単結晶ＳｉＣ膜の製造方法
JPH09110584A (ja) 1995-10-25 1997-04-28 Sanyo Electric Co Ltd 単結晶成長方法
US5718760A (en) 1996-02-05 1998-02-17 Cree Research, Inc. Growth of colorless silicon carbide crystals
JP2001509768A (ja) * 1997-01-31 2001-07-24 ノースロップ グラマン コーポレーション 高出力マイクロ波装置用高抵抗炭化珪素基板
US5873937A (en) 1997-05-05 1999-02-23 Northrop Grumman Corporation Method of growing 4H silicon carbide crystal
JP3003027B2 (ja) * 1997-06-25 2000-01-24 日本ピラー工業株式会社 単結晶ＳｉＣおよびその製造方法
US6201342B1 (en) 1997-06-30 2001-03-13 The United States Of America As Represented By The Secretary Of The Navy Automatically sharp field emission cathodes
JPH1160391A (ja) 1997-08-08 1999-03-02 Denso Corp 炭化珪素単結晶の製造方法
JP3680531B2 (ja) 1997-12-11 2005-08-10 株式会社豊田中央研究所 種結晶固定剤及びそれを用いた単結晶の製造方法
JP4036531B2 (ja) 1998-05-27 2008-01-23 富士通株式会社 半導体集積回路
DE59901313D1 (de) 1998-07-13 2002-05-29 Siemens Ag VERFAHREN ZUR ZÜCHTUNG VON SiC-EINKRISTALLEN
US6086672A (en) 1998-10-09 2000-07-11 Cree, Inc. Growth of bulk single crystals of aluminum nitride: silicon carbide alloys
WO2001004390A1 (de) 1999-07-07 2001-01-18 Siemens Aktiengesellschaft Keimkristallhalter mit seitlicher einfassung eines sic-keimkristalls
US6446180B2 (en) 1999-07-19 2002-09-03 Micron Technology, Inc. Memory device with synchronized output path
US6824611B1 (en) 1999-10-08 2004-11-30 Cree, Inc. Method and apparatus for growing silicon carbide crystals
US6451112B1 (en) 1999-10-15 2002-09-17 Denso Corporation Method and apparatus for fabricating high quality single crystal
JP4258921B2 (ja) 1999-11-10 2009-04-30 株式会社豊田中央研究所 種結晶固定剤、種結晶固定方法およびそれらを用いた単結晶の製造方法
JP4253974B2 (ja) 1999-12-22 2009-04-15 住友電気工業株式会社 ＳｉＣ単結晶およびその成長方法
US6428621B1 (en) 2000-02-15 2002-08-06 The Fox Group, Inc. Method for growing low defect density silicon carbide
JP3707726B2 (ja) 2000-05-31 2005-10-19 Ｈｏｙａ株式会社 炭化珪素の製造方法、複合材料の製造方法
JP3961750B2 (ja) 2000-08-21 2007-08-22 独立行政法人産業技術総合研究所 単結晶の成長装置および成長方法
JP4275308B2 (ja) 2000-12-28 2009-06-10 株式会社デンソー 炭化珪素単結晶の製造方法およびその製造装置
JP4903946B2 (ja) 2000-12-28 2012-03-28 株式会社ブリヂストン 炭化ケイ素単結晶の製造方法及び製造装置
JP4619567B2 (ja) 2001-04-10 2011-01-26 株式会社ブリヂストン 炭化ケイ素単結晶及びその製造方法
US20020189536A1 (en) 2001-06-15 2002-12-19 Bridgestone Corporation Silicon carbide single crystal and production thereof
JP4986342B2 (ja) 2001-06-15 2012-07-25 株式会社ブリヂストン 炭化ケイ素単結晶及びその製造方法
US6801989B2 (en) 2001-06-28 2004-10-05 Micron Technology, Inc. Method and system for adjusting the timing offset between a clock signal and respective digital signals transmitted along with that clock signal, and memory device and computer system using same
KR100422572B1 (ko) 2001-06-30 2004-03-12 주식회사 하이닉스반도체 레지스터 제어 지연고정루프 및 그를 구비한 반도체 소자
JP4224755B2 (ja) 2001-10-16 2009-02-18 株式会社デンソー 種結晶の固定方法
JP2003137694A (ja) 2001-10-26 2003-05-14 Nippon Steel Corp 炭化珪素単結晶育成用種結晶と炭化珪素単結晶インゴット及びその製造方法
US6759911B2 (en) 2001-11-19 2004-07-06 Mcron Technology, Inc. Delay-locked loop circuit and method using a ring oscillator and counter-based delay
JP4054197B2 (ja) 2002-02-05 2008-02-27 新日本製鐵株式会社 炭化珪素単結晶育成用種結晶及びその製造方法並びに炭化珪素単結晶インゴットの製造方法
US7220313B2 (en) 2003-07-28 2007-05-22 Cree, Inc. Reducing nitrogen content in silicon carbide crystals by sublimation growth in a hydrogen-containing ambient
US7316747B2 (en) 2002-06-24 2008-01-08 Cree, Inc. Seeded single crystal silicon carbide growth and resulting crystals
US7147715B2 (en) 2003-07-28 2006-12-12 Cree, Inc. Growth of ultra-high purity silicon carbide crystals in an ambient containing hydrogen
US7601441B2 (en) 2002-06-24 2009-10-13 Cree, Inc. One hundred millimeter high purity semi-insulating single crystal silicon carbide wafer
US6814801B2 (en) 2002-06-24 2004-11-09 Cree, Inc. Method for producing semi-insulating resistivity in high purity silicon carbide crystals
US7175704B2 (en) 2002-06-27 2007-02-13 Diamond Innovations, Inc. Method for reducing defect concentrations in crystals
JP2004103061A (ja) 2002-09-05 2004-04-02 Renesas Technology Corp 半導体記憶装置
JP4434568B2 (ja) 2002-11-14 2010-03-17 株式会社ルネサステクノロジ 半導体記憶装置
US7115896B2 (en) 2002-12-04 2006-10-03 Emcore Corporation Semiconductor structures for gallium nitride-based devices
US6964917B2 (en) 2003-04-08 2005-11-15 Cree, Inc. Semi-insulating silicon carbide produced by Neutron transmutation doping
JP3764462B2 (ja) 2003-04-10 2006-04-05 株式会社豊田中央研究所 炭化ケイ素単結晶の製造方法
US7023010B2 (en) 2003-04-21 2006-04-04 Nanodynamics, Inc. Si/C superlattice useful for semiconductor devices
DE602004001802T3 (de) 2003-04-24 2012-01-26 Norstel Ab Vorrichtung und Verfahren zur Herstellung von Einkristallen durch Dampfphasenabscheidung
US7314520B2 (en) 2004-10-04 2008-01-01 Cree, Inc. Low 1c screw dislocation 3 inch silicon carbide wafer
US7300519B2 (en) 2004-11-17 2007-11-27 Cree, Inc. Reduction of subsurface damage in the production of bulk SiC crystals

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3615930A (en) * 1966-10-25 1971-10-26 Philips Corp Method of manufacturing silicon carbide crystals
JPS6473000A (en) 1987-09-16 1989-03-17 Hitachi Metals Ltd Heat treatment of gallium arsenide single crystal
US4866005A (en) 1987-10-26 1989-09-12 North Carolina State University Sublimation of silicon carbide to produce large, device quality single crystals of silicon carbide
US5611955A (en) * 1993-10-18 1997-03-18 Northrop Grumman Corp. High resistivity silicon carbide substrates for high power microwave devices
WO1999017345A1 (de) 1997-09-30 1999-04-08 Infineon Technologies Ag Verfahren zum thermischen ausheilen von durch implantation dotierten siliziumcarbid-halbleitern
US6218680B1 (en) 1999-05-18 2001-04-17 Cree, Inc. Semi-insulating silicon carbide without vanadium domination
US20010017374A1 (en) * 1999-05-18 2001-08-30 Carter Calvin H. Semi-insulating silicon carbide without vanadium domination
US20010019132A1 (en) * 1999-05-18 2001-09-06 Carter Calvin H. Semi-insulating silicon carbide without vanadium domination
US6396080B2 (en) 1999-05-18 2002-05-28 Cree, Inc Semi-insulating silicon carbide without vanadium domination
US6403982B2 (en) 1999-05-18 2002-06-11 Cree, Inc. Semi-insulating silicon carbide without vanadium domination
US20020167010A1 (en) 2001-05-11 2002-11-14 Stephan Mueller High-resistivity silicon carbide substrate for semiconductor devices with high break down voltage

Non-Patent Citations (7)

* Cited by examiner, † Cited by third party
Title
A. Ellison et al.; HTCVD growth of semi-insulating 4H-SiC crystals with low defect density; Silicon Carbide-Materials, Processing and Devices Symposium (Materials Research Society Symposium Proceedings vol. 640) Silicon Carbide-Materials, Processing and Devices Symposium, Boston, MA, USA, Nov. 27-29, 2000, 2001 Warrendale, PA, USA, Mater. Res. Soc., USA, pp. H1.2.1-11.
B. Magnusson et al.; Infrared absorption and annealing behavior of semi-insulating 4H SiC HTCVD substrates; Mat. Res. Soc. Symp. Proc.; vol. 680E; pp. E5.11.1-E5.11.6; 2001 Materials Research Society.
S.K. Lilov; Determination of native defect concentrations and deviation from stoichiometry in silicon carbide; Materials Science & Engineering; Apr. 15, 1993; pp. 226-229; vol. B18, No. 3; Switzerland.
Stephan G. Mueller et al.; The status of SiC bulk growth from an industrial point of view, Journal of Crystal Growth 211 (2000); pp. 325-332; 2000 Elsevier Science B.V.
Svitlana I. Vlaskina et al.; 6H to 3C Polytype Transformation in Silicon Carbide; Japanese Journal of Applied Physics, Part 2 (Letters); Jan. 15, 1999; pp. L27-L29; vol. 38, No. 1A-B; Publication Office, Japanese Journal Appl. Phys.; Japan.
Viktor V. Zelenin et al., Growth and investigation of epitaxial 6H-SiC layers obtained by CVD on Lely-grown substrates; Materials Science and Engineering B; Apr. 1, 1997; pp. 300-303; vol. 46, No. 1-3; Elsevier Sequoia, Lausanne, CH.
Yoh-Ichi Yamaguchi et al.; Properties of heteroepitaxial 3C-SiC films grown by LPCVD; Sensors and Actuators A; Jun. 1, 1996; pp. 695-699, vol. 54, No. 1-3; Elsevier Sequoia S.A.; Lausanne, CH.

Cited By (62)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070240633A1 (en) * 2002-06-24 2007-10-18 Leonard Robert T One hundred millimeter single crystal silicon carbide wafer
US20060213430A1 (en) * 2002-06-24 2006-09-28 Jenny Jason R Seeded single crystal silicon carbide growth and resulting crystals
US20110024766A1 (en) * 2002-06-24 2011-02-03 Cree, Inc. One hundred millimeter single crystal silicon carbide wafer
US20060107890A1 (en) * 2002-06-24 2006-05-25 Hobgood Hudson M One hundred millimeter single crystal silicon carbide wafer
US9059118B2 (en) 2002-06-24 2015-06-16 Cree, Inc. Method for producing semi-insulating resistivity in high purity silicon carbide crystals
US20090256162A1 (en) * 2002-06-24 2009-10-15 Cree, Inc. Method for Producing Semi-Insulating Resistivity in High Purity Silicon Carbide Crystals
US8147991B2 (en) 2002-06-24 2012-04-03 Cree, Inc. One hundred millimeter single crystal silicon carbide wafer
US7601441B2 (en) 2002-06-24 2009-10-13 Cree, Inc. One hundred millimeter high purity semi-insulating single crystal silicon carbide wafer
US7316747B2 (en) 2002-06-24 2008-01-08 Cree, Inc. Seeded single crystal silicon carbide growth and resulting crystals
US7351286B2 (en) 2002-06-24 2008-04-01 Cree, Inc. One hundred millimeter single crystal silicon carbide wafer
US20050126471A1 (en) * 2002-06-24 2005-06-16 Jenny Jason R. One hundred millimeter high purity semi-insulating single crystal silicon carbide wafer
US20070240630A1 (en) * 2002-06-24 2007-10-18 Leonard Robert T One hundred millimeter single crystal silicon carbide water
US7323051B2 (en) 2002-06-24 2008-01-29 Cree, Inc. One hundred millimeter single crystal silicon carbide wafer
US9200381B2 (en) * 2002-06-24 2015-12-01 Cree, Inc. Producing high quality bulk silicon carbide single crystal by managing thermal stresses at a seed interface
US9790619B2 (en) 2002-06-24 2017-10-17 Cree, Inc. Method of producing high quality silicon carbide crystal in a seeded growth system
EP2182100A2 (en) 2004-06-25 2010-05-05 Cree, Inc. High purity semi-insulating single crystal silicon carbide wafer
US20070157874A1 (en) * 2004-08-10 2007-07-12 Stephan Mueller Seed and Seedholder Combinations for High Quality Growth of Large Silicon Carbide single Crystals
US20060032434A1 (en) * 2004-08-10 2006-02-16 Stephan Mueller Seed and seedholder combinations for high quality growth of large silicon carbide single crystals
US7192482B2 (en) 2004-08-10 2007-03-20 Cree, Inc. Seed and seedholder combinations for high quality growth of large silicon carbide single crystals
US7364617B2 (en) 2004-08-10 2008-04-29 Cree, Inc. Seed and seedholder combinations for high quality growth of large silicon carbide single crystals
US7294324B2 (en) 2004-09-21 2007-11-13 Cree, Inc. Low basal plane dislocation bulk grown SiC wafers
US20060075958A1 (en) * 2004-09-21 2006-04-13 Adrian Powell Low basal plane dislocation bulk grown SiC wafers
US7563321B2 (en) * 2004-12-08 2009-07-21 Cree, Inc. Process for producing high quality large size silicon carbide crystals
US20060118037A1 (en) * 2004-12-08 2006-06-08 Adrian Powell Process for producing high quality large size silicon carbide crystals
US20060130742A1 (en) * 2004-12-22 2006-06-22 Carter Calvin H Jr Process for producing silicon carbide crystals having increased minority carrier lifetimes
US20100320477A1 (en) * 2004-12-22 2010-12-23 Cree, Inc. Process for producing silicon carbide crystals having increased minority carrier lifetimes
US7811943B2 (en) 2004-12-22 2010-10-12 Cree, Inc. Process for producing silicon carbide crystals having increased minority carrier lifetimes
US8618553B2 (en) 2004-12-22 2013-12-31 Cree, Inc. Process for producing silicon carbide crystals having increased minority carrier lifetimes
US20100213468A1 (en) * 2005-02-04 2010-08-26 Seoul Opto Device Co., Ltd. Light emitting device having a plurality of light emitting cells and method of fabricating the same
US20080197363A1 (en) * 2005-02-04 2008-08-21 Seoul Opto Device Co., Ltd. Light Emitting Device Having a Plurality of Light Emitting Cells and Method of Fabricating the Same
US7880183B2 (en) 2005-02-04 2011-02-01 Seoul Opto Device Co., Ltd. Light emitting device having a plurality of light emitting cells and method of fabricating the same
EP2259318A2 (en) 2005-02-04 2010-12-08 Seoul Opto Device Co., Ltd. Light emitting device having a plurality of light emitting cells and method of fabricating the same
US20090189166A1 (en) * 2005-02-04 2009-07-30 Seoul Opto Device Co., Ltd. Light emitting device having a plurality of light emitting cells and method of fabricating the same
US7772602B2 (en) 2005-02-04 2010-08-10 Seoul Opto Device Co., Ltd. Light emitting device having a plurality of light emitting cells and method of fabricating the same
US7772601B2 (en) 2005-02-04 2010-08-10 Seoul Opto Device Co., Ltd. Light emitting device having a plurality of light emitting cells and method of fabricating the same
US7422634B2 (en) 2005-04-07 2008-09-09 Cree, Inc. Three inch silicon carbide wafer with low warp, bow, and TTV
US20060225645A1 (en) * 2005-04-07 2006-10-12 Adrian Powell Three inch silicon carbide wafer with low warp, bow, and TTV
US8772757B2 (en) 2005-05-27 2014-07-08 Cree, Inc. Deep ultraviolet light emitting devices and methods of fabricating deep ultraviolet light emitting devices
WO2007035570A3 (en) * 2005-09-16 2007-11-15 Univ Mississippi Method for epitaxial growth of silicon carbide
US7404858B2 (en) 2005-09-16 2008-07-29 Mississippi State University Method for epitaxial growth of silicon carbide
US20070062441A1 (en) * 2005-09-16 2007-03-22 Yaroslav Koshka Method for epitaxial growth of silicon carbide
US8858709B1 (en) 2006-04-11 2014-10-14 Ii-Vi Incorporated Silicon carbide with low nitrogen content and method for preparation
US8512471B2 (en) 2006-04-11 2013-08-20 Ii-Vi Incorporated Halosilane assisted PVT growth of SiC
US8410488B2 (en) 2006-09-14 2013-04-02 Cree, Inc. Micropipe-free silicon carbide and related method of manufacture
US20080083366A1 (en) * 2006-09-14 2008-04-10 Cree, Inc. Micropipe-free silicon carbide and related method of manufacture
US20080067524A1 (en) * 2006-09-14 2008-03-20 Cree, Inc. Micropipe-free silicon carbide and related method of manufacture
US9099377B2 (en) 2006-09-14 2015-08-04 Cree, Inc. Micropipe-free silicon carbide and related method of manufacture
US20080072817A1 (en) * 2006-09-26 2008-03-27 Ii-Vi Incorporated Silicon carbide single crystals with low boron content
US8361227B2 (en) 2006-09-26 2013-01-29 Ii-Vi Incorporated Silicon carbide single crystals with low boron content
EP2154733A1 (en) 2006-09-30 2010-02-17 Seoul Opto Device Co., Ltd. Light emitting diode having light emitting cells with different size and light emitting device thereof
US20100006867A1 (en) * 2006-09-30 2010-01-14 Seoul Opto Device Co., Ltd. Light emitting diode having light emitting cell with different size and light emitting device thereof
US20100072494A1 (en) * 2006-09-30 2010-03-25 Seoul Opto Device Co., Ltd. Light emitting diode having light emitting cell with different size and light emitting device thereof
US8274089B2 (en) 2006-09-30 2012-09-25 Seoul Opto Device Co., Ltd. Light emitting diode having light emitting cell with different size and light emitting device thereof
US8299476B2 (en) 2006-09-30 2012-10-30 Seoul Opto Device Co., Ltd. Light emitting diode having light emitting cell with different size and light emitting device thereof
US20160208412A1 (en) * 2013-05-02 2016-07-21 Melior Innovations, Inc. HIGH PURITY SiOC AND SiC, METHODS COMPOSITIONS AND APPLICATIONS
US9657409B2 (en) * 2013-05-02 2017-05-23 Melior Innovations, Inc. High purity SiOC and SiC, methods compositions and applications
US10322974B2 (en) 2013-05-02 2019-06-18 Pallidus, Inc. Pressed and self sintered polymer derived SiC materials, applications and devices
US10322936B2 (en) 2013-05-02 2019-06-18 Pallidus, Inc. High purity polysilocarb materials, applications and processes
US10597794B2 (en) 2013-05-02 2020-03-24 Pallidus, Inc. High purity polymer derived 3C SiC, methods compositions and applications
US11091370B2 (en) 2013-05-02 2021-08-17 Pallidus, Inc. Polysilocarb based silicon carbide materials, applications and devices
US12030819B2 (en) 2013-05-02 2024-07-09 Pallidus, Inc. Doped SiC and SiOC compositions and Methods
US12024794B2 (en) 2021-06-17 2024-07-02 Wolfspeed, Inc. Reduced optical absorption for silicon carbide crystalline materials

Also Published As

Publication number Publication date
US20040206298A1 (en) 2004-10-21
EP1516361A1 (en) 2005-03-23
TW200409245A (en) 2004-06-01
US20030233975A1 (en) 2003-12-25
CA2485594A1 (en) 2003-12-31
US20090256162A1 (en) 2009-10-15
CN1663033A (zh) 2005-08-31
AU2003237489A1 (en) 2004-01-06
KR20050013113A (ko) 2005-02-02
US9059118B2 (en) 2015-06-16
DE60326843D1 (de) 2009-05-07
CN100356524C (zh) 2007-12-19
TWI285404B (en) 2007-08-11
EP1516361B1 (en) 2009-03-25
JP2005531145A (ja) 2005-10-13
ATE426916T1 (de) 2009-04-15
WO2004001836A1 (en) 2003-12-31
KR101024328B1 (ko) 2011-03-23
JP4670006B2 (ja) 2011-04-13

Similar Documents

Publication Publication Date Title
US6814801B2 (en) Method for producing semi-insulating resistivity in high purity silicon carbide crystals
US7601441B2 (en) One hundred millimeter high purity semi-insulating single crystal silicon carbide wafer
JP4860825B2 (ja) バナジウム占有の無い半絶縁性炭化珪素
EP1392895B1 (en) Semi-insulating silicon carbide without vanadium domination
EP1828445B1 (en) Process for producing silicon carbide crystals having increased minority carrier lifetimes

Legal Events

Date Code Title Description
AS Assignment

Owner name: CREE, INC., NORTH CAROLINA

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:JENNY, JASON RONALD;MALTA, DAVID PHILLIP;HOBGOOD, HUDSON MCDONALD;AND OTHERS;REEL/FRAME:013171/0573;SIGNING DATES FROM 20020702 TO 20020730

STCF Information on status: patent grant

Free format text: PATENTED CASE

AS Assignment

Owner name: CREE, INC., NORTH CAROLINA

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:TSVETKOV, VALERI F.;REEL/FRAME:018689/0108

Effective date: 20061117

FPAY Fee payment

Year of fee payment: 4

FEPP Fee payment procedure

Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

FPAY Fee payment

Year of fee payment: 8

FPAY Fee payment

Year of fee payment: 12