TWI823480B - 半導體裝置 - Google Patents
半導體裝置 Download PDFInfo
- Publication number
- TWI823480B TWI823480B TW111126962A TW111126962A TWI823480B TW I823480 B TWI823480 B TW I823480B TW 111126962 A TW111126962 A TW 111126962A TW 111126962 A TW111126962 A TW 111126962A TW I823480 B TWI823480 B TW I823480B
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- Prior art keywords
- electrode
- semiconductor element
- trench
- semiconductor
- semiconductor device
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 184
- 239000000463 material Substances 0.000 claims abstract description 91
- 229910000679 solder Inorganic materials 0.000 claims description 23
- 230000000149 penetrating effect Effects 0.000 claims description 3
- 230000035882 stress Effects 0.000 description 40
- 230000008646 thermal stress Effects 0.000 description 18
- 230000000694 effects Effects 0.000 description 14
- 229910052751 metal Inorganic materials 0.000 description 14
- 239000002184 metal Substances 0.000 description 12
- 239000011347 resin Substances 0.000 description 11
- 229920005989 resin Polymers 0.000 description 11
- 239000003990 capacitor Substances 0.000 description 9
- 230000017525 heat dissipation Effects 0.000 description 8
- 239000000758 substrate Substances 0.000 description 8
- 230000000052 comparative effect Effects 0.000 description 7
- 230000002093 peripheral effect Effects 0.000 description 7
- 238000004458 analytical method Methods 0.000 description 6
- 229910052709 silver Inorganic materials 0.000 description 6
- 238000001816 cooling Methods 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 4
- 230000001681 protective effect Effects 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000000465 moulding Methods 0.000 description 3
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 238000005452 bending Methods 0.000 description 2
- 238000005336 cracking Methods 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 description 2
- 230000008719 thickening Effects 0.000 description 2
- 229910017944 Ag—Cu Inorganic materials 0.000 description 1
- 229910016525 CuMo Inorganic materials 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910020935 Sn-Sb Inorganic materials 0.000 description 1
- 229910008757 Sn—Sb Inorganic materials 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000003985 ceramic capacitor Substances 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000005496 eutectics Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
Classifications
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- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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Abstract
本發明之課題在於提供一種減少半導體元件中產生之應力、抑制熱阻力增加且可靠性高之半導體裝置。
本發明之半導體裝置具有:半導體晶片,其於一面具有第1主電極,於另一面具有第2主電極及閘極電極;第1電極,其經由第1接合材連接於半導體晶片之一面;及第2電極,其經由第2接合材連接於半導體晶片之另一面;且第1電極為板狀之電極,於與半導體晶片重合之區域具有溝槽;溝槽具有於第1電極之厚度方向貫通之構成,且為俯視觀察時到達第1電極之端部之形狀。
Description
本發明係關於一種半導體裝置。
世界範圍內功率半導體之普及不斷推進,在使用於開關電路或整流電路之半導體裝置中,不斷開發針對大電流化、高散熱化、高可靠化等多種要求之安裝技術。
作為功率半導體之安裝技術,已知有於半導體元件之上下面設置電極,上表面、下表面皆將至少1個電極與外部電極連接之兩面安裝構造。作為於半導體元件之上表面及下表面具有電極之例,有MOSFET(Metal Oxide Semiconductor Field Effect Transistor:金屬氧化物半導體場效電晶體)、IGBT(Insulated Gate Bipolar Transistor:絕緣閘雙極性電晶體)等。
MOSFET於一面具有源極電極及閘極電極,於另一面具有汲極電極。
IGBT於一面具有射極電極及閘極電極,於另一面具有集極電極。另,於功率半導體之元件,通常於任一面之外周部形成表面保護膜。MOSFET中,於源極電極側形成表面保護膜,IGBT中,於射極電極側形成表面保護膜。於IGBT之情形時,只要為具有二極體者,則於P極或N極側之任一者形成表面保護膜。
作為此種兩面安裝構造之半導體裝置之例,於專利文獻1揭示有一種半導體模組,其具有:於兩電極面分別具備電極之半導體晶片、及分別配置於半導體晶片之各電極面,於基板表面具備具有電極之表面配線層的一對模組基板,且於模組基板之表面配線層之電極形成有溝槽。又,於專利文獻1中揭示有於模組基板之背面配線層形成有格柵狀之溝槽之例。於專利文獻1,亦記載有緩和因構成模組基板之材料之熱膨脹率不同引起之熱應力之效果。
於專利文獻2揭示有一種半導體裝置,其具備:一對金屬電極,其等以內表面對向之方式設置並具有散熱性;半導體元件,其以被夾於兩金屬電極之方式設置並電性連接於兩金屬電極之內表面;及陶瓷製之絶縁基板,其設置於各金屬電極之外表面並具有散熱性;且一對金屬電極之至少一金屬電極具有將複數層以熱膨脹係數自低而高之順序自外表面側朝向上述內表面側積層而成之積層構造。又,於專利文獻2揭示有於一對金屬電極之至少一金屬電極設置有狹縫之例。於專利文獻2,亦記載有藉由狹縫,緩和金屬電極中產生之熱應力之效果。
[先前技術文獻]
[專利文獻]
[專利文獻1]日本專利特開2014-107506號公報
[專利文獻2]日本專利特開2007-173680號公報
[發明所欲解決之問題]
因Pb之熔點較低,且為低彈性,故先前作為半導體裝置之接合材,大多使用以Pb為主成分之焊料。然而,近年來,出於對環境之考慮,Pb之使用限制較強,而不斷推進無Pb材之開發。一般之無Pb材為例如Sn-Sb或Sn-Ag-Cu等以Sn為主成分之焊料、或使用Cu或Ag之以高溫燒結之接合材。
該等無Pb材較含Pb焊料更為高彈性,有因接合步驟之加熱及冷卻引起半導體元件之應力增加之問題。
為防止產生半導體元件之裂化等,重要的是減少應力。尤其於多使用於功率半導體之兩面安裝構造中,為流通大電流需儘可能擴大接合面積,而有應力亦容易增加之傾向。
於降低應力之情形時,以焊料連接時之半導體元件之熱變形減少之方式,對接合於半導體元件之電極形狀下功夫。一般而言,藉由縮小接合於半導體元件之電極之面積,可縮小半導體元件之熱變形。然而,半導體元件與電極之傳熱面積變小,製品使用時之熱阻力上升,散熱性能下降。因此,有減少接合步驟中之半導體元件之應力,且抑制熱阻力增加之問題。
於專利文獻1所記載之半導體模組中,如專利文獻1之圖4、圖9所示,於接合於閘極電極(30)之基板電極(52),形成有厚度較其他部分薄之溝槽(55),於背面配線層(70、71)形成有格柵狀之溝槽(80)。然而,於接合於接合部之面積較寬之源極電極(31)、汲極電極(32)之基板電極(51、61),未形成溝槽(55、80)。因此,認為無法充分獲得緩和熱應力之效果。
於專利文獻2所記載之半導體裝置中,如專利文獻2之圖7、圖8所示,因狹縫(16)未到達金屬電極之端部,故於在無狹縫之端部接合有半導體元件之情形時,認為於該端部附近無法減少傳遞至半導體元件之熱應力。
本發明之目的在於提供一種減少半導體元件中產生之應力,且抑制熱阻力增加,可靠性較高之半導體裝置。
[解決問題之技術手段]
本發明係一種半導體裝置,其具有:半導體晶片,其於一面具有第1主電極,於另一面具有第2主電極及閘極電極;第1電極,其經由第1接合材連接於半導體晶片之一面;及第2電極,其經由第2接合材連接於半導體晶片之另一面;且第1電極為板狀之電極,於與半導體晶片重合之區域具有溝槽;溝槽具有於第1電極之厚度方向貫通之構成,且為俯視觀察時到達第1電極之端部之形狀。
[發明之效果]
根據本發明,提供一種減少半導體元件中產生之應力,且抑制熱阻力增加,可靠性較高之半導體裝置。
本揭示係關於一種半導體裝置之構造,尤其係關於一種應用於電力控制用之功率半導體之安裝構造之有效之技術。本技術對具有兩面安裝構造之半導體裝置特別有效。
以下,參照圖式對本揭示之半導體裝置之實施例詳細進行說明。另,本揭示之內容並非藉由實施例限定者。
[實施例1]
圖1係顯示實施例1之半導體裝置之模式縱剖視圖。
本圖所示之半導體裝置200係作為車載用交流發電機(alternator)之整流元件使用者。
於本圖中,半導體裝置200具備電子電路體100、於上部具有台座2a之基座2、及於下部具有引線頭3a之引線3。電子電路體100具有整流功能。電子電路體100佔據之範圍由虛線顯示。基座2及引線3成為用於將電子電路體100與外部之電路電性連接之端子。位於台座2a及基座2之上部之一部分、位於引線頭3a及引線3之下部之一部分、及電子電路體100由模塑樹脂5覆蓋並密封。
電子電路體100具備半導體元件1a(半導體晶片)、電容器1b、及控制電路晶片1c。又,同時,電子電路體100具備下部電極1g、上部電極1d(源極塊)、及引線框架1i。
台座2a與電子電路體100之下部電極1g經由導電性接合材4a連接。又,引線頭3a與電子電路體100之上部電極1d經由導電性接合材4b連接。另,於本說明書中,將下部電極1g稱為「第1電極」,將上部電極1d稱為「第2電極」。
於本實施例中,半導體元件1a為MOSFET。MOSFET具有汲極電極D及源極電極S。於本圖中,汲極電極D設置於下表面部,源極電極S設置於上表面部。即,半導體元件1a具有兩面安裝構造。將設置有汲極電極D之側之面表述為半導體元件1a之「第一主表面」,將設置有源極電極S之側之面表述為半導體元件1a之「第二主表面」。
汲極電極D經由導電性接合材1p連接於第1內部電極即下部電極1g之上表面部。但,於不使用導電性接合材1p之情形時,亦可以超音波接合等進行連接。
源極電極S經由導電性接合材1q連接於第2內部電極即上部電極1d之下表面部。但,於不使用導電性接合材1q之情形時,亦可以超音波接合等進行連接。
控制電路晶片1c經由導電性接合材連接於支持體即引線框架1i之上表面部。
又,對控制電路晶片1c供給電源之電容器1b亦經由導電性接合材連接於引線框架1i之上表面部。電容器1b可使用例如陶瓷電容器。
下部電極1g之下表面部不由模塑樹脂5覆蓋,而自電子電路體100之下表面部露出。下部電極1g之下表面部經由導電性接合材4a連接於台座2a。
上部電極1d之上表面部自電子電路體100之上表面部露出。上部電極1d之上表面部經由導電性接合材4b連接於引線框架3a。
導電性接合材1p、1q、4a、4b等材料為包含一般使用之焊料、Au、Ag或Cu之合金或導電性接著材等。另,作為焊料,使用一般之高鉛焊料、共晶焊料、及無鉛焊料等。又,作為導電性接著材,使用將Ag、Cu、Ni等金屬填充物混合於樹脂者、或僅以金屬構成者。另,導電性接合材1p、1q、4a、4b等材料可為相同之材料,或者,亦可為不同之材料。又,導電性接合材1p、1q於半導體元件1a之上下,可為相同之材料,或者,亦可為不同之材料。又,導電性接合材4a、4b之材料於電子電路體100之上下,可為相同之材料,或者,亦可為不同之材料。
作為基座2及引線3以及電子電路體100內部之下部電極1g、上部電極1d及引線框架1i之材料,雖主要使用熱傳導率較高且導電性優異之Cu,但亦可為CuMo、42合金、Al、Au、Ag等。此時,為於與導電性接合材之連接部分提高連接穩定性,期望預先實施Au、Pd、Ag、Ni等之鍍覆。
控制電路晶片1c經由導線1f電性連接於半導體元件1a。例如,於半導體元件1a為功率MOSFET之情形時,以導線1f連接形成於半導體元件1a之閘極電極與控制電路晶片1c,而由控制電路晶片1c控制功率MOSFET之閘極電壓。藉此,可於具有開關功能之半導體元件1a流通大電流。
又,電容器1b藉由引線框架1i及導線1f,與半導體元件1a及控制電路晶片1c電性連接。該電容器1b具有供給驅動控制電路晶片1c所需之電力之功能。
半導體元件1a具有切換大電流之功能。作為此種半導體元件1a之例即開關電路晶片,有IGBT、GTO(Gate Turn-Off thyristor:閘極截止閘流體)及功率MOSFET。又,半導體元件1a亦可為進行大電流之接通/斷開控制之閘流體等,且包含Si、SiC、SiN、GaAs等者。
又,控制電路晶片1c為控制切換大電流之半導體元件1a之半導體元件。控制電路晶片1c自身為不包含切換大電流之半導體元件之半導體元件。即,控制電路晶片1c中包含複數個例如邏輯電路、類比電路、驅動器電路等,且為根據需要形成有微處理器等之半導體元件。又,亦可為兼備具有控制半導體元件1a中流通之大電流之功能者。
又,半導體元件1a、控制電路晶片1c、電容器1b、下部電極1g、上部電極1d及導電性接合材1p、1q整體由樹脂1h覆蓋並密封。其等構成電子電路體100。
另,下部電極1g之下表面部、以及上部電極1d之上表面部未被電子電路體100之樹脂1h覆蓋,而露出於電子電路體100之外部。
因此,電子電路體100之上部電極1d之上表面部可經由導電性接合材4b電性連接於引線頭3a。又,電子電路體100之下部電極1g之下表面部可經由導電性接合材4a電性連接於台座2a。
如以上,電子電路體100由樹脂1h密封,且一體構成。下部電極1g之露出部分藉由導電性接合材4a而電性連接於基座2之台座2a。上部電極1d之露出部分藉由導電性接合材4b而電性連接於引線3之引線頭3a。且,藉由以模塑樹脂5覆蓋電子電路體100之整體以及基座2及引線3之一部分而構成半導體裝置200。
又,於製造時藉由使電子電路體100之上下反轉,而可切換半導體裝置200之P、N極性。
如本圖所示,期望使半導體元件1a之與源極電極S連接之上部電極1d厚於下部電極1g。此處,增厚意味著於自台座2a朝向引線頭3a之方向上增長。
因藉由如此增厚上部電極1d從而上部電極1d之熱電容變大,故可使上部電極1d側吸收伴隨電流流過源極電極S時之損失所致之發熱。藉此,可抑制半導體元件1a之溫度上升。
又,藉由增厚上部電極1d,而可使上部電極1d高於電容器1b之高度,可將上部電極1d作為電子電路體100之端子連接於引線頭3a。
圖2係顯示圖1之半導體元件1a以及位於其之上部及下部之零件之放大縱剖視圖。
如圖2所示,半導體元件1a(半導體晶片)於下部電極1g側之面(一面)具有汲極電極D(第1主電極),於上部電極1d側之面(另一面)具有閘極電極C(未圖示,參照圖3)及源極電極S(第2主電極)。又,半導體元件1a於閘極電極C側之面之外周部具有表面保護膜L(護環)。
下部電極1g為板狀之電極。
半導體元件1a之源極電極S側之面經由導電性接合材1q連接於上部電極1d之下表面部。又,汲極電極D側之面經由導電性連接材1p連接於下部電極1g之上表面部。另,亦將導電性接合材1p、1q簡稱為「接合材」。又,亦可將導電性接合材1p稱為「第1接合材」,將導電性接合材1q稱為「第2接合材」以作區分。
上部電極1d之長度短於半導體元件1a。上部電極1d之端部及上部電極1d與半導體元件1a之連接部之端部皆處於半導體元件1a之內側。又,連接於半導體元件1a之下部電極1g之端部處於較半導體元件1a之端部更靠外側。又,於下部電極1g,設置有溝槽T。溝槽T具有於下部電極1g之厚度方向貫通之構成。下部電極1g之溝槽T之至少一部分與半導體元件1a重合。溝槽T可藉由壓製加工或蝕刻形成。
若予以總結,則下部電極1g為板狀之電極,且於與半導體元件1a重合之區域具有溝槽T。
圖3係局部顯示圖1之電子電路體100之俯視圖。圖3之A-A’剖面對應於圖2。
如圖3所示,半導體元件1a(半導體晶片)於上部電極1d側之面(另一面)具有閘極電極C。
溝槽T沿下部電極1g之長邊方向設置4條,且為到達下部電極1g之端部之形狀。換言之,溝槽T具有於第1電極之厚度方向貫通之構成,且為於俯視觀察時到達第1電極之端部之形狀。
設置於下部電極1g之溝槽T到達下部電極1g之外周線G(圖中,以虛線加以強調)。當溝槽T到達下部電極1g之端部時,如稍後所述,可抑制因熱應力引起之半導體元件1a之變形。
接著,對半導體裝置200之零件即電子電路體100之製作方法進行說明。
首先,將下部電極1g、導電性接合材、半導體元件1a、導電性接合材及上部電極1d依序積層。將其等加熱而將導電性接合材熔融,形成導電性接合材1p、1q之層。之後,冷卻至常溫。
於冷卻步驟中,於上部電極1d、下部電極1g及半導體元件1a之全部皆產生熱應變。於上部電極1d及下部電極1g為Cu,半導體元件1a為Si之情形時,因各自之熱膨脹率為16.8×10
-6[K
-1]、2.4×10
-6[K
-1],故上部電極1d及下部電極1g較半導體元件1a收縮得更多。藉此,於上部電極1d、下部電極1g及半導體元件1a產生彎曲變形,於各構件產生熱應力。
圖4係顯示先前構造之半導體裝置之局部縱剖視圖。
於本圖中,放大顯示與圖2之區域Y對應之部分。
如圖4所示,於先前構造中,下部電極1g之長度長於半導體元件1a。且,上部電極1d之長度短於半導體元件1a。因此,設置於下部電極1g與半導體元件1a之間之導電性接合材1p之長度長於設置於上部電極1d與半導體元件1a之間之導電性接合材1q。
因下部電極1g及上部電極1d於冷卻時較半導體元件1a收縮得更多,故半導體元件1a受到之力係來自導電性接合材1p之力大於來自導電性接合材1q之力。因此,冷卻後之半導體元件1a之形狀向上凸。
於本圖所示之點p1,因半導體元件1a之彎曲變形而產生箭頭Tb之拉伸應力,且亦自導電性接合材1p同時產生箭頭Tj之拉伸應力,故應力集中於點p1。於導電性接合材1p、1q使用無鉛焊料或燒結材等剛性較高之接合材之情形時,點p1之應力進一步增大,而於半導體元件1a產生裂化之風險提高。
圖5係顯示本實施例之半導體裝置之局部縱剖視圖。
於本圖中,放大顯示與圖2之區域Y對應之部分。
於圖5中,於下部電極1g設置有溝槽T。溝槽T於下部電極1g之厚度方向貫通。藉由溝槽T,分別產生半導體元件1a之區域D1、D2處之應力。因此,應力與先前構造相比變小。藉此,可大幅減少點p1之應力。
另,於溝槽T未貫通之情形時,因下部電極1g之連續之部分之影響殘留,故無法充分獲得減少區域D1、D2中產生之應力之效果。
又,期望溝槽T之寬度U寬於導電性接合材1p之厚度。若溝槽T之寬度U較窄,則因製造時導電性接合材1p濡濕擴散,溝槽T被導電性接合材1p填埋,而成為於區域D1、D2之間將下部電極1g接合之狀態,故經由該接合部位傳遞應力。於此種構成之情形時,因有損應力減少效果故而不佳。
於藉由將溝槽T設置於下部電極1g,而於導電性接合材1p使用無鉛焊料或燒結材等剛性較高之無鉛接合材之情形時,可製造具有較高之可靠性之半導體裝置。
再者,藉由對溝槽T之位置下功夫,例如與上部電極1d之端部於鉛直方向上對齊,而可確保半導體元件1a之散熱路徑,可抑制熱阻力增加。換言之,期望將溝槽T設置於與上部電極1d重合之位置。於該情形時,期望溝槽T與半導體元件1a重合,進而於其上方與上部電極1d重合。
接著,使用圖6~圖8,對減少熱應力之效果及熱阻力之變化定量性進行說明。
圖6係幾何性顯示與圖5所示之半導體裝置相同之部分之縱剖視圖。
於圖6中,顯示出研討製造之半導體元件1a中產生之熱應力及熱阻力時使用之座標及參數之定義。
於本圖中,將與半導體元件1a之上表面平行且與溝槽T之長邊方向正交之方向設為x軸。將上部電極1d中與半導體元件1a之連接面之端部E-E’(圖中,上部電極1d之右端)至半導體元件1a之端部之距離設為W。又,將端部E-E’至溝槽T之中心線F-F’(溝槽T之短邊方向之寬度之對稱軸)之距離設為J。因對使溝槽T之位置變化之情形進行研討,故將J設為參數。另,於溝槽T之中心線F-F’處於較上部電極1d之端部E-E’更靠半導體元件1a之中心側(圖中左方)之情形時,J取負值。此處,將J除以W而標準化之參數定義為X。
於本圖所示之例中,X=-0.4。
圖7係顯示藉由有限要件解析推定半導體元件1a中產生之熱應力之結果之一例的圖表。橫軸取X,縱軸取經標準化之應力σ。
將上部電極1d及下部電極1g之材質設為Cu,將半導體元件1a之材質設為Si。導電性接合材1p之材質設為一般之無鉛接合材即以Sn為主成分之焊料。X於-2至2之範圍內變化。又,縱軸之σ為以圖6之半導體元件1a之點p1(應力集中部位)中產生之熱應力為分子,以圖4所示之先前構造中對導電性接合材1p使用柔軟之鉛焊料時點p1中產生之應力為分母,進行標準化而得之值。因此,圖中,以符號Pb表示σ=1。另,以Sn為主成分之焊料為包含於焊料之金屬元素中之Sn之含有量分別多於其他金屬元素之含有量者。
如圖7所示,應力於X為-0.4時最小,隨著X偏離-0.4而變大。又,於X為0.3及-1.2時,應力上升至與先前構造之應力相等。
若予以總結,則將第2電極中與半導體晶片之連接面之端部至半導體晶片之端部之距離設為W,將第2電極中與半導體晶片之連接面之端部至溝槽T之中心線之距離設為J,將J/W定義為X時,溝槽T之中心線之位置滿足下述式(1)。
圖8係顯示藉由有限要件解析推定熱阻力之結果之一例之圖表。橫軸取X,縱軸取經標準化之熱阻力θ。X於-2至1之範圍內變化。又,縱軸之θ為以圖6所示之半導體裝置200之熱阻力、以圖4所示之先前構造之具有電子電路體100之半導體裝置200之熱阻力為分母,進行標準化而得之值。因此,圖中,以符號CS表示θ=1。此處,熱阻力定義為於半導體元件1a運轉產生特定發熱量之穩定狀態下,自半導體裝置200之溫度分佈算出之與熱量之初始狀態之增量。原因在於認為該增量越大,對外部之散熱越小。
自圖8可知,X越大,即溝槽T之位置越接近下部電極1g之端部,熱阻力越大。因此,於本圖所示之X之範圍內,因溝槽T之位置處於下部電極1g之內側可將熱阻力抑制得較低,故而較佳。
可知若考慮圖7所示之熱應力及圖8所示之熱阻力,則於X為-0.4時,熱應力最小且熱阻力亦抑制得較低。
如圖6所示,藉由將溝槽T設置於X=-0.4之位置,而可抑制點p1處之應力之集中,將變形量最小化。再者,因於構造T之正上方,設置有上部電極1d,故可確保自半導體元件1a朝向上方之散熱路徑,可抑制來自半導體元件1a之熱阻力。
於本實施例中,使用以Sn為主成分之焊料作為導電性接合材1p。因以Sn為主成分之焊料與以Pb設主成分之焊料相比,彈性率更高,且熱傳導率更高,故認為於應用於如圖4之先前構造之情形時,半導體元件1a中產生之應力增大,熱阻力下降。此處,雖問題在於應力,但如本實施例般,藉由設置溝槽T,而可將半導體元件1a中產生之應力抑制至與使用以Pb為主成分之焊料之先前構造同等以下。於本實施例中,雖因設置溝槽T而熱阻力增加,但因使用以Sn為主成分之焊料,故亦可抑制熱阻力。設想即使於使用用Cu或Ag之燒結金屬等其他無Pb接合材之情形時,於彈性率、熱傳導率較Pb高之情形時,亦可定性地獲得同樣之傾向。
另,本實施例之效果並非限定於X=-0.4者。
圖9係局部顯示改變溝槽T之位置之半導體裝置之縱剖視圖。
於本圖中,以溝槽T之中心線F-F’位於端部E-E’之外側之方式配置溝槽T。即,為設為X=0.25之例。於該例之情形時,亦可以說溝槽T設置於與第2電極重合之位置。
於本圖中,於溝槽T之正上方,上部電極1d重合之區域極小,故自半導體元件1a朝向上方之散熱路徑雖小於圖6所示之X=-0.4,但如圖8所示,熱阻力之增加量較小。
由圖7可知,即使如圖9之例般設為X=0.25,亦可設為與先前構造之情形同等之應力。因此,即使受限於電子電路體100而無法實現X=-0.4,仍可獲得應力減少效果。
接著,對溝槽T到達下部電極1g之端部之必要性進行說明。
圖10係局部顯示比較例之電子電路體之俯視圖。
於本圖中,溝槽T未到達下部電極1g之外周線G。溝槽T以外之構成與圖3同樣。下部電極1g於外周部區域H處(圖中,與下部電極1g之端部相接之、以虛線顯示之長方形)相連。因此,外周部區域H之兩側產生之應力未被分斷地傳達,無法獲得減少施加於半導體元件1a之應力之效果。因此,半導體元件1a之熱變形容易變大。
圖11係顯示將圖3所示之實施例與圖10所示之比較例進行對比之熱應力解析結果之圖表。實施例及比較例皆顯示使用以無鉛接合材即Sn為主成分之焊料之情形。縱軸取與圖7同樣地標準化之應力σ。另,作為將應力標準化時之分母,使用對導電性接合材1p使用鉛焊料時之應力。
如圖11所示,相對於實施例Ex之1.22,比較例Cm高達1.48。自該結果可知,期望溝槽T到達下部電極1g之端部。
[實施例2]
接著,使用圖12~14,說明實施例2之半導體裝置。
圖12係局部顯示本實施例之電子電路體之俯視圖。
於本圖中,構成為下部電極1g之寬度變小,其端部Te位於半導體元件1a之內側。於下部電極1g設置有溝槽T。
圖13係圖12之B-B’剖視圖。
於圖13中,下部電極1g之端部位於半導體元件1a之內側。
圖14係顯示本實施例之半導體元件之端部附近之縱剖視圖。
如本圖所示,於位於半導體元件1a之端部之區域D2未接合下部電極1g。因此,於例如回焊步驟或繞流步驟之冷卻過程中下部電極1g熱收縮之情形時,於半導體元件1a之端部不會受到來自下部電極1g之應力。藉此,可降低點p1之應力。
另,使下部電極1g之端部處於較半導體元件1a之端部更靠內側之構成亦可應用於設置有溝槽T之構成中。又,與於下部電極1g僅設置有溝槽T之構成相比,可進一步縮小點p1之應力。
[實施例3]
圖15係局部顯示實施例3之電子電路體之俯視圖。
於本圖中,沿下部電極1g之長邊方向設置到達端部之溝槽T,且於設置有4條之溝槽T中之2條設置溝槽T2。溝槽T2沿下部電極1g之短邊方向設置。又,溝槽T2以於溝槽T之中途連通於溝槽T之方式設置。換言之,溝槽T具有分支之溝槽T2。
本實施例之構成為對圖3所示之實施例1之構成追加有溝槽T2者。
藉由設為此種構成,可同時抑制下部電極1g之長邊方向及短邊方向上之半導體元件1a之熱變形,可進一步減少半導體元件1a中產生之應力。
圖16係顯示圖15之構成之效果之圖表。條件與圖11相同。
如圖16所示,本實施例(Ex3)之熱應力σ為1.17,低於實施例1(Ex1)。因此,若對溝槽T追加溝槽T2,則可獲得進一步減少熱應力之效果。
以下,對可藉由本揭示之半導體裝置獲得之效果總結說明。
根據本揭示之半導體裝置,可減少半導體元件中產生之應力,且抑制熱阻力增加,提高可靠性。
因可減少應力,故可防止半導體元件破損。
因可抑制熱阻力增加,故可防止半導體元件故障。
又,不僅單面安裝構造,於具有兩面安裝構造之半導體裝置中,亦可抑制溫度上升,即使使用時之電流增多亦可不發生故障。
1a:半導體元件
1b:電容器
1c:控制電路晶片
1d:上部電極
1f:導線
1g:下部電極
1h:樹脂
1i:引線框架
1p:導電性接合材
1q:導電性接合材
2:基座
2a:台座
3:引線
3a:引線頭
4a:導電性接合材
4b:導電性接合材
5:模塑樹脂
100:電子電路體
200:半導體裝置
C:閘極電極
Cm:比較例
D:汲極電極
D1:區域
D2:區域
Ex:實施例
Ex1:實施例1
Ex3:實施例3
G:外周線
H:外周部區域
J:距離
L:表面保護膜
p1:點
S:源極電極
T:溝槽
T2:溝槽
Tb:箭頭
Te:端部
Tj:箭頭
U:寬度
W:距離
Y:區域
σ:熱應力
θ:熱阻力
圖1係顯示實施例1之半導體裝置之模式縱剖視圖。
圖2係顯示圖1之半導體元件1a以及位於其上部及下部之零件之放大縱剖視圖。
圖3係局部顯示圖1之電子電路體100之俯視圖。
圖4係顯示先前構造之半導體裝置之局部縱剖視圖。
圖5係顯示實施例1之半導體裝置之局部縱剖視圖。
圖6係幾何性顯示與圖5所示之半導體裝置相同之部分之縱剖視圖。
圖7係顯示藉由有限要件解析推定實施例1之半導體元件中產生之熱應力之結果之一例的圖表。
圖8係顯示藉由有限要件解析推定圖6所示之半導體裝置200之熱阻力之結果之一例的圖表。
圖9係局部顯示改變溝槽T之位置之半導體裝置之縱剖視圖。
圖10係局部顯示比較例之電子電路體之俯視圖。
圖11係顯示對比圖3所示之實施例與圖10所示之比較例之熱應力解析結果之圖表。
圖12係局部顯示實施例2之電子電路體之俯視圖。
圖13係圖12之B-B’剖視圖。
圖14係顯示實施例2之半導體元件之端部附近之縱剖視圖。
圖15係局部顯示實施例3之電子電路體之俯視圖。
圖16係顯示圖15之構成之效果之圖表。
1a:半導體元件
1b:電容器
1c:控制電路晶片
1d:上部電極
1f:導線
1g:下部電極
1h:樹脂
1i:引線框架
1p:導電性接合材
1q:導電性接合材
2:基座
2a:台座
3:引線
3a:引線頭
4a:導電性接合材
4b:導電性接合材
5:模塑樹脂
100:電子電路體
200:半導體裝置
D:汲極電極
S:源極電極
T:溝槽
Claims (7)
- 一種半導體裝置,其具有:半導體晶片,其於一面具有第1主電極,於另一面具有第2主電極及閘極電極;第1電極,其經由第1接合材連接於上述半導體晶片之上述一面;及第2電極,其經由第2接合材連接於上述半導體晶片之上述另一面;且上述第1電極為板狀之電極,於與上述半導體晶片重合之區域具有溝槽;上述溝槽具有於上述第1電極之厚度方向貫通之構成,且為俯視觀察時到達上述第1電極之端部之形狀;上述溝槽之寬度寬於上述第1接合材之厚度。
- 如請求項1之半導體裝置,其中上述溝槽設置於與上述第2電極重合之位置。
- 如請求項1之半導體裝置,其中於將上述第2電極中與上述半導體晶片之連接面之端部至上述半導體晶片之端部之距離設為W,將上述第2電極中與上述半導體晶片之上述連接面之上述端部至上述溝槽之中心線之距離設為J,將J/W定義為X時,上述溝槽之上述中心線之位置滿足下述式(1)-1.2<X<0.3…(1)。
- 如請求項1之半導體裝置,其中上述第1接合材及上述第2接合材為以Sn為主成分之焊料。
- 如請求項1之半導體裝置,其中上述第2電極之端部於俯視觀察時處於較上述半導體晶片更靠內側,上述第1電極之上述端部於俯視觀察時處於較上述半導體晶片更靠外側。
- 如請求項1之半導體裝置,其中上述第2電極之端部於俯視觀察時處於較上述半導體晶片更靠內側,上述第1電極之上述端部於俯視觀察時處於較上述半導體晶片更靠內側。
- 如請求項1之半導體裝置,其中上述溝槽具有以連通於上述溝槽之方式設置並自上述溝槽分支之溝槽。
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