TWI764147B - 用於建構基板之方法 - Google Patents
用於建構基板之方法Info
- Publication number
- TWI764147B TWI764147B TW109115253A TW109115253A TWI764147B TW I764147 B TWI764147 B TW I764147B TW 109115253 A TW109115253 A TW 109115253A TW 109115253 A TW109115253 A TW 109115253A TW I764147 B TWI764147 B TW I764147B
- Authority
- TW
- Taiwan
- Prior art keywords
- seed layer
- titanium
- substrate
- etching
- layer
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 49
- 239000000758 substrate Substances 0.000 title claims abstract description 36
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims abstract description 46
- 239000010936 titanium Substances 0.000 claims abstract description 46
- 229910052719 titanium Inorganic materials 0.000 claims abstract description 46
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 claims abstract description 38
- 238000005530 etching Methods 0.000 claims abstract description 28
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 24
- 229910000147 aluminium phosphate Inorganic materials 0.000 claims abstract description 19
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 14
- 239000004020 conductor Substances 0.000 claims abstract description 14
- 229910052802 copper Inorganic materials 0.000 claims abstract description 14
- 239000010949 copper Substances 0.000 claims abstract description 14
- 238000000151 deposition Methods 0.000 claims abstract description 5
- 239000004065 semiconductor Substances 0.000 claims abstract description 5
- 238000007654 immersion Methods 0.000 claims description 14
- 239000007800 oxidant agent Substances 0.000 claims description 14
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 claims description 8
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 claims description 6
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 6
- 238000004140 cleaning Methods 0.000 claims description 6
- 239000001301 oxygen Substances 0.000 claims description 6
- 229910052760 oxygen Inorganic materials 0.000 claims description 6
- 239000007788 liquid Substances 0.000 claims description 5
- 238000005507 spraying Methods 0.000 claims description 5
- 239000003795 chemical substances by application Substances 0.000 claims description 3
- 238000009713 electroplating Methods 0.000 claims description 3
- 238000004544 sputter deposition Methods 0.000 claims description 3
- 238000003860 storage Methods 0.000 claims description 3
- 230000008021 deposition Effects 0.000 claims description 2
- 239000007789 gas Substances 0.000 claims description 2
- 239000002904 solvent Substances 0.000 claims description 2
- 238000009210 therapy by ultrasound Methods 0.000 claims 1
- 239000011248 coating agent Substances 0.000 abstract 1
- 238000000576 coating method Methods 0.000 abstract 1
- 239000000243 solution Substances 0.000 description 16
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 6
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 4
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 238000010276 construction Methods 0.000 description 3
- 239000007921 spray Substances 0.000 description 3
- 150000003609 titanium compounds Chemical class 0.000 description 3
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 2
- 230000004913 activation Effects 0.000 description 2
- 239000012670 alkaline solution Substances 0.000 description 2
- 239000007864 aqueous solution Substances 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 238000010494 dissociation reaction Methods 0.000 description 2
- 230000005593 dissociations Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000000605 extraction Methods 0.000 description 2
- 125000002887 hydroxy group Chemical group [H]O* 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 2
- 238000003631 wet chemical etching Methods 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 238000012822 chemical development Methods 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
- 230000008025 crystallization Effects 0.000 description 1
- 125000004122 cyclic group Chemical group 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000004880 explosion Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 239000011295 pitch Substances 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000000527 sonication Methods 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 239000007858 starting material Substances 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000002604 ultrasonography Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32134—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by liquid etching only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76865—Selective removal of parts of the layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/02068—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
- H01L21/2885—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
- H01L21/76873—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroplating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76879—Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76885—By forming conductive members before deposition of protective insulating material, e.g. pillars, studs
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- ing And Chemical Polishing (AREA)
- Weting (AREA)
Abstract
指定的是一種用於建構基板的方法,尤其是藉由半導體和積體電路(IC)基板工業中的選擇性蝕刻來建構,其中進行以下步驟:提供基板;施加鈦種子層;全域披覆光阻層;微影術建構光阻層,以暴露鈦種子層的區域;在其中暴露鈦種子層的區域中,選擇性地沉積銅作為導電軌;移除已建構的光阻;以及蝕刻已建構的光阻先前所覆蓋之區域中的鈦種子層,其中,磷酸用於蝕刻鈦種子層,並且此外,在鈦的蝕刻期間進行對紫外(UV)光的曝露。
Description
本發明有關用於建構基板的方法,尤其是藉由半導體和積體電路(IC)基板工業中的選擇性蝕刻來建構。
先前一般技術已知有可能沉積金屬層在絕緣基板上,其然後以濕式化學蝕刻來建構。舉例而言,具有銅層的基板是已知的,藉此典型而言起初電化學沉積種子層作為種子或孕核(nucleus),以利於結晶化。然後將進一步電解沉積的銅層施加至電化學沉積的銅層,再合起來建構它們以形成用於接線所要的導體路徑元件。進一步的過程步驟(例如形成鍍覆的貫穿孔,其也已知為通孔)也可能是必要的並且是熟於此技術者所知的。
典型來說,是以最小結構寬度及其間的最小距離而言來定出建構之路徑元件的特徵。目前,於基板工業中,所形成之結構通常有8微米的最小結構解析度及近
似相同尺寸的相鄰結構之間的最小距離。
遵循此持續增加迷你化的趨勢來看,目前進一步發展的目標在於達成範圍在5微米或2微米及更小的最小結構寬度或間距。然而,為此目的,則必須針對蝕刻科技產生對應的進一步提升,尤其要減少蝕刻期間所造成的底切。
一種途徑或許是用另一種金屬來取代上述的種子層,以便能夠選擇性地蝕刻,這尤其會允許減少對沉積之電解銅層的濕式化學侵蝕。
可能的變化例或許是使用鈦作為種子層,藉此鈦層典型而言以300奈米或更小的層厚度而施加到基板。於已知的過程,鈦層然後以氫氟酸或鹼性溶液(亦即特別是氫氧化鈉(NaOH)或氫氧化鉀(KOH))來蝕刻,其時常與過氧化氫做組合。
然而,此二種過程(亦即以氫氟酸以及於鹼性溶液中蝕刻鈦)都取決於結構之間的溶液交換,並且就過程科技而言也具有生成極度危險之過程條件的主要缺點。除了高腐蝕性效應以外(其或許對所用機器具有負面衝擊,對操作人員和環境亦同),也還有經由單獨反應成分的突然分解而爆炸的風險,這當使用KOH時尤其重要。
從歐洲專利申請案第2549553A2號得知發光二極體(LED)模組及對應的製程,其中,LED模組具有形成在絕緣層上的幾個接地平面。絕緣層舉例而言可以提供成氧化矽。種子層施加到絕緣層,其具有鈦或金作為起
始層。
據此本發明的目的是產生一種用於建構基板的過程,尤其是藉由半導體和IC基板工業中的選擇性蝕刻來建構,其就過程條件而言要比技術現況所知的過程更容易控制,並且此外,其允許有低於2微米的結構解析度。
這目的是由請求項1的特徵所達成。本發明之進一步有利的具體態樣是附屬項的標的。這些可以用科技上有意義的方式來組合。說明書尤其配合圖式而額外刻畫且述明本發明。
根據本發明,一種用於建構基板的方法被述明,尤其是藉由半導體和IC基板工業中的選擇性蝕刻來建構,其中進行以下步驟:提供基板,施加鈦種子層在基板上,沉積光阻層在具有鈦種子層之基板的整個表面上,微影術建構光阻層,以暴露鈦種子層的區域,在其中暴露鈦種子層的區域中,選擇性地沉積銅作為導電軌,移除已建構的光阻,以及蝕刻已建構的光阻先前所覆蓋之區域中的鈦種子層,其中,磷酸用於蝕刻鈦種子層,並且此外,在鈦的蝕刻期間進行對紫外(UV)光的曝露。
據此,所用的是藉由於水溶液中的磷酸來蝕刻鈦種子層,其額外受到曝露於UV光的影響,如此則可以進行對導電軌之銅材料有選擇的蝕刻。此方法產生顯著較少的底切,如此則可以達成較小的導電軌寬度及其間的距離。
根據本發明的一具體態樣,鈦種子層具有100到300奈米的層厚度,並且藉由從氣相來沉積而產生,較佳而言藉由濺鍍。
這允許鈦種子層簡單地施加在幾乎所有已知的基板上。
根據本發明的進一步具體態樣,銅層是以電鍍所施加。
銅層可以直接施加在已建構之光阻所覆蓋的區域之間,以界定導電軌結構。
根據本發明的進一步具體態樣,UV光具有300奈米或更短的波長。典型而言,可以使用波長為185奈米、254奈米或此二波長的組合之UV燈或UV雷射。
由於照射UV光的緣故,蝕刻溶液中產生了氧或臭氧。再者,UV光引起鈦的活化,特別是氧化成氧化鈦,這允許擴散層中有直接的化學反應,因此使溶液交換的需求最小化。再者,UV光支持OH從磷酸解離,如此則分離的OH基支持鈦的蝕刻。
根據本發明的進一步具體態樣,在蝕刻之後施行高壓清洗過程。
據此,沖洗或清洗過程是以高壓沖洗來進行,以便增加過程可靠度並且能夠除掉仍附著的鈦化合物。
根據本發明的進一步具體態樣,鈦種子層的蝕刻是以浸沒於具有磷酸之槽中或噴灑磷酸來進行。
據此,蝕刻過程可以用不同方式來進行,亦即藉由靜態或移動的浸沒而也可藉由噴灑,這生成廣泛的應用。
根據本發明的進一步具體態樣,添加額外的氧化劑。
根據本發明的進一步具體態樣,氧化劑是以液態形式來添加,較佳而言為過氧化氫,或以氣態形式來添加,較佳而言為氧或臭氧。
根據本發明的進一步具體態樣,當產品為新製備或在較長保存時間後再次使用時,添加氧化劑作為起始劑。
根據本發明的進一步具體態樣,添加額外的氧化劑以加速過程。
添加額外的氧化劑則有可能使用具有磷酸的溶液以作為用於新的溶液或較長保存壽命之後的起始劑。再者,也可能使用額外的氧化劑以加速過程。
根據本發明的進一步具體態樣,進行額外的超音波處理。
尤其於浸沒應用的情形,這可以改善移除用
過的材料或鬆掉仍附著的鈦化合物。
根據本發明的進一步具體態樣,溶劑連同磷酸饋至抽吸裝置。
於浸沒和噴灑應用,安裝一或更多個抽吸裝置或許可改善流動,因此改善基板上之極精細結構中的溶液交換。噴灑或流動(在浸沒期間)與溶液抽取的組合則在結構表面上產生流動並且促進溶液交換。
2:基板
4:鈦種子層
6:光阻層
8:已建構的光阻
10:導電軌
12:浸沒槽
14:液位
16:UV燈
18:饋線
20:清洗裝置
下面參考圖式來更詳細解釋某些具體態樣。於圖式:[圖1A~F]以側視圖來顯示在藉由根據本發明方法來建構基板的導電表面之期間的單獨過程步驟,[圖2]以側視圖來顯示用於進行根據本發明方法的第一裝置,以及[圖3]以側視圖來顯示用於進行根據本發明方法的第二裝置。
於圖中,相同或功能等同的構件則設有相同的參考數字。
下面參考圖1A到1F來更詳細描述本發明的第一具體態樣,其舉例而言適合製造用於上面安裝積體電路的基板之建構的導電表面。
如圖1A所示,鈦種子層4首先沉積在基板2上。鈦種子層4經常形成有300奈米或更小的厚度,並且以濺鍍而產生在基板2上。鈦種子層4在下面將稱為種子層。
圖1B顯示光阻層6現施加在鈦種子層4背對基板2的整個表面上,這經常可以藉由旋塗或層合而達成。然而,不排除此領域之技術者所知而用於施加光阻層6在整個區域上的其他方法。
如圖1C所示,光阻層6後續藉由微影曝光而加以建構或圖案化,如此則在經常為濕式的化學顯影步驟之後,全域光阻層6轉換成具有多個結構元件之已建構的光阻8。已建構的光阻8的剩餘部分在稍後施加中則對應於要在基板2上設有導電軌處之外的位置。因此,不用說已建構的光阻8也可以形成有其他(尤其是不規則的)圖案,其可以大大偏離於圖1C所僅象徵地顯示的設計。
於後續過程步驟,銅選擇性地引至鈦種子層4上而在不被已建構的光阻8所覆蓋的區域中,這經常以電鍍來做。導電軌於圖1D中是以參考符號10所標示。
於圖1E所示的次一過程步驟,移除已建構的光阻8。結果,現暴露出銅材料所形成的導電軌10之間的區域,如此則現暴露出在導電軌10外的鈦種子層4。於已建構的光阻8先前所覆蓋的區域,現以蝕刻來移除鈦種子層,藉此磷酸用於蝕刻鈦種子層4,如此則可以進行對導電軌10之銅材料有選擇的蝕刻。此種程序產生顯著較少的底切,如此則可以達成較小的導電軌寬度及其間的距離。
參考圖2,再更詳細地解釋圖1F所示的蝕刻步驟。可以顯示的是基板2置於填滿磷酸的浸沒槽12中,其中,浸沒槽12中的基板可以維持靜止或者可以移動。於未顯示於圖2的另一變化例,也有可能會以磷酸來噴灑基板的表面。
磷酸是以給定濃度的水溶液而存在,如圖2所示由參考符號14所指的液位。附帶而言,在蝕刻過程期間,UV光藉由UV燈16而施加至鈦種子層4,該燈可以發出波長為185奈米、254奈米或這二波長之組合的UV光。
這照射來自UV燈16之UV光的任務是於蝕刻溶液中產生氧或臭氧。再者,UV光引起鈦的活化,特別是氧化成氧化鈦,這能夠於擴散層中有直接的化學反應,因此使溶液交換的需求最小化。再者,UV光支持OH部分從磷酸解離或分離,如此則分離的OH基支持鈦的蝕刻。
根據本發明,UV燈16可以直接照射基板2的表面,但也可以間接用於浸沒槽12,因為儘管那樣仍分離出OH並且產生氧或臭氧。間接照射的效果可能較差但足供此應用。「曝露於UV光」(exposure with UV light)一詞因此一般理解為意謂使用UV光,而不管它是否直接指向表面。
圖2也顯示本發明的進一步具體態樣。在此,除了磷酸濕式化學蝕刻以外,還添加氧化劑,其可以採液態或氣態形式而供應成過氧化氫、氧或臭氧。
額外氧化劑的添加於圖2是以饋線18所示意
顯示。氧化劑的任務是當製備新的溶液或當它在較長保存時間後要使用時作為用於具有磷酸之溶液的起始劑。再者,也可能使用額外的氧化劑以加速過程。
後續而言,如圖3所指以清洗裝置20的高壓沖洗來進行清洗或沖洗過程以增加過程可靠度,以便能夠鬆掉任何仍附著的鈦化合物。這過程步驟典型而言是可選用的,並且其需求將視所需應用而定。
可選擇而言,鈦或許最好藉由浸沒施加的超音波而從小結構中移除。特別是有循環式開啟和關閉,或許可改善極精細結構中的溶液交換。
於浸沒和噴灑應用,安裝額外的抽吸裝置或許可進一步改善流動,因此改善導電軌10之極精細結構中的溶液交換。噴灑或流動(於浸沒中)與溶液抽取的組合則在表面或結構產生流動並且促進溶液交換。
相較於已知的先前技術(尤其是直接作用在待蝕刻的表面上),關於圖1到3所解釋之發明方法的過程步驟較不危險。實驗已顯示可以此來實現解析度小於2微米的結構元件。
上述及請求項中的特徵以及圖中可能見到的特徵可能單獨地以及以多樣的組合而做有利地實施。本發明不限於所述的範例性具體態樣,而可能在專家知識的範圍裡以許多方式來修改。
2:基板
12:浸沒槽
14:液位
16:UV燈
18:饋線
Claims (12)
- 一種用於建構基板的方法,尤其是藉由半導體和積體電路(IC)基板工業中的選擇性蝕刻來建構,其中進行以下步驟: 提供基板, 施加鈦種子層在該基板上, 沉積光阻層在具有該鈦種子層之該基板的整個表面上, 微影術建構該光阻層,以暴露該鈦種子層的區域, 在其中暴露該鈦種子層的區域中,選擇性地沉積銅作為導電軌, 移除該已建構的光阻,以及 蝕刻該已建構的光阻先前所覆蓋之該區域中的該鈦種子層,其中,磷酸用於蝕刻該鈦種子層,並且此外,在該鈦的該蝕刻期間進行對紫外(UV)光的曝露。
- 根據請求項1的方法,其中,該鈦種子層具有100到300奈米的層厚度,並且藉由從氣相來沉積而產生,較佳而言藉由濺鍍。
- 根據請求項1或2的方法,其中,該銅層是以電鍍所施加。
- 根據請求項1或2的方法,其中,該UV光具有300奈米或更短的波長,較佳而言為185奈米、254奈米,或此二波長的組合。
- 根據請求項1或2的方法,其中,在蝕刻之後施行高壓清洗過程。
- 根據請求項1或2的方法,其中,該鈦種子層的該蝕刻是以浸沒於具有磷酸之槽中或噴灑磷酸來進行。
- 根據請求項1或2的方法,其中,添加額外的氧化劑。
- 根據請求項7的方法,其中,該氧化劑是以液態形式來添加,較佳而言為過氧化氫,或以氣態形式來添加,較佳而言為氧或臭氧。
- 根據請求項7的方法,其中,當溶液為新製備或已在較長保存時間後來使用時,添加該氧化劑作為起始劑。
- 根據請求項7的方法,其中,添加該額外的氧化劑以加速該過程。
- 根據請求項1或2的方法,其中,額外進行超音波處理。
- 根據請求項1或2的方法,其中,溶劑連同該磷酸饋至抽吸裝置。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102019112030.6 | 2019-05-08 | ||
DE102019112030.6A DE102019112030B4 (de) | 2019-05-08 | 2019-05-08 | Verfahren zum Strukturieren eines Substrats |
Publications (2)
Publication Number | Publication Date |
---|---|
TW202111815A TW202111815A (zh) | 2021-03-16 |
TWI764147B true TWI764147B (zh) | 2022-05-11 |
Family
ID=70738488
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW109115253A TWI764147B (zh) | 2019-05-08 | 2020-05-07 | 用於建構基板之方法 |
Country Status (10)
Country | Link |
---|---|
US (1) | US11854829B2 (zh) |
EP (1) | EP3853883B1 (zh) |
JP (1) | JP2022532288A (zh) |
KR (1) | KR102606268B1 (zh) |
CN (1) | CN113508458B (zh) |
DE (1) | DE102019112030B4 (zh) |
ES (1) | ES2914075T3 (zh) |
PT (1) | PT3853883T (zh) |
TW (1) | TWI764147B (zh) |
WO (1) | WO2020225414A1 (zh) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2012057467A2 (ko) * | 2010-10-28 | 2012-05-03 | ㈜동진쎄미켐 | 구리 함유 금속막 식각액 조성물 및 이를 이용한 식각 방법 |
US20160053384A1 (en) * | 2013-04-12 | 2016-02-25 | Mitsubishi Gas Chemicalcompany, Inc. | Liquid composition used in etching copper - and titanium - containing multilayer film, etching method in which said composition is used, method for manufacturing multilayer-film wiring, and substrate |
US20180371625A1 (en) * | 2017-06-22 | 2018-12-27 | Samsung Display Co., Ltd. | Etchant composition and forming method of wiring using etchant composition |
DE102018117822A1 (de) * | 2017-11-17 | 2019-05-23 | Taiwan Semiconductor Manufacturing Co., Ltd. | Drei-schritte-ätzen zum bilden einer rdl |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1410780A (en) * | 1972-09-29 | 1975-10-22 | Exacta Circuits Ltd | Through-hole plated printed circuits |
US5120572A (en) * | 1990-10-30 | 1992-06-09 | Microelectronics And Computer Technology Corporation | Method of fabricating electrical components in high density substrates |
US6376374B1 (en) * | 1998-05-12 | 2002-04-23 | Semitool, Inc. | Process and manufacturing tool architecture for use in the manufacturing of one or more protected metallization structures on a workpiece |
KR20040043383A (ko) * | 2002-11-18 | 2004-05-24 | 주식회사 하이닉스반도체 | 반도체 소자의 구리 배선 형성방법 |
JP4510369B2 (ja) * | 2002-11-28 | 2010-07-21 | 日本リーロナール有限会社 | 電解銅めっき方法 |
JP3778508B2 (ja) * | 2002-12-10 | 2006-05-24 | 聯華電子股▲ふん▼有限公司 | 集積回路の製造方法 |
JP2004311537A (ja) * | 2003-04-03 | 2004-11-04 | Renesas Technology Corp | 半導体装置 |
JP5346497B2 (ja) * | 2007-06-12 | 2013-11-20 | 株式会社半導体エネルギー研究所 | 半導体装置 |
JP2010135461A (ja) * | 2008-12-03 | 2010-06-17 | Seiko Epson Corp | 電子部品実装用フィルムキャリアテープの製造方法 |
US7901981B2 (en) * | 2009-02-20 | 2011-03-08 | National Semiconductor Corporation | Integrated circuit micro-module |
KR101121151B1 (ko) | 2010-03-19 | 2012-03-20 | 주식회사 대원이노스트 | Led 모듈 및 그 제조 방법 |
US8389397B2 (en) * | 2010-09-14 | 2013-03-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for reducing UBM undercut in metal bump structures |
JP2012119664A (ja) * | 2010-11-12 | 2012-06-21 | Kobe Steel Ltd | 配線構造 |
US8778799B2 (en) * | 2011-01-13 | 2014-07-15 | Tamarack Scientific Co. Inc. | Laser removal of conductive seed layers |
DE102013112045A1 (de) * | 2013-10-31 | 2015-04-30 | Holger Manfred Schmid | Vorrichtung und Verfahren zur Bearbeitung von metallischen Oberflächen mit einer Ätzflüssigkeit |
US9159683B2 (en) * | 2014-02-10 | 2015-10-13 | GlobalFoundries, Inc. | Methods for etching copper during the fabrication of integrated circuits |
US9275896B2 (en) * | 2014-07-28 | 2016-03-01 | GlobalFoundries, Inc. | Methods for fabricating integrated circuits using directed self-assembly |
KR102667884B1 (ko) * | 2016-07-27 | 2024-05-23 | 삼성전자주식회사 | 반도체 소자의 제조 방법 |
JP2018117056A (ja) * | 2017-01-19 | 2018-07-26 | 富士通株式会社 | 電子部品、電子部品の製造方法及び電子装置 |
-
2019
- 2019-05-08 DE DE102019112030.6A patent/DE102019112030B4/de active Active
-
2020
- 2020-05-07 TW TW109115253A patent/TWI764147B/zh active
- 2020-05-08 JP JP2021554409A patent/JP2022532288A/ja active Pending
- 2020-05-08 WO PCT/EP2020/062843 patent/WO2020225414A1/de unknown
- 2020-05-08 US US17/423,369 patent/US11854829B2/en active Active
- 2020-05-08 KR KR1020217029058A patent/KR102606268B1/ko active IP Right Grant
- 2020-05-08 ES ES20726012T patent/ES2914075T3/es active Active
- 2020-05-08 EP EP20726012.6A patent/EP3853883B1/de active Active
- 2020-05-08 CN CN202080016906.6A patent/CN113508458B/zh active Active
- 2020-05-08 PT PT207260126T patent/PT3853883T/pt unknown
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2012057467A2 (ko) * | 2010-10-28 | 2012-05-03 | ㈜동진쎄미켐 | 구리 함유 금속막 식각액 조성물 및 이를 이용한 식각 방법 |
US20160053384A1 (en) * | 2013-04-12 | 2016-02-25 | Mitsubishi Gas Chemicalcompany, Inc. | Liquid composition used in etching copper - and titanium - containing multilayer film, etching method in which said composition is used, method for manufacturing multilayer-film wiring, and substrate |
US20180371625A1 (en) * | 2017-06-22 | 2018-12-27 | Samsung Display Co., Ltd. | Etchant composition and forming method of wiring using etchant composition |
DE102018117822A1 (de) * | 2017-11-17 | 2019-05-23 | Taiwan Semiconductor Manufacturing Co., Ltd. | Drei-schritte-ätzen zum bilden einer rdl |
Also Published As
Publication number | Publication date |
---|---|
KR20220006499A (ko) | 2022-01-17 |
WO2020225414A1 (de) | 2020-11-12 |
EP3853883A1 (de) | 2021-07-28 |
PT3853883T (pt) | 2022-05-13 |
JP2022532288A (ja) | 2022-07-14 |
KR102606268B1 (ko) | 2023-11-24 |
CN113508458B (zh) | 2024-05-31 |
US20220130680A1 (en) | 2022-04-28 |
US11854829B2 (en) | 2023-12-26 |
EP3853883B1 (de) | 2022-04-27 |
ES2914075T3 (es) | 2022-06-07 |
CN113508458A (zh) | 2021-10-15 |
DE102019112030B4 (de) | 2023-11-02 |
TW202111815A (zh) | 2021-03-16 |
DE102019112030A1 (de) | 2020-11-12 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR101385419B1 (ko) | 무전해 구리 도금을 통해 패터닝된 구리선을 형성하기 위한시스템 및 방법 | |
JP5898699B2 (ja) | 導電性シード層のレーザ除去 | |
KR101186240B1 (ko) | 도금방법 및 도금장치 | |
TWI764147B (zh) | 用於建構基板之方法 | |
JP2018195702A (ja) | 配線基板及びその製造方法 | |
JP2004119968A (ja) | 細線回路 | |
US6720271B2 (en) | Process for removing polymers during the fabrication of semiconductor devices | |
Schein et al. | Dry etch processing in fan-out panel-level packaging-An application for high-density vertical interconnects and beyond | |
US20220221799A1 (en) | Photoresist-free deposition and patterning with vacuum ultraviolet lamps | |
US7476412B2 (en) | Method for the metalization of an insulator and/or a dielectric | |
JP4343379B2 (ja) | 基板処理方法および基板処理装置ならびにデバイス製造方法 | |
CN113061881A (zh) | 一种电解镀铜的铜处理装置及方法 | |
JP4685478B2 (ja) | 金属膜パターンの形成方法 | |
US20010036721A1 (en) | Process for metallizing at least one insulating layer of a component | |
CN109716506A (zh) | 电子部件的制造方法 | |
JP2008088521A (ja) | 深さの異なるビアへのめっき充填方法 | |
KR20080088246A (ko) | 반도체 기판 세정 방법 | |
JP5672668B2 (ja) | 半導体装置の製造方法 | |
US8846528B2 (en) | Method of modifying a low k dielectric layer having etched features and the resulting product | |
JP6007754B2 (ja) | 配線構造の製造方法 | |
KR19990072607A (ko) | 반도체장치의제조방법 | |
KR100252759B1 (ko) | 반도체소자제조방법 | |
KR100851077B1 (ko) | 섭스트레이트 제조방법 | |
JP2004200604A (ja) | Cuのパターン形成方法 | |
JP2007243032A (ja) | 配線基板の製造方法 |