TWI743557B - 功率元件封裝結構 - Google Patents

功率元件封裝結構 Download PDF

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TWI743557B
TWI743557B TW108132048A TW108132048A TWI743557B TW I743557 B TWI743557 B TW I743557B TW 108132048 A TW108132048 A TW 108132048A TW 108132048 A TW108132048 A TW 108132048A TW I743557 B TWI743557 B TW I743557B
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heat
dissipating
insulating substrate
power
heat dissipation
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TW202111888A (zh
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蔡欣昌
劉敬文
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朋程科技股份有限公司
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Priority to TW108132048A priority Critical patent/TWI743557B/zh
Priority to US16/669,487 priority patent/US11183439B2/en
Priority to JP2019234602A priority patent/JP6967063B2/ja
Priority to FR2005605A priority patent/FR3100656B1/fr
Priority to DE102020119686.5A priority patent/DE102020119686A1/de
Publication of TW202111888A publication Critical patent/TW202111888A/zh
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Abstract

一種功率元件封裝結構，包括一散熱絕緣基板、多個功率元件、一散熱背板以及一熱介面層。散熱絕緣基板具有相對的第一面與第二面，功率元件則耦接至所述散熱絕緣基板的所述第一面。散熱背板設置於散熱絕緣基板的所述第二面，其中散熱背板的表面與散熱絕緣基板的所述第二面兩者至少其中之一具有至少一凸塊，且凸塊至少設置於所述多個功率元件的投影面積內。熱介面層則介於散熱絕緣基板的第二面與散熱背板的表面之間。

Description

功率元件封裝結構
本發明是有關於一種封裝結構，且特別是有關於一種功率元件封裝結構。
功率模組是目前應用在各種產品中作為電能轉換的主要核心設備，其內部封裝有功率元件。功率模組中的散熱基板與直接覆銅陶瓷基板（DBC）之類的晶片電路板連接時，由於DBC的熱膨脹係數與散熱基板的熱膨脹係數不同，所以在受熱期間兩者的熱變形量不同，導致DBC邊緣有較高的熱應力。
為降低對DBC的熱應力，目前在散熱基板與DBC之間採用較厚的熱介面層，來降低熱應力。然而，隨著熱介面層厚度增加，又會增加封裝結構的結構熱阻（Thermal resistance）。
本發明提供一種功率元件封裝結構，能解決傳統功率模組之熱應力過高的問題，並可降低結構熱阻。
本發明另提供一種功率元件封裝結構，能在不增加散熱絕緣基板的應力情況下，降低功率模組的熱阻。
本發明的功率元件封裝結構，包括一散熱絕緣基板、多個功率元件、一散熱背板以及一熱介面層。散熱絕緣基板具有相對的第一面與第二面，功率元件則耦接至所述散熱絕緣基板的所述第一面。散熱背板設置於散熱絕緣基板的所述第二面，其中散熱背板的表面與所述第二面兩者至少其中之一具有至少一凸塊，且凸塊至少設置於所述多個功率元件的投影面積內。熱介面層則介於散熱絕緣基板的第二面與散熱背板的表面之間。
在本發明的一實施例中，上述至少一凸塊佔據散熱背板的表面面積比率為10%~35%。
在本發明的一實施例中，上述多個功率元件的至少其中之一是以覆晶接合方式耦接至第一面。
在本發明的一實施例中，上述功率元件封裝結構還可包括一導電夾片，設置於功率元件與散熱絕緣基板接合的一相對側，並電性連接功率元件至散熱絕緣基板的第一面。
在本發明的一實施例中，上述導電夾片的材料例如鋁、銅或碳纖維。
在本發明的一實施例中，每個凸塊的截面形狀可為梯形、三角形、圓形或矩形。
在本發明的一實施例中，上述散熱絕緣基板包括直接覆銅陶瓷基板(DBC)、絕緣金屬基板(IMS)或印刷電路基板(PCB)。
本發明的另一功率元件封裝結構，包括一散熱絕緣基板、多個功率元件、一散熱背板以及一熱介面層。散熱絕緣基板具有相對的第一面與第二面，功率元件則耦接至所述散熱絕緣基板的所述第一面。散熱背板設置於散熱絕緣基板的所述第二面。熱介面層則分別和散熱絕緣基板的第二面與散熱背板相接觸，且熱介面層位於所述第二面與所述散熱背板之間，其中熱介面層在多個功率元件的投影面積內的最小厚度小於在功率元件的投影面積外的厚度。
在本發明的另一實施例中，上述散熱背板或上述散熱絕緣基板至少其中之一接觸熱介面層的表面具有至少一凸塊，所述至少一凸塊至少設置於多個功率元件的投影面積內。
在本發明的各個實施例中，上述至少一凸塊佔據的面積大於或實質上等於上述多個功率元件的投影面積。
在本發明的各個實施例中，上述至少一凸塊與上述散熱背板或散熱絕緣基板是一體成型的。
在本發明的各個實施例中，上述熱介面層包含導熱膏、燒結銀或錫膏。
基於上述，本發明的功率元件封裝結構是透過在散熱絕緣基板與散熱基板之間設置許多的凸塊結構，藉此在不增加散熱絕緣基板的熱應力情況下，降低功率元件封裝結構整體的熱阻。
為讓本發明的上述特徵和優點能更明顯易懂，下文特舉實施例，並配合所附圖式作詳細說明如下。
以下揭示內容提供許多不同的實施方式或範例，用於實施本發明的不同特徵。當然這些實施例僅為範例，並非用於限制本發明的範圍與應用。再者，為了清楚起見，各個構件、膜層或區域的相對厚度及位置可能縮小或放大。另外，在各圖式中使用相似或相同的元件符號來標示相似或相同元件或特徵，且圖式中如有與前一圖相同的元件符號，則將省略其贅述。
圖1A是依照本發明的第一實施例的一種功率元件封裝結構的剖面示意圖。
請參照圖1A，本實施例的功率元件封裝結構100包括一散熱絕緣基板102、多個功率元件104、一散熱背板106以及一熱介面層108。多個功率元件104耦接至散熱絕緣基板102的所述第一面102a。在一實施例中，至少一個功率元件104是以覆晶接合方式耦接至第一面102a。上述散熱絕緣基板102例如直接覆銅陶瓷基板(DBC)、絕緣金屬基板(IMS)或印刷電路基板(PCB)。散熱背板106則設置於散熱絕緣基板102的第二面102b，且散熱背板106的表面106a具有多個凸塊110，且凸塊110至少設置於多個功率元件104的投影面積PA內。在本實施例中，凸塊110與散熱背板106是一體成型的，且每個凸塊110的截面形狀為梯形。然而，本發明並不限於此，上述凸塊110的位置、數量、分布範圍、截面形狀等均可依需求做變更。舉例來說，凸塊110的位置也可以設置在第二面102b；凸塊110的數量可為1個、2個或更多個；凸塊110佔據的面積可大於或實質上等於投影面積PA；凸塊110與散熱背板106可以是分開的；每個凸塊110的截面形狀可為三角形、圓形、矩形等。至於熱介面層108則介於散熱絕緣基板102的第二面102b與散熱背板106的表面106a之間，其中熱介面層108例如導熱膏(Thermal grease)、燒結銀(Sintered Ag)或錫膏(Eutectic Solder)等焊料。
請繼續參照圖1A，散熱絕緣基板102例如有一圖案化線路112，且圖案化線路112是形成於一絕緣材料板114上。散熱絕緣基板102的第二面102b則可具有整層的下層線路層116；舉例來說，藉由在各個功率元件104的接墊（未繪示）上形成焊點（solder joint）118，再利用覆晶技術使焊點118正對散熱絕緣基板102的圖案化線路114，而達到功率元件104與散熱絕緣基板102的連結。
由於凸塊110的存在，可縮短功率元件104產生的熱傳遞到散熱背板106的路徑，如同在大的熱阻並連一個小的熱阻，所以能降低整體結構熱阻。如圖1A所示的向下箭頭，從功率元件104產生的熱能有大部分自凸塊110傳遞至散熱背板106，所以可同時降低結構熱阻。而且，在功率元件104的投影面積PA以外（接近散熱絕緣基板102邊緣）的熱介面層108厚度夠厚，所以還能降低功率元件封裝結構100（即散熱絕緣基板102邊緣）的熱應力。
圖1B是第一實施例的另一種功率元件封裝結構的剖面示意圖，其中沿用圖1A的元件符號與部分內容，其中採用相同的元件符號來表示相同或近似的元件，並且省略了相同技術內容的說明。關於省略部分的說明可參考前述內容，下文不再重複贅述。
在圖1B中，凸塊120的位置是設置在第二面102b，往散熱背板106的方向凸出，因此介於散熱絕緣基板102的第二面102b與散熱背板106的表面106a之間的熱介面層108，在功率元件104的投影面積PA內的最小厚度會小於投影面積PA以外的任一區域的厚度。而且，凸塊120與散熱絕緣基板102的下層線路層116是一體成型的，所以凸塊120與散熱絕緣基板102算是一體成型的結構。
圖1C是第一實施例的再一種功率元件封裝結構的剖面示意圖，其中沿用圖1A的元件符號與部分內容，其中採用相同的元件符號來表示相同或近似的元件，並且省略了相同技術內容的說明。關於省略部分的說明可參考前述內容，下文不再重複贅述。
在圖1C中，凸塊122的數量為1個，凸塊122佔據的面積略大於投影面積PA，且凸塊122與散熱背板106是分開的，所以凸塊122與散熱背板106的材料可不同，但本發明並不限於此，凸塊122與散熱背板106的材料也可以是相同的。
圖1D是第一實施例的又一種功率元件封裝結構的剖面示意圖，其中沿用圖1A的元件符號與部分內容，其中採用相同的元件符號來表示相同或近似的元件，並且省略了相同技術內容的說明。關於省略部分的說明可參考前述內容，下文不再重複贅述。
在圖1D中，功率元件104與散熱絕緣基板102接合的一相對側104a設置有一導電夾片124。導電夾片124電性連接功率元件104至散熱絕緣基板102的第一面102a。在一實施例中，導電夾片124的材料例如鋁、銅或碳纖維。而且，一個導電夾片124可電性連接多個功率元件104至散熱絕緣基板102。然而，本發明並不限於此，一個導電夾片124也可只電性連接一個功率元件104至散熱絕緣基板102。在一實施例中，若功率元件104為垂直型功率元件，則導電夾片124的一部分可電性連接垂直型功率元件的非主動區，導電夾片124的另一部分可電性連接第一面102a。此外，在第一面102a與導電夾片124之間可藉由額外的焊料層126彼此電性連接，在功率元件104與導電夾片124之間亦可藉由焊料層126彼此電性連接，但本發明並不限此。所述焊料層126例如燒結銀或錫膏等焊料。
圖2是依照本發明的第二實施例的一種功率元件封裝結構的剖面示意圖，其中沿用第一實施例的元件符號與部分內容，其中採用相同的元件符號來表示相同或近似的元件，並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例，下文不再重複贅述。
請參照圖2，本實施例的功率元件封裝結構200包括一散熱絕緣基板102、多個功率元件104、一散熱背板106以及一熱介面層202。熱介面層202分別和散熱絕緣基板102的第二面102b與散熱背板106相接觸，且熱介面層202在功率元件104的投影面積PA內的最小厚度t1小於在功率元件104的投影面積PA外的厚度t2。因此，功率元件104產生的熱傳遞到散熱背板106的路徑（即最小厚度t1）可縮短，而降低結構熱阻；且投影面積PA外的熱介面層202厚度t2足夠厚，能降低功率元件封裝結構200（即散熱絕緣基板102邊緣）的熱應力。
在圖2中，散熱絕緣基板102接觸熱介面層202的表面還具有一凸塊204，所述凸塊204設置於所有功率元件104的投影面積PA內。在本實施例中，凸塊204是設置於散熱絕緣基板102的下層線路層116底下，但發明並不限於此。在另一實施例中，凸塊204可與散熱背板106或散熱絕緣基板102是一體成型的。此外，凸塊204的位置、數量、分布範圍、截面形狀等均可依需求做變更，詳見圖1A、1B、1C與1D的說明，不再此贅述。
以下列舉實驗來驗證本發明的功效，但本發明之範圍並不侷限於以下實驗內容。
〈實驗例1〉
製作一個如圖3A所示的散熱背板，其中凸塊300是與散熱背板一體成型的。然後使用圖3A的散熱背板組裝成如圖1A所示的功率元件封裝結構。
在功率元件104發熱的情況下量測整個功率元件封裝結構的熱分布，得到圖4A。
〈比較例〉
製作一個如圖3B所示的散熱背板，其表面為平面。然後使用圖3B的散熱背板組裝成如圖1A所示的功率元件封裝結構，但並無凸塊。
在功率元件104發熱的情況下量測整個功率元件封裝結構的熱分布，得到圖4B。
從圖4A與圖4B可知，具有凸塊的功率元件封裝結構的熱分布比無凸塊的功率元件封裝結構的熱分布更為均勻，且無圖4B中心部位高於135℃的溫度區。經分析比較，實驗例1的熱阻（Thermal resistance）為0.137℃/W、比較例的熱阻為0.141℃/W。因此，熱阻降幅有3%。
另外，針對實驗例1與比較例的功率元件封裝結構在功率元件發熱的情況下，進行晶粒應力（Dice stress）量測，得到實驗例1的應力為128.4 MPa、比較例的應力為128.6 MPa的結果。因此可證明凸塊的設置仍能保持較低的熱應力。
〈實驗例2〉
模擬使用數個如圖3A所示的散熱背板，其中凸塊佔據散熱背板的面積比率是從0%至40%之間，並組裝成如圖1A所示的功率元件封裝結構，其中各個構件的尺寸大小均設定為相同。
然後在功率元件104發熱的情況下模擬功率元件104之接面的最高溫度以及晶粒應力，結果顯示於圖5。
從圖5可得到，凸塊佔據面積越大，功率元件之接面溫度越低，其較佳的凸塊佔據面積約介於10%~35%。並且在特定的凸塊設計下，其凸塊的佔據面積小於25%以下，能得到不增加晶粒應力的情況下，達到降低功率元件接面溫度之功效。因此，本發明使用凸塊來縮短散熱路徑，並確保散熱絕緣基板邊緣仍有足夠厚的熱介面層，能同時降低結構熱阻。
綜上所述，在本發明的功率元件封裝結構中，藉由設置在散熱絕緣基板與散熱基板之間的凸塊結構，能達到不同區域的熱介面層具有不同厚度的結果，藉此在降低散熱絕緣基板的熱應力的同時，還能降低功率元件封裝結構整體的熱阻。
雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明的精神和範圍內，當可作些許的更動與潤飾，故本發明的保護範圍當視後附的申請專利範圍所界定者為準。
100、200:功率元件封裝結構 102:散熱絕緣基板 102a:第一面 102b:第二面 104:功率元件 104a:相對側 106:散熱背板 106a:表面 108、202:熱介面層 110、120、122、204、300:凸塊 112:圖案化線路 114:絕緣材料板 116:下層線路層 118:焊點 124:導電夾片 126:焊料層 PA:投影面積 t1:最小厚度 t2:厚度
圖1A是依照本發明的第一實施例的一種功率元件封裝結構的剖面示意圖。 圖1B是第一實施例的另一種功率元件封裝結構的剖面示意圖。 圖1C是第一實施例的再一種功率元件封裝結構的剖面示意圖。 圖1D是第一實施例的又一種功率元件封裝結構的剖面示意圖。 圖2是依照本發明的第二實施例的一種功率元件封裝結構的剖面示意圖。 圖3A是實驗例1的散熱背板之立體示意圖。 圖3B是比較例的散熱背板之立體示意圖。 圖4A是實驗例1的功率元件封裝結構的熱分布示意圖。 圖4B是比較例的功率元件封裝結構的熱分布示意圖。 圖5是實驗例2的功率元件封裝結構之凸塊面積與晶片溫度、應力的關係圖。
100:功率元件封裝結構
102:散熱絕緣基板
102a:第一面
102b:第二面
104:功率元件
106:散熱背板
106a:表面
108:熱介面層
110:凸塊
112:圖案化線路
114:絕緣材料板
116:下層線路層
118:焊點
PA:投影面積

Claims (12)

  1. 一種功率元件封裝結構，包括：一散熱絕緣基板，具有相對的第一面與第二面；多個功率元件，耦接至所述散熱絕緣基板的所述第一面；一散熱背板，設置於所述散熱絕緣基板的所述第二面，其中所述散熱背板的表面與所述第二面兩者至少其中之一具有至少一凸塊，所述至少一凸塊僅設置於所述散熱絕緣基板的投影面積內；以及一熱介面層，介於所述散熱絕緣基板的所述第二面與所述散熱背板的所述表面之間，其中所述多個功率元件的至少其中之一是以覆晶接合方式耦接至所述第一面，其中所述至少一凸塊佔據所述散熱背板的表面面積比率為10%~25%。
  2. 如申請專利範圍第1項所述的功率元件封裝結構，其中所述至少一凸塊佔據的面積大於或實質上等於所述多個功率元件的所述投影面積。
  3. 如申請專利範圍第1項所述的功率元件封裝結構，其中所述至少一凸塊與所述散熱背板或散熱絕緣基板是一體成型的。
  4. 如申請專利範圍第1項所述的功率元件封裝結構，其中每個所述凸塊的截面形狀為梯形、三角形、圓形或矩形。
  5. 如申請專利範圍第1項所述的功率元件封裝結構，更包括一導電夾片，設置於所述多個功率元件與所述散熱絕緣基板接合的一相對側，並電性連接所述多個功率元件至所述散熱絕緣基板的所述第一面。
  6. 如申請專利範圍第5項所述的功率元件封裝結構，其中所述導電夾片的材料包括鋁、銅或碳纖維。
  7. 如申請專利範圍第1項所述的功率元件封裝結構，其中所述散熱絕緣基板包括直接覆銅陶瓷基板(DBC)、絕緣金屬基板(IMS)或印刷電路基板(PCB)。
  8. 如申請專利範圍第1項所述的功率元件封裝結構，其中所述熱介面層包含導熱膏、燒結銀或錫膏。
  9. 一種功率元件封裝結構，包括：一散熱絕緣基板，具有相對的第一面與第二面；多個功率元件，耦接至所述散熱絕緣基板的所述第一面；一散熱背板，設置於所述散熱絕緣基板的所述第二面；以及一熱介面層，分別和所述散熱絕緣基板的所述第二面與所述散熱背板相接觸且位於兩者之間，其中所述熱介面層在所述多個功率元件的投影面積內的最小厚度小於在所述多個功率元件的投影面積外的厚度，其中所述多個功率元件的至少其中之一是以覆晶接合方式耦接至所述第一面，其中所述散熱背板或所述散熱絕緣基板至少其中之一接觸所 述熱介面層的表面具有至少一凸塊，所述至少一凸塊至少設置於所述多個功率元件的投影面積內，所述至少一凸塊佔據所述散熱背板的表面面積比率為10%~25%。
  10. 如申請專利範圍第9項所述的功率元件封裝結構，其中所述至少一凸塊佔據的面積大於或實質上等於所述多個功率元件的所述投影面積。
  11. 如申請專利範圍第9項所述的功率元件封裝結構，其中所述至少一凸塊與所述散熱背板或散熱絕緣基板是一體成型的。
  12. 如申請專利範圍第9項所述的功率元件封裝結構，其中所述熱介面層包含導熱膏、燒結銀或錫膏。
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