TWI653713B - 用於提供互連半導體之中介層的方法與設備 - Google Patents

用於提供互連半導體之中介層的方法與設備 Download PDF

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TWI653713B
TWI653713B TW104103256A TW104103256A TWI653713B TW I653713 B TWI653713 B TW I653713B TW 104103256 A TW104103256 A TW 104103256A TW 104103256 A TW104103256 A TW 104103256A TW I653713 B TWI653713 B TW I653713B
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glass substrate
major surface
interposer
cte2
substrate
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TW104103256A
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TW201535622A (zh
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查帕瑞拉沙帝許錢德拉
寶拉德史考特克里斯多夫
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美商康寧公司
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Abstract

本發明提供用於在半導體封裝中使一或更多個半導體晶片與有機基板互連之中介層的方法與設備，該中介層包括：第一玻璃基板，該第一玻璃基板具有第一主要表面及反面的第二主要表面，且該第一玻璃基板具有第一熱膨脹係數(CTE1)；第二玻璃基板，該第二玻璃基板具有第一主要表面及反面的第二主要表面，且該第二玻璃基板具有第二熱膨脹係數(CTE2)；及位在第一玻璃基板與第二玻璃基板之間的介面，且該介面接合第一玻璃基板的第二主要表面與該第二玻璃基板的第一主要表面，其中CTE1小於CTE2，該第一玻璃基板的第一主要表面用於銜接一或更多個半導體晶片，及該第二玻璃基板的第二主要表面用於銜接該有機基板。

Description

用於提供互連半導體之中介層的方法與設備 【相關申請案的交叉引用】
此申請案依據專利法主張享有2014年1月31號申請之美國專利臨時申請案第61/934366號的優先權，本案仰賴該案內容且該案內容以引用方式全文併入本案。
本發明有關提供用來進行半導體晶片互連之中介層的方法與設備。
半導體封裝技術在這幾年間大幅演變。早期以較複雜方式來封裝半導體電路(從而在既定封裝中達到較高功能性及性能)的方法會增加該封裝內之半導體的平面尺寸。實際情況是，由於在設計上終將受困於電力與訊號線路複雜性、功率耗損問題、性能問題、製造產率問題，等等因素，因此平面尺寸不能無限制地橫向擴大。此外，目前有些實務限制會妨礙在一個共同的半導體晶圓上進行兩種不同的半導體製程，也限制了技術人員可用的電路設計選項。
以上因擴大半導體平面尺寸所帶來的問題引導技術人員開發出數種擴大立體尺寸的方法，也就是往垂直方向上 擴大。較早的垂直擴大半導體晶片的方法包括晶片堆疊法，例如在單個封裝中，將記憶晶片放置在另一個記憶晶片上方。雖然此方法確實能在單一個晶片封裝(指定的固定橫向面積)上得到較高的晶片密度，但晶片堆疊法也具有缺點及實務上的限制，該等限制包括電力及性能問題、製造產率問題及諸如此類者。另一種垂直擴大半導體封裝的習知方法包括所謂的封裝層疊技術(package-on-package techniques)，在封裝層疊技術中，將複數個獨立的球柵陣列封裝(以堆疊配置的方式)裝配在另一個球柵陣列封裝上，且在該等球柵陣列封裝之間具有標準介面以在該等封裝之間循線傳送訊號。儘管每個半導體晶片採用獨立封裝的方式效率低下，但該封裝層疊技術仍能得到較高的晶片密度。
又另一些垂直擴大半導體封裝的方法包括所謂的2.5-D集成法及3-D集成法，於該等集成法中，是在單個封裝內使用矽中介層來連接兩個或更多個半導體晶片。該中介層的主要功能是藉由可讓該兩個或更多個半導體晶片使用高的端子間距(terminal pitch)並避免使用貫穿該等半導體晶片本身的介層孔的方式來提供相互連接。該技術包括使半導體晶片常用的配置方式倒置，並將晶片基板配置成朝上且晶片側朝下。該等晶片具有(以高間距方式配置的)微型凸塊端子，該等微型凸塊端子連接至該矽中介層之頂面上的對應端子。該矽中介層的反側底面則是藉由適當的端子(通常是控制坍塌晶片連接(C4)接點)而連接至該封裝基板。該中介層具有矽穿孔(through silicon via，TSV)，因此可在位於該矽中介層頂面上 之半導體晶片的端子至位於該矽中介層底面處之封裝基板的端子間製造電性連接。尤其是，此種配置方式允許對該等獨立半導體晶片進行2.5-D集成而不需要在主動晶粒上形成矽穿孔(TSV)，這樣可避免配置過於複雜。3-D集成技術可包括使至少一個半導體晶片具有矽穿孔(TSV)以使兩個半導體晶片可垂直且直接地連接在一起，且隨後將該組合物連接至矽中介層以供與其他半導體晶片連接之用。
雖然矽中介層是一種可實現半導體晶片垂直集成、具有前景且有用的技術，但習知的中介層技術並非毫無問題，特別是當整個堆疊中的熱膨脹係數(CTE)，包括矽中介層與有機封裝基板之間的CTE匹配在內，出現不匹配的情形時更可能出現問題。非期望下的CTE不匹配情形可能導致半導體晶片與矽中介層之間無法互連及/或矽中介層與封裝基板之間無法互連。
因此，所述技術領域中需要可提供用來進行半導體晶片互連之中介層的新方法與設備。
發現到使用由玻璃所形成的中介層可為半導體晶片的垂直集成帶來顯著優勢，因此為設計者提供可為中介層之彈性模數與CTE帶來設計自由度的機制。這些設計上的自由度可用來設計中介層以降低CTE的不匹配並提高整個封裝的可靠性及耐久度。
根據文中一或更多個態樣的實施例，提供用於在半導體封裝中使一或更多個半導體晶片與有機基板互連之中介 層的方法與設備。該中介層可包括：第一玻璃基板，該第一玻璃基板具有第一主要表面及反面的第二主要表面，該第一玻璃基板具有第一熱膨脹係數(CTE1)；第二玻璃基板，該第二玻璃基板具有第一主要表面及反面的第二主要表面，該第二玻璃基板具有第二熱膨脹係數(CTE2)；及配置在第一玻璃基板與第二玻璃基板之間的介面，且該介面接合該第一玻璃基板的第二主要表面與該第二玻璃基板的第一主要表面。舉例言之，CTE1可小於CTE2，其中該第一玻璃基板的第一主要表面用於銜接該一或更多個半導體晶片，及該第二玻璃基板的第二主要表面用於銜接該有機基板。
該介面可由以下其中一或更多者所形成：黏性材料(例如，UV固化性環氧樹脂)、氧化物鍵(oxide bond，例如，矽-氧鍵)及中間玻璃材料，且該中間玻璃材料的熔化溫度明顯低於該第一玻璃基板及該第二玻璃基板的熔化溫度。
在一或更多個替代實施例中，該中介層可進一步包括第三玻璃基板，該第三玻璃基板具有第一主要表面及反面的第二主要表面，該第三玻璃基板具有第三熱膨脹係數(CTE3)，其中第二玻璃基板與第三玻璃基板融合，使得該第二玻璃基板的第二主要表面連接至第三玻璃基板的第一主要表面。
若第一玻璃基板的第一主要表面經調適以銜接該一或更多個半導體晶片，及第三玻璃基板的第二主要表面經調適以銜接該有機基板，則各自的CTE可遵循以下關係：CTE1小於CTE2，及CTE3小於CTE2。或者，各自的CTE可遵循 以下關係：CTE1小於CTE2，及CTE2小於CTE3。
所屬技術領域中熟悉該項技藝者可配合附圖由文中說明內容中理解其他的態樣、特徵及優點。
10-1、10-2、10-3‧‧‧半導體晶片
20‧‧‧封裝基板
30-1、30-2、30-3、30-4‧‧‧連接機構
40‧‧‧外殼
50-1、50-2‧‧‧介層孔
100‧‧‧垂直集成結構/封裝
100-1‧‧‧垂直集成結構
102、102-1、102-2、102-3、102-4、102-5‧‧‧中介層
104‧‧‧第一主要表面
106‧‧‧第二主要表面
110-1、110-2、110-3‧‧‧玻璃基板
112-1、112-2、112-3、112-4‧‧‧介面
114-1、116-1‧‧‧第一主要表面
114-2、116-2‧‧‧第二主要表面
附圖中示出一或更多個實施例以供解說之用，然而應瞭解到，文中所揭示及描述的實施例並不侷限於圖中所示的精確配置及手段。
第1圖示出一種垂直集成結構，該結構概要示出2.5-D集成的某些特徵並包含具有新特徵的中介層；第2圖示出一種垂直集成結構，該結構概要示出3-D集成法的某些特徵並包含具有新特徵的中介層；及第3圖至第7圖示出可用來實施文中所述實施例之多層中介層的個別實例。
本文中揭示的各種實施例是關於用於提供一種由玻璃所形成之中介層的方法與設備，該中介層可用於在半導體封裝中使一或更多個半導體晶片與有機基板互連。
參閱第1圖，圖中示出垂直集成結構100，該結構100概要示出2.5-D集成的某些特徵，但也示出至今尚未出現在習知技術領域中的新穎特徵。特別是該結構100包括複數個半導體晶片10-1與半導體晶片10-2，該等半導體晶片10-1與半導體晶片10-2透過中介層102並藉由連接機構30-1、連接機構30-2及連接機構30-3而連接至有機封裝基板20。該結構100可進一步包括外殼40，外殼40為內部元件提供適當 程度的封裝。如所屬技術領域中所熟知的技藝般，透過連接機構30-4使封裝基板10連接至印刷電路板(PCB，圖中未示出)，可使該結構100連接至印刷電路板(PCB)。在該等連接機構30-1、30-2、30-3、30-4之諸多可思及的實施中，該等連接機構30-1、30-2、30-3、30-4可為採用焊料接合技術的球柵陣列，但也可採用其他已知的電性互連技術，例如，通孔技術、其他表面安裝技術、晶片載體技術、針柵陣列，等等。
半導體晶片10-1及半導體晶片10-2可包括如所屬技術領域中熟知的記憶電路、邏輯電路、微處理電路、數位電路、類比電路，等等。在所示實例中，該等半導體晶片10-1與10-2彼此互呈側向比鄰地配置在中介層102的第一主要表面104上。各別的連接機構30-1、30-2提供分別從半導體晶片10-1、半導體晶片10-2至中介層102的互連。雖然圖中未示出某些元件以求圖式清晰簡潔，但中介層102可包括多個層的金屬線路、介層孔50-1、解耦電容及其他元件而有助於各別半導體晶片10-1及10-2的連接機構30-1、30-2與封裝基板20之間的電性互連。中介層102反面處的第二主要表面106透過該連接機構30-3而連接至該封裝基板20。在其他元件中，貫穿中介層102的該等介層孔50-1幫助連接機構30-1、連接機構30-2及連接機構30-3進行電性互連。如後續內容中進一步詳細討論般，中介層102的特定材料與實施方式是很重要的。
封裝基板20亦可包括一或更多個金屬層、介層孔 50-2，等等，藉以完成從中介層102之連接機構30-3至印刷電路板的互連。封裝基板20亦可由有機材料所形成，例如，普遍可取得的環氧樹脂系材料、樹脂系材料及諸如此類者。
第2圖圖示替代的垂直集成結構100-1，該結構100-1包括3-D集成的某些特徵，但也示出中介層102的某些新穎特徵。在此實例中，使各別半導體晶片10-1及半導體晶片10-2的其中一者配置在另一者上，且該兩晶片中的其中一個晶片連接至中介層102的第一主要表面104。選用性的另一半導體晶片10-3可配置在中介層102下方，且該半導體晶片10-3可與位在中介層102之第二主要表面106上的適當端子電性連接。
在一廣泛態樣中，中介層102是由特殊材料所形成，不是習知的矽材料，而是一種至今仍未被充分利用的材料，也就是玻璃。例如，該中介層可包括石英、玻璃、玻璃-陶瓷、氧化物玻璃、離子交換玻璃、其他種類的玻璃及上述之組合物。合適的玻璃或玻璃陶瓷材料可包括適當的玻璃組成，例如，鈉鈣玻璃(SiO2、Na2O、CaO，等等)、金屬合金玻璃、離子熔融玻璃(ionic melt glass)，等等。在某些應用中，中介層102可包括藉由化學強化法(離子交換法)增強習知玻璃所形成的極高強度玻璃，例如購自康寧公司(Corning Incorporated)的康寧大金剛®玻璃(Corning Gorilla®)。此種玻璃可由鹼鋁矽酸鹽(alkali aluminosilicate)玻璃或鹼鋁硼矽酸鹽(alkali aluminoborosilicate)玻璃所製成。
在選擇用來實施中介層102之材料時要考慮到幾個 值得注意的玻璃特性。這些特性包括：(1)低損失正切(例如，在5GHz下，損失正切約為0.0058)；(2)良好的介電常數(例如，在1~10GHz下，介電常數約為5.1)；(3)高表面電阻率(例如，表面電阻率為約1xe17Ohm/sq)；(4)良好的化學抗性；(5)良好的介電崩潰強度；(6)大範圍的可用厚度；(7)良好的均質性及等向性(isotropicity)；(8)工業應用方面上的實證追蹤記錄(proven track record)；(9)能夠加入精度盲孔及精度通孔；(10)高尺寸安定性；(11)高表面清潔度；(12)材料的成本效益高且極易取得；及(13)不會造成導電陽極絲(CAF)故障。
除上述特性之外，發現到，當中介層102是由玻璃形成時，可為半導體晶片10的垂直集成帶來帶來顯著的益處。特別是為設計者提供可至少在中介層102的CTE方面帶來設計自由度的機制，這些設計上的自由度可用來設計元件以降低CTE的不匹配並提高整體封裝100的可靠性及耐久度。由於垂直集成封裝內的CTE不匹配問題不可謂不嚴重，故在文中所揭示的實施例中，此種設計彈性極為有益。的確，半導體晶片10-1、半導體晶片10-2、半導體晶片10-3(例如，矽晶片)的CTE大約為2ppm/℃~3ppm/℃，然而有機封裝基板20的CTE約為15ppm/℃~20ppm/℃。一方面，當中介層102的CTE較接近半導體晶片10-1、10-2、10-3的CTE時，介在中介層102與封裝基板20之間的連接機構30-3則可能面臨承受不當壓力及提早故障的風險。另一方面，當中介層102的CTE較接近有機封裝基板20的CTE時，介在該等半導晶 片10-1、10-2與中介層102之間的連接機構30-1、30-2則可能有故障的風險。
然而，根據文中所述實施例，玻璃中介層102所展現出的特性可解決該堆疊在這兩方面的CTE不匹配問題，從而提高整體結構100的可靠度。參閱第3圖至第7圖，中介層102的該等實施例使用至少兩個玻璃材料層，在該層疊結構中，每一層具有可能不同的CTE及/或厚度，而得到具有提升性能特性的複合式中介層102。特別是，該複合式中介層102可在整個中介層102中提供CTE梯度，CTE梯度可緩衝該等半導體晶片10-1、10-2與有機封裝基板20之間的應變，從而減少CTE不匹配的問題並提高該結構100的可靠度及組裝產率。
參閱第3圖，中介層實施例102-1包括：第一玻璃基板110-1、第二玻璃基板110-2及配置在第一玻璃基板110-1與第二玻璃基板110-2之間的介面112-1。第一玻璃基板110-1具有第一主要表面114-1及反面的第二主要表面114-2，且第二玻璃基板110-2亦具有第一主要表面116-1及反面的第二主要表面116-2。介面112-1配置在第一玻璃基板110-1與第二玻璃基板110-2之間，使得第一玻璃基板110-1的第二主要表面114-2與第二玻璃基板110-2的第一主要表面116-1接合。儘管在此實施例中僅示出兩個層110-1與層110-2，但應明白，透過附加的介面112添加更多的層110而可得到替代實施例。
就第3圖的實施例而言，介面112-1可由順應性的 黏著材料所形成，例如UV固化黏著劑、UV固化環氧樹脂、可固化性黏著劑及諸如此類者。基於製造上的考量，黏性介面112-1的厚度應盡可能地薄，例如約10微米至20微米。一旦該層110-1與該層110-2透過介面112-1而互連，隨後可使用任何已知的方法(例如，雷射或CNC鑽孔法，或雷射損傷與蝕刻法(LDE))來引入貫穿孔。
第3圖之中介層102-1的進一步特徵包括：第一玻璃基板110-1具有第一熱膨脹係數(CTE1)，第二玻璃基板110-2具有第二熱膨脹係數(CTE2)，且CTE1與CTE2不相同。例如，當第一玻璃基板110-1的第一主要表面114-1用來銜接一或更多個半導體晶片10-1、半導體晶片10-2，及第二玻璃基板110-2的第二主要表面116-2用來銜接有機封裝基板102時，則CTE1小於CTE2。例如，一或更多個實施例可遵循以下關係：1CTE1 ppm/℃10，及5CTE2 ppm/℃15。可附加或擇一選用的是，一或更多個實施例可遵循以下關係：3CTE1 ppm/℃5，及8CTE2 ppm/℃10。
參閱第4圖，中介層的替代實施例102-2可採用與第3圖中介層102-1相同的某些元件，例如，第一玻璃基板110-1及第二玻璃基板110-2。然而，第4圖的實施例採用不同的介面112-2，即是氧化物鍵(oxide bond)，例如矽-氧鍵。儘管介面112-2與介面112-1屬於不同類型，然而介面112-2配置在第一玻璃基板110-1與第二玻璃基板110-2之間，使得第一玻璃基板110-1的第二主要表面114-2與第二玻璃基板110-2的第一主要表面116-1接合(在該圖中省略了該等表面 的某些元件符號以求圖式明確清晰)。
分別依據第一玻璃基板110-1及第二玻璃基板110-2的CTE1及CTE2特性，第4圖的中介層102-2亦可包括與中介層102-1類似的特徵。
在製造中介層102-2方面，分別清洗第一玻璃基板110-1及第二玻璃基板110-2，並可使用合適的氧化物促生製程(oxide promoting process)，例如藉著施加溫度(例如，室溫)與壓力(例如，相對高壓)，來接合第一玻璃基板110-1及第二玻璃基板110-2。從而在矽與氧之間生成化學鍵。之後，加熱此結構至較高溫度，例如約400℃或更高以去除任何的羥基鍵。所生成的矽-氧鍵是大多數玻璃結構的骨幹，該等矽-氧鍵免除了對於使用另一黏性成分的需求。一旦該等層110-1與層110-2透過介面112-2而互連，隨後可使用任何已知方法(例如，雷射或CNC鑽孔法，或雷射損傷與蝕刻法(LDE))來引入貫穿孔。
參閱第5圖，中介層的進一步替代實施例102-3可採用與其他中介層102-1及中介層102-2相同的某些元件。例如，中介層102-3可再次採用第一玻璃基板110-1及第二玻璃基板110-2。然而，第5圖的實施例使用又一種不同的介面112-3，即中間玻璃材料，該中間玻璃材料所具有的熔化溫度明顯低於第一玻璃基板110-1及第二玻璃基板110-2的熔化溫度。類似於其他實施例，介面112-3配置在第一玻璃基板110-1與第二玻璃基板110-2之間，使得第一玻璃基板110-1的第二主要表面114-2與第二玻璃基板110-2的第一主要表面116-1 接合(同樣的，該圖中省略了該等表面的某些元件符號以求圖式明確清晰)。
分別依據第一玻璃基板110-1及第二玻璃基板110-2的CTE1及CTE2特性，第5圖的中介層102-3亦可包括與其他中介層102-1及中介層102-2類似的特徵。
在製造中介層102-3方面，分別清洗第一玻璃基板110-1及第二玻璃基板110-2，並將介面112-3的中間玻璃材料配置在第一玻璃基板110-1與第二玻璃基板110-2之間。隨後，加熱該中間玻璃材料達到足夠高的溫度而足以融化至少一部分的中間玻璃材料。舉例言之，可使用雷射融化該中間玻璃材料，從而使第一玻璃基板110-1與第二玻璃基板110-2接合在一起。同樣地，在層110-2與層110-2透過介面112-3而互連之後，隨後可使用任何已知方法(例如，雷射或CNC鑽孔法)來引入貫穿孔。
參閱第6圖及第7圖，如上述般，透過附加的介面112-4添加至少一個另一層110-3而可得到替代實施例。在第6圖及第7圖的實施例中，個別中介層102-4及中介層102-5各自使用三個玻璃層：第一玻璃基板110-1，該第一玻璃基板110-1具有第一主要表面及反面的第二主要表面；第二玻璃基板110-2，該第二玻璃基板110-2具有第一主要表面及反面的第二主要表面；及第三玻璃基板110-3，該第三玻璃基板110-3具有第一主要表面及反面的第二主要表面。第一玻璃基板110-1與第二玻璃基板110-2融合，使得第一玻璃基板110-1的第二主要表面連接至第二玻璃基板110-2的第一主要表 面。可使用本文中所揭示或建議的任一種技術(例如，使用該等介面112之中的一個介面或更多介面)來完成融合。第二玻璃基板110-2與第三玻璃基板110-3亦融合，使得第二玻璃基板110-2的第二主要表面連接至第三玻璃基板110-3的第一主要表面。再一次，可使用本文中所揭示或建議的任一種技術(例如，使用該等介面112之中的一個介面或更多介面)來完成第二玻璃基板110-2與第三玻璃基板110-3之間的融合。
第一玻璃基板110-1具有第一熱膨脹係數(CTE1)，第二玻璃基板110-2具有第二熱膨脹係數(CTE2)，及第三玻璃基板110-3具有第三熱膨脹係數(CTE3)。CTE1、CTE2及CTE3的其中至少兩者是不相同的，或者該等CTE可三者皆不相同。為提供具體實例，假定中介層102-4及中介層102-5各自採用以下結構配置：第一玻璃基板110-1的第一主要表面(圖中顯示為上表面)經調適以用於銜接該一或更多個半導體晶片10-1及半導體晶片10-2，及第三玻璃基板110-3的第二主要表面(圖中顯示為下表面)經調適以用於銜接有機封裝基板20。
就第6圖所示的具體實施例而言，可進行調整而使CTE1小於CTE2，及可使CTE3小於CTE2。換言之，相較於其他CTE而言，位於中間之第二玻璃基板110-2的CTE2可最高。例如，在一或更多個實施例中，該等CTE可遵循以下關係：1CTE1 ppm/℃10；5CTE2 ppm/℃15；及1CTE3 ppm/℃10。或者，在一或更多個實施例中，該等CTE可遵循以下關係：3CTE1 ppm/℃5；8CTE2 ppm/℃ 10；及3CTE3 ppm/℃5。
就第7圖所示的具體實施例而言，可進行調整而使CTE1小於CTE2，及可使CTE2小於CTE3。換言之，可從第一玻璃基板110-1，至第二玻璃基板110-2，至第三玻璃基板110-3逐步升高的方式來改變該等CTE。例如，在一或更多個實施例中，該等CTE可遵循以下關係：1CTE1 ppm/℃10；3CTE2 ppm/℃12；及5CTE3 ppm/℃15。或者，在一或更多個實施例中，該等CTE可遵循以下關係：3CTE1 ppm/℃5；5CTE2 ppm/℃8；及8CTE3 ppm/℃10。
如第3圖至第7圖之圖式所示(但非必要)，第一玻璃基板、第二玻璃基板及第三玻璃基板110各自的厚度可能相同或可能具有不同程度的差異。在多數情況下，該等玻璃基板110的厚度將落在某些範圍內。例如，可思及的厚度範圍包括介於約50微米至700微米間。然而，需指出的是，可調整文中所示雙層或三層式結構中之該等層110各自的厚度以符合總厚度要求，且同時使中介層的翹曲減至最小。若設計目標旨在減少該多層式結構的翹曲情形，則可對厚度及CTE兩者皆做調整以達到最小翹曲。主要目標是使該等半導體晶片與第一玻璃層之間達成CTE高度匹配，及使有機基板與第二玻璃層之間達成CTE高度匹配。
儘管已參照具體實施例來描述本發明內容，但應瞭解此等實施例僅供用來說明本文中所述實施例的原理及應用。故明白，在不偏離本案發明的精神與範圍下，當可對該等示例性實施例做出諸多修改及可做出其他配置方式。

Claims (9)

  1. 一種用於在一半導體封裝中使一或更多個半導體晶片與一有機基板互連的中介層，該中介層包括：一第一玻璃基板，該第一玻璃基板具有一第一主要表面及反面的一第二主要表面，該第一玻璃基板具有一第一熱膨脹係數(CTE1)；一第二玻璃基板，該第二玻璃基板具有一第一主要表面及反面的一第二主要表面，該第二玻璃基板具有一第二熱膨脹係數(CTE2)；及一介面，該介面配置在該第一玻璃基板與該第二玻璃基板之間，且該介面接合該第一玻璃基板的該第二主要表面與該第二玻璃基板的該第一主要表面，其中該介面是由一玻璃材料所形成，該玻璃材料的熔化溫度明顯低於該第一玻璃基板及該第二玻璃基板的熔化溫度；且其中CTE1小於CTE2，該第一玻璃基板的該第一主要表面用於銜接該一或更多個半導體晶片，及該第二玻璃基板的該第二主要表面用於銜接該有機基板。
  2. 如請求項1所述之中介層，其中1CTE1 ppm/℃10，及5CTE2 ppm/℃15。
  3. 如以上請求項中之任一項所述之中介層，進一步包括：一第三玻璃基板，該第三玻璃基板具有一第一主要表面 及反面的一第二主要表面，該第三玻璃基板具有一第三熱膨脹係數(CTE3)，其中：該第一玻璃基板與該第二玻璃基板融合，使得該第一玻璃基板的該第二主要表面連接至該第二玻璃基板的該第一主要表面，該第二玻璃基板與該第三玻璃基板融合，使得該第二玻璃基板的該第二主要表面連接至該第三玻璃基板的該第一主要表面，及該第一玻璃基板的該第一主要表面經調適以用於銜接該一或更多個半導體晶片，及該第三玻璃基板的該第二主要表面經調適以用於銜接該有機基板。
  4. 如請求項3所述之中介層，其中：CTE1小於CTE2，及CTE3小於CTE2；及1CTE1 ppm/℃10；5CTE2 ppm/℃15；及1CTE3 ppm/℃10。
  5. 如請求項3所述之中介層，其中：CTE1小於CTE2，及CTE2小於CTE3；及1CTE1 ppm/℃10；3CTE2 ppm/℃12；及5CTE3 ppm/℃15。
  6. 一種製造一半導體封裝的方法，該方法包括以下步驟： 提供至少一個半導體晶片；提供一有機基板；及在該半導體晶片與該有機基板之間配置一中介層，其中：該中介層包括：(i)一第一玻璃基板，該第一玻璃基板具有一第一主要表面及反面的一第二主要表面，該第一玻璃基板具有一第一熱膨脹係數(CTE1)；(ii)一第二玻璃基板，該第二玻璃基板具有一第一主要表面及反面的一第二主要表面，該第二玻璃基板具有一第二熱膨脹係數(CTE2)；及(iii)一介面，該介面配置在該第一玻璃基板與該第二玻璃基板之間，且該介面接合該第一玻璃基板的該第二主要表面與該第二玻璃基板的該第一主要表面，其中該介面是由一玻璃材料所形成，該玻璃材料的熔化溫度明顯低於該第一玻璃基板及該第二玻璃基板的熔化溫度，其中CTE1小於CTE2，該第一玻璃基板的該第一主要表面直接或間接地銜接該至少一個半導體晶片，及該第二玻璃基板的該第二主要表面直接或間接地銜接該有機基板。
  7. 如請求項6所述之方法，其中包括以下至少一者：1CTE1 ppm/℃10及5CTE2 ppm/℃15。
  8. 如請求項6所述之方法，其中：該中介層進一步包括一第三玻璃基板，該第三玻璃基板 具有一第一主要表面及反面的一第二主要表面，該第三玻璃基板具有一第三熱膨脹係數(CTE3)，該第一玻璃基板與該第二玻璃基板融合，使得該第一玻璃基板的該第二主要表面連接至該第二玻璃基板的該第一主要表面，該第二玻璃基板與該第三玻璃基板融合，使得該第二玻璃基板的該第二主要表面連接至該第三玻璃基板的該第一主要表面，及該第一玻璃基板的該第一主要表面直接或間接地銜接該至少一半導體晶片，該第三玻璃基板的該第二主要表面直接或間接地銜接該有機基板。
  9. 如請求項8所述之方法，其中：CTE1小於CTE2，及CTE3小於CTE2；及1CTE1 ppm/℃10；5CTE2 ppm/℃15；及1CTE3 ppm/℃10。
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