CN106165088A - 提供用于使半导体芯片相互连接的中介基板的方法和设备 - Google Patents

提供用于使半导体芯片相互连接的中介基板的方法和设备 Download PDF

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CN106165088A
CN106165088A CN201580017695.7A CN201580017695A CN106165088A CN 106165088 A CN106165088 A CN 106165088A CN 201580017695 A CN201580017695 A CN 201580017695A CN 106165088 A CN106165088 A CN 106165088A
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glass baseplate
type surface
glass
substrate
cte2
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CN106165088B (zh
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S·C·查帕拉拉
S·C·波拉德
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Corning Inc
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Corning Inc
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Abstract

提供用于中介基板的方法和设备，所述中介基板用于在半导体封装中使一个或多个半导体芯片与有机基材相互连接,所述中介基板包含:具有相反的第一主表面和第二主表面的第一玻璃基材,第一玻璃基材具有第一热膨胀系数(CTE1)；具有相反的第一主表面和第二主表面的第二玻璃基材,第二玻璃基材具有第二热膨胀系数(CTE2)；和界面，所述界面设置在第一玻璃基材和第二玻璃基材之间，并将第一玻璃基材的第二主表面接合到第二玻璃基材的第一主表面,其中CTE1小于CTE2,第一玻璃基材的第一主表面操作来联接所述一个或多个半导体芯片,第二玻璃基材的第二主表面操作来联接有机基材。

Description

提供用于使半导体芯片相互连接的中介基板的方法和设备
相关申请的交叉参考
本申请根据35U.S.C.§119要求2014年01月31日提交的美国临时申请系列第61/934366号的优先权，本文以该申请的内容为基础并通过参考将其完整地结合于此。
背景
本发明涉及提供用于使半导体芯片相互连接的中介基板的方法和设备
在过去几年，半导体封装技术发展迅速。早先，封装更高复杂性半导体电路(和因此在给定封装中获得更高功能和性能)的方法是增加在封装之内的半导体芯片的两维尺寸。实际情况是，不能横向地在两维上没有边界地延伸，因为最终设计将面临功率和信号发送(routing)复杂性、功率耗散问题、性能问题、制造产率问题等。此外，目前存在实际限制阻止在同一半导体晶片上制造两种不同半导体制造工艺，这也限制了本领域普通技术人员可用的电路设计选项。
与两维地扩展半导体芯片相关的上述问题使得本领域普通技术人员探索三维地扩展的方法；即通过垂直地扩展。半导体芯片的垂直扩展的早期方法包括芯片堆叠，例如在单一封装中在存储芯片上设置另一存储芯片。虽然这当然在单一芯片封装(给定固定横向区域)中得到更高的芯片密度，但芯片堆叠存在不足和实际限制，包括功率和性能问题、制造产率问题等。半导体封装中垂直扩展的另一常规方法包括所谓的封装叠封装技术，其中将多个独立的球型网架阵列封装相互叠加(以堆叠的设置)来组装，且在它们之间存在标准界面来发送信号。封装叠封装技术也得到更高的芯片密度，但存在使用用于每一半导体芯片的独立封装的低效。
半导体封装中的垂直扩展的又一种方法包括所谓的2.5-D和3-D集成，其中使用硅中介基板来在单一封装之内使两个或更多个半导体芯片相互连接。中介基板的主要作用是以下述方式提供相互连接：两个或更多个半导体芯片可使用高端子节距并无需穿过半导体芯片自身的通孔。该技术涉及使半导体芯片从其常规构造向上弹起，使芯片基材向上取向，且芯片侧向下。为芯片提供微凸起端子(高节距)，其连接到在硅中介基板顶部侧面上相应的端子。通过合适的端子(通常是受控塌陷芯片连接(C4)接合件)使硅中介基板的相反的底部侧面连接到封装基材。为中介基板提供穿过硅的通孔(TSV)，从而可从在硅中介基板顶部侧面上的半导体芯片的端子到在硅中介基板底部侧面的封装基材端子形成电连接。应指出，这种构造实现独立半导体芯片的2.5-D集成，无需在半导体芯片的活性模头上的TSV，这避免了大量的复杂性。3-D集成可涉及具有TSV的至少一种半导体芯片，从而将两半导体芯片垂直地和直接地连接在一起，然后将该组合连接到硅中介基板，用于与其它半导体芯片连接。
虽然硅中介基板是实现半导体芯片垂直集成的有希望和有用技术，但常规的中介基板技术存在问题，特别是就整个堆叠件的热膨胀系数(CTE)的不匹配而言，其包含硅中介基板和有机封装基材之间的CTE匹配。不利的CTE不匹配可导致半导体芯片和硅中介基板之间的相互连接失效和/或硅中介基板和封装基材之间的相互连接失效。
因此，本领域需要提供用于使半导体芯片相互连接的中介基板的新方法和设备。
概述
已发现半导体芯片垂直集成的显著优势可通过使用由玻璃形成的中介基板来获得，由此为设计者提供用于取得中介基板的弹性模量和CTE设计自由度的原理。这种设计自由度可用来以下述方式改造中介基板：减少CTE不匹配并增加整体封装的可靠性和耐久性。
根据本文所述的实施方式的一个或多个方面,方法和设备提供用于在半导体封装中使一个或多个半导体芯片与有机基材相互连接的中介基板。所述中介基板可包含具有相反的第一主表面和第二主表面的第一玻璃基材,第一玻璃基材具有第一热膨胀系数(CTE1)；具有相反的第一主表面和第二主表面的第二玻璃基材,第二玻璃基材具有第二热膨胀系数(CTE2)；和界面，所述界面设置在第一玻璃基材和第二玻璃基材之间，且接合第一玻璃基材的第二主表面与第二玻璃基材的第一主表面。例如,CTE1可小于CTE2,其中第一玻璃基材的第一主表面操作来联接所述一个或多个半导体芯片,第二玻璃基材的第二主表面操作来联接有机基材。
所述界面可由下述中的一种或多种形成：胶粘剂材料(例如可UV固化的环氧化物)、氧化物粘合剂(bond)(例如硅-氧化物粘合剂),和中间玻璃材料，其具有显著低于第一玻璃基材和第二玻璃基材熔融温度的熔融温度。
在一种或多种替代实施方式中,中介基板还可包含具有相反的第一主表面和第二主表面的第三玻璃基材,第三玻璃基材具有第三热膨胀系数(CTE3),其中第二玻璃基材和第三玻璃基材被熔合，从而第二玻璃基材的第二主表面连接到第三玻璃基材的第一主表面。
假设第一玻璃基材的第一主表面适于联接一个或多个半导体芯片,第三玻璃基材的第二主表面适于联接有机基材,那么各CTE可遵循下述关系：CTE1小于CTE2,且CTE3小于CTE2。或者,各CTE可遵循下述关系：CTE1小于CTE2,且CTE2小于CTE3。
本领域技术人员在结合附图阅读本文所述之后，将清楚地了解本发明的其他方面、特征、优点等。
附图说明
为说明之目的，在附图中示出一种或多种实施方式，但应理解，本发明所批露和所述的实施方式不限于所示的精确配置和手段。
图1显示垂直集成结构,其示意性地显示2.5-D集成的某些特征,且包含具有新颖特征的中介基板；
图2显示垂直集成结构,其示意性地显示3-D集成的某些特征,且包含具有新颖特征的中介基板；和
图3-7分别显示可用于实施本文所述的实施方式的多层中介基板的示例。
具体描述
本文所述的各种实施方式涉及提供中介基板的方法和设备，所述中介基板由玻璃形成，并用于在半导体封装中使一个或多个半导体芯片与有机基材相互连接。
参考图1,显示了垂直集成结构100，其示意性地显示2.5-D集成的某些特征，但具有目前为止现有技术中不曾发现的新颖特征。具体来说,结构100包含多个半导体芯片10-1,10-2,借助连接机械装置30-1,30-2,30-3，其穿过中介基板102偶合到有机封装基材20。结构100还可包含外壳40，其提供合适水平的在其里面的元件的包封。如本技术领域所公知，通过借助连接机械装置30-4，将封装基材10连接到PCB，结构100可连接到印刷电路板(PCB，未显示)。在设想的连接机械装置30-1,30-2,30-3,30-4的实施方式中是使用焊接接合技术的球型网架阵列，但可使用其它已知的电相互连接技术，例如通孔技术、其它表面安装技术、芯片载体技术、销钉网架阵列等。
半导体芯片10-1,10-2可包含本技术领域所公知的储存电路、逻辑电路、微处理电路、数字电路、模拟电路等。在所示实施例中，在中介基板102的第一主表面104上，半导体芯片10-1,10-2相对于彼此横向地设置。各连接机械装置30-1,30-2提供从各半导体芯片10-1,10-2到中介基板102的相互连接。虽然为了简单和清楚，有些元件没有显示，但中介基板102可包含多层金属迹线,通孔50-1,去耦电容器,和其它元件，从而促进各半导体芯片10-1,10-2的连接机械装置30-1,30-2和封装基材20之间的电相互连接。通过连接机械装置30-3，将中介基板102的相反的第二主表面106偶合到封装基材20。在其它元件中，穿过中介基板102的通孔50-1促进来自连接机械装置30-1,30-2和连接机械装置30-3的电相互连接。如下文所更加详细描述，中介基板102的具体材料和实施方式非常重要。
封装基材20还可包含一个或多个金属层,通孔50-2等以完成从中介基板102的连接机械装置30-3到印刷电路板的相互连接。封装基材20可由有机材料形成，例如常用的基于环氧化物的材料、树脂基材料等。
图2显示替代垂直集成结构100-1,其包含3-D集成的某些特征,但是同时具有中介基板102的某些新颖特征。在该实施例中,各半导体芯片10-1,10-2相互叠加设置，且两芯片中的一种连接到中介基板102的第一主表面104。任选的其它半导体芯片10-3可设置在中介基板102下方，并可电连接到中介基板102的第二主表面106上的合适的端子。
在广义方面,中介基板102由特殊材料-不是常规的硅材料-而是到目前为止未充分使用的材料、即玻璃形成。例如,中介基板可包含石英,玻璃,玻璃-陶瓷,氧化物玻璃,离子交换的玻璃,其它类型的玻璃,及其组合。合适的玻璃或玻璃陶瓷材料可包含合适的玻璃组合物,例如钠钙玻璃(SiO2,Na2O,CaO等),金属合金玻璃，离子熔体玻璃等。在一些应用中，中介基板102可包含强度非常高的玻璃,其由通过化学强化(离子交换)增强的常规玻璃形成，例如可购自康宁有限公司(Corning Incorporated)的康宁玻璃。这种玻璃可由碱金属铝硅酸盐玻璃或碱金属硼铝硅酸盐玻璃形成。
在选择实施中介基板102的材料时，已考虑了玻璃的显著特点。这些特性包括：(1)低损耗正切(例如，约0.0058@5GHz),(2)良好的介电常数(例如，是约5.1@1-10GHz),(3)高表面电阻率(例如是约1xe17Ohm/□),(4)良好的化学耐久性,(5)良好的介电击穿强度,(6)较大范围的可用厚度,(7)良好的均匀性和各向同性,(8)工业应用中证明的追踪记录,(9)能包含精确的盲孔和精确的通孔,(10)高尺寸稳定性,(11)高表面清洁度,(12)成本很低的且来源广泛，(13)不产生导电阳极丝(CAF)失效。
除了上述特征以外，已发现当中介基板102由玻璃形成时，可取得半导体芯片10的垂直集成的显著优势。具体来说，至少就中介基板102的CTE而言，为设计者提供实现设计自由度的原理，其可用于以下述方式改造元件：减少CTE不匹配，并增加总体封装100的可靠性和耐久性。在本文所述的实施方式的语境中，这种灵活性是非常有优势的，因为在垂直集成封装中，CTE不匹配的问题非常严重。实际上，半导体芯片(例如,硅芯片)10-1,10-2,10-3的CTE在2-3ppm/℃的量级,而有机封装基材20的CTE在约15-20ppm/℃的量级。一方面，当中介基板102的CTE更接近半导体芯片10-1,10-2,10-3的CTE时,那么在中介基板102和封装基材20之间的连接机械装置30-3可有受到过度应力和过早失效的风险。另一方面，当中介基板102的CTE更接近有机封装基材20的CTE时,那么在半导体芯片10-1,10-2和中介基板102之间的连接机械装置30-1,30-2的集成性可能有失效的风险。
然而,根据本文所述的实施方式,玻璃中介基板102呈现一定的特征，其解决了在堆叠件的两个水平上的CTE匹配问题，由此增加总体结构100的可靠性。参考图3-7,中介基板102的实施方式使用在层压结构中的至少两层玻璃材料,每一层具有潜在的不同CTE和/或不同厚度，这得到具有改善的性能特征的复合中介基板102。具体来说，复合中介基板102可在中介基板102中提供CTE梯度,这导致在半导体芯片10-1,10-2和有机封装基材20之间形成缓冲应变,这减少了CTE不匹配问题，并增加结构100的可靠性和组装产率。
参考图3,中介基板102-1的实施方式包含:第一玻璃基材110-1,第二玻璃基材110-2,和界面112-1，所述界面112-1设置在第一玻璃基材和第二玻璃基材110-1,110-2之间。第一玻璃基材110-1具有相反的第一主表面和第二主表面114-1,114-2,第二玻璃基材110-2也具有相反的第一主表面和第二主表面116-1,116-2。界面112-1以下述方式设置在第一玻璃基材和第二玻璃基材110-1,110-2之间：第一玻璃基材110-1的第二主表面114-2接合到第二玻璃基材110-2的第一主表面116-1。虽然在该实施方式中只显示了两个层110-1,110-2，但应理解通过另外的界面112添加其它层110，可获得替代实施方式。
在图3所示的实施方式的情况下,界面112-1可由柔顺的胶粘剂材料形成,例如可UV固化的胶粘剂,可UV固化的环氧化物,基于可固化的胶粘剂等。相对于制造考虑，胶粘剂界面112-1的厚度应尽可能薄，例如在10–20微米的量级。一旦层110-1,110-2通过界面112-1相互连接,那么可使用任何已知方法来引入通孔，例如激光或CNC钻孔，激光损坏和蚀刻(LDE)。
图3所示中介基板102-1的其它特征包括：第一玻璃基材110-1具有第一热膨胀系数(CTE1),第二玻璃基材110-2具有第二热膨胀系数(CTE2),且CTE1不同于CTE2。例如,当第一玻璃基材110-1的第一主表面114-1操作来联接一个或多个半导体芯片10-1,10-2,且第二玻璃基材110-2的第二主表面116-2操作来联接有机封装基材102时,那么CTE1小于CTE2。例如,一种或多种实施方式可遵循下述关系:1≤CTE1ppm/℃≤10和5≤CTE2ppm/℃≤15。作为附加的或替代的，一种或多种实施方式可遵循下述关系:3≤CTE1ppm/℃≤5和8≤CTE2ppm/℃≤10。
参考图4,中介基板102-2的替代实施方式可使用一些与图3所示中介基板102-1相同的元件,例如第一玻璃基材110-1,和第二玻璃基材110-2。然而,图4的实施方式使用不同的界面112-2,即氧化物粘合剂,例如硅-氧化物粘合剂。虽然界面112-2种类不同于界面112-1,但界面112-2以下述方式设置在第一玻璃基材和第二玻璃基材110-1,110-2之间：第一玻璃基材110-1的第二主表面114-2接合到第二玻璃基材110-2的第一主表面116-1(其中为了清楚，省略了表面的某些附图标记)。
就第一玻璃基材110-1和第二玻璃基材110-2各自的CTE1和CTE2而言，图4的中介基板102-2还可包括与中介基板102-1相似的特征。
就制造中介基板102-2而言,各第一玻璃基材和第二玻璃基材110-1,110-2是清洁的，并可使用合适的氧化物促进工艺来接合，例如施加温度(例如室温)和施加压力(例如，较高压力)。由此在硅和氧之间引发化学键。然后，将该结构加热到更高的温度(例如高于或等于约400℃)，以除去任何羟基键。所得硅-氧键是大多数玻璃结构的骨架，这无需独立的粘合剂组分。一旦层110-1,110-2通过界面112-2相互连接,那么可使用任何已知方法来引入通孔，例如钻孔，激光损坏和蚀刻(LDE)。
参考图5,中介基板102-3的其它替代实施方式可使用其它中介基板102-1和102-2的一些相同元件。例如,中介基板102-3可同样地使用第一玻璃基材110-1,和第二玻璃基材110-2。然而,图5的实施方式使用不同的界面112-3,即中间玻璃材料,例如具有熔融温度的玻璃材料，所述玻璃材料的熔融温度显著低于第一玻璃基材和第二玻璃基材110-1,110-2的熔融温度。与其它实施方式类似，界面112-3以下述方式设置在第一玻璃基材和第二玻璃基材110-1,110-2之间：第一玻璃基材110-1的第二主表面114-2接合到第二玻璃基材110-2的第一主表面116-1(同样地，为了清楚，省略了表面的某些附图标记)。
就第一玻璃基材110-1和第二玻璃基材110-2各自的CTE1和CTE2而言，图5的中介基板102-3还可包括与其它中介基板102-1,102-2相似的特征。
就制造中介基板102-3而言,各第一玻璃基材和第二玻璃基材110-1,110-2是清洁的，且将界面112-3的中间玻璃材料设置在它们之间。接下来，将中间玻璃材料加热到足以熔融其至少一部分的程度。例如,激光可用来熔融中间玻璃材料,由此将第一玻璃基材和第二玻璃基材110-1,110-2接合在一起。又同样地，在层110-1,110-2通过界面112-3相互连接之后,那么可使用任何已知方法来引入通孔，例如激光或CNC钻孔。
参考图6和7,以及如上所述，可通过由额外的界面112-4增加至少一个其它层110-3，来获得替代实施方式。在图6和7所示的实施方式中,各中介基板102-4和102-5分别使用3个玻璃层:具有相反的第一主表面和第二主表面的第一玻璃基材110-1,具有相反的第一主表面和第二主表面的第二玻璃基材110-2,和具有相反的第一主表面和第二主表面的第三玻璃基材。第一玻璃基材和第二玻璃基材110-1,110-2被熔合，从而第一玻璃基材110-1的第二主表面连接到第二玻璃基材110-2的第一主表面。熔合可使用本文所述的或所暗示的任何技术来实现，例如界面112中的一种或多种。第二玻璃基材和第三玻璃基材110-2,110-3也被熔合，从而第二玻璃基材102-2的第二主表面连接到第三玻璃基材102-3的第一主表面。同样地，第二玻璃基材和第三玻璃基材110-2,110-3之间的熔合可使用本文所述的或所暗示的任何技术来实现，例如界面112中的一种或多种。
第一玻璃基材110-1具有第一热膨胀系数(CTE1),第二玻璃基材110-2具有第二热膨胀系数(CTE2),且第三玻璃基材110-3具有第三热膨胀系数(CTE3)。CTE1,CTE2,和CTE3中的至少两种是不同的，或者全部的CTE都可不同。为了提供具体的实施例，假定中介基板102-4和102-5中的每一个都以下述构造来使用:第一玻璃基材110-1的第一主表面(所示的上部表面)适于联接一个或多个半导体芯片10-1,10-2,且第三玻璃基材110-3的第二主表面(所示的下部表面)适于联接有机封装基材20。
关于图6所示的具体实施方式,在一种适应实施方式中，CTE1可为小于CTE2,且CTE3可为小于CTE2。换句话说，与其它CTE相比，中间的第二玻璃基材110-2的CTE2可为最高的。例如,在一种或多种实施方式中，CTE可遵循下述关系:1≤CTE1ppm/℃≤10；5≤CTE2ppm/℃≤15；且1≤CTE3ppm/℃≤10。或者,在一种或多种实施方式中，CTE可遵循下述关系:3≤CTE1ppm/℃≤5；8≤CTE2ppm/℃≤10；且3≤CTE3ppm/℃≤5。
关于图7所示的具体实施方式,在一种适应实施方式中，CTE1可为小于CTE2,且CTE2可为小于CTE3。换句话说，从第一玻璃基材110-1,到第二玻璃基材110-2,到第三玻璃基材110-3，CTE可存在逐步增加的变化。例如,在一种或多种实施方式中，CTE可遵循下述关系:1≤CTE1ppm/℃≤10；3≤CTE2ppm/℃≤12；且5≤CTE3ppm/℃≤15。或者,在一种或多种实施方式中，CTE可遵循下述关系:3≤CTE1ppm/℃≤5；5≤CTE2ppm/℃≤8；且8≤CTE3ppm/℃≤10。
如图3-7的示意图所暗示(但无需如此),第一、第二和第三玻璃基材110各自的厚度可相同或可不同到某一程度或另一程度。在大多数情况下，玻璃基材110的厚度将落在一些范围之内。例如，设想的厚度范围包括约50微米-700微米。但是，应指出可调节本文所述的两层或三层结构中的每一层110的厚度，从而满足总厚度要求，同时使中介基板的翘曲最小化。如果设计目标主要是减少多层结构的翘曲，那么可同时调节厚度和CTE来获得极少的翘曲。一个显著的目标是获得半导体芯片和玻璃的第一层之间的接近的CTE匹配以及有机基材和玻璃的第二层之间的接近的CTE匹配。
尽管本文已结合具体实施方式对本发明进行了描述，但是应当理解，这些实施方式仅是用于说明本发明的实施方式的原理和应用。因此，应当理解，在不背离本发明的精神和范围的前提下，可以对列举的实施方式进行各种修改，并且可以设计其他实现形式。

Claims (20)

1.用于在半导体封装中使一个或多个半导体芯片与有机基材相互连接的中介基板,所述中介基板包含：
具有相反的第一主表面和第二主表面的第一玻璃基材,第一玻璃基材具有第一热膨胀系数(CTE1)；
具有相反的第一主表面和第二主表面的第二玻璃基材,第二玻璃基材具有第二热膨胀系数(CTE2)；和
界面，所述界面设置在第一玻璃基材和第二玻璃基材之间，并将第一玻璃基材的第二主表面接合到第二玻璃基材的第一主表面,
其中CTE1小于CTE2,第一玻璃基材的第一主表面操作来联接所述一个或多个半导体芯片,第二玻璃基材的第二主表面操作来联接所述有机基材。
2.如权利要求1所述的中介基板，其特征在于，1≤CTE1ppm/℃≤10且5≤CTE2ppm/℃≤15。
3.如权利要求1所述的中介基板，其特征在于，3≤CTE1ppm/℃≤5且8≤CTE2ppm/℃≤10。
4.如权利要求1-3中任一项所述的中介基板，其特征在于，所述界面由胶粘剂材料形成。
5.如权利要求1-3中任一项所述的中介基板，其特征在于，所述界面由硅-氧化物粘合剂形成。
6.如权利要求1-5中任一项所述的中介基板，其特征在于，所述界面由玻璃材料形成，所述玻璃材料具有显著低于第一玻璃基材和第二玻璃基材熔融温度的熔融温度。
7.用于在半导体封装中使一个或多个半导体芯片与有机基材相互连接的中介基板,所述中介基板包含：
具有相反的第一主表面和第二主表面的第一玻璃基材,第一玻璃基材具有第一热膨胀系数(CTE1)；
具有相反的第一主表面和第二主表面的第二玻璃基材,第二玻璃基材具有第二热膨胀系数(CTE2)；
具有相反的第一主表面和第二主表面的第三玻璃基材,第三玻璃基材具有第三热膨胀系数(CTE3)，其中：
第一玻璃基材和第二玻璃基材被熔合起来，从而第一玻璃基材的第二主表面连接到第二玻璃基材的第一主表面,
第二玻璃基材和第三玻璃基材被熔合起来，从而第二玻璃基材的第二主表面连接到第三玻璃基材的第一主表面,和
第一玻璃基材的第一主表面适于联接一个或多个半导体芯片,且第三玻璃基材的第二主表面适于联接有机基材。
8.如权利要求7所述的中介基板，其特征在于，CTE1小于CTE2,且CTE3小于CTE2。
9.如权利要求8所述的中介基板，其特征在于，1≤CTE1ppm/℃≤10；5≤CTE2ppm/℃≤15；且1≤CTE3ppm/℃≤10。
10.如权利要求8所述的中介基板，其特征在于，3≤CTE1ppm/℃≤5；8≤CTE2ppm/℃≤10；且3≤CTE3ppm/℃≤5。
11.如权利要求7所述的中介基板，其特征在于，CTE1小于CTE2,且CTE2小于CTE3。
12.如权利要求11所述的中介基板，其特征在于，1≤CTE1ppm/℃≤10；3≤CTE2ppm/℃≤12；且5≤CTE3ppm/℃≤15。
13.如权利要求11所述的中介基板，其特征在于，3≤CTE1ppm/℃≤5；5≤CTE2ppm/℃≤8；且8≤CTE3ppm/℃≤10。
14.一种制备半导体封装的方法，所述方法包括：
提供至少一个半导体芯片；
提供有机基材；和
在所述半导体芯片和所述有机基材之间设置中介基板,其中:
所述中介基板包含:(i)具有相反的第一主表面和第二主表面的第一玻璃基材,第一玻璃基材具有第一热膨胀系数(CTE1)；(ii)具有相反的第一主表面和第二主表面的第二玻璃基材,第二玻璃基材具有第二热膨胀系数(CTE2)；和(iii)第一玻璃基材和第二玻璃基材的相互连接，从而第一玻璃基材的第二主表面直接地或间接地偶合到第二玻璃基材的第一主表面；
CTE1小于CTE2,
第一玻璃基材的第一主表面直接地或间接地联接至少一个半导体芯片,和
第二玻璃基材的第二主表面直接地或间接地联接所述有机基材。
15.如权利要求14所述的方法，其特征在于，存在下述的至少一种：
1≤CTE1ppm/℃≤10和5≤CTE2ppm/℃≤15；以及
3≤CTE1ppm/℃≤5和8≤CTE2ppm/℃≤10。
16.如权利要求14或15所述的方法，其特征在于
所述中介基板还包含具有相反的第一主表面和第二主表面的第三玻璃基材,第三玻璃基材具有第三热膨胀系数(CTE3)，
第一玻璃基材和第二玻璃基材被熔合起来，从而第一玻璃基材的第二主表面连接到第二玻璃基材的第一主表面,
第二玻璃基材和第三玻璃基材被熔合起来，从而第二玻璃基材的第二主表面连接到第三玻璃基材的第一主表面,和
第一玻璃基材的第一主表面直接地或间接地联接至少一个半导体芯片,
第三玻璃基材的第二主表面直接地或间接地联接所述有机基材。
17.如权利要求16所述的方法，其特征在于，CTE1小于CTE2,且CTE3小于CTE2。
18.如权利要求17所述的方法，其特征在于，存在下述的至少一种：
1≤CTE1ppm/℃≤10；5≤CTE2ppm/℃≤15；且1≤CTE3ppm/℃≤10；以及
3≤CTE1ppm/℃≤5；8≤CTE2ppm/℃≤10；且3≤CTE3ppm/℃≤5。
19.如权利要求16所述的方法，其特征在于，CTE1小于CTE2,且CTE2小于CTE3。
20.如权利要求19所述的方法，其特征在于，存在下述的至少一种：
1≤CTE1ppm/℃≤10；3≤CTE2ppm/℃≤12；且5≤CTE3ppm/℃≤15；以及
3≤CTE1ppm/℃≤5；5≤CTE2ppm/℃≤8；且8≤CTE3ppm/℃≤10。
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WO2015116749A1 (en) 2015-08-06
EP3100300A1 (en) 2016-12-07
JP6505726B2 (ja) 2019-04-24
TW201535622A (zh) 2015-09-16
US9917045B2 (en) 2018-03-13
US20170025341A1 (en) 2017-01-26
US20150221571A1 (en) 2015-08-06
CN106165088B (zh) 2019-03-01
JP2017505998A (ja) 2017-02-23
TWI653713B (zh) 2019-03-11
KR20160114710A (ko) 2016-10-05

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