TWI624887B - 半導體製造裝置及半導體裝置的製造方法 - Google Patents

半導體製造裝置及半導體裝置的製造方法 Download PDF

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Publication number
TWI624887B
TWI624887B TW105135961A TW105135961A TWI624887B TW I624887 B TWI624887 B TW I624887B TW 105135961 A TW105135961 A TW 105135961A TW 105135961 A TW105135961 A TW 105135961A TW I624887 B TWI624887 B TW I624887B
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TW
Taiwan
Prior art keywords
die
crystal grains
wafer
illumination
section
Prior art date
Application number
TW105135961A
Other languages
English (en)
Chinese (zh)
Other versions
TW201735209A (zh
Inventor
小橋英晴
Hideharu Kobashi
依田光央
Mitsuo Yoda
大森僚
Ryo Omori
Original Assignee
捷進科技有限公司
Fasford Technology Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 捷進科技有限公司, Fasford Technology Co., Ltd. filed Critical 捷進科技有限公司
Publication of TW201735209A publication Critical patent/TW201735209A/zh
Application granted granted Critical
Publication of TWI624887B publication Critical patent/TWI624887B/zh

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/20—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by the properties tested or measured, e.g. structural or electrical properties
    • H10P74/203—Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B27/00—Optical systems or apparatus not provided for by any of the groups G02B1/00 - G02B26/00, G02B30/00
    • G02B27/10—Beam splitting or combining systems
    • G02B27/14—Beam splitting or combining systems operating by reflection only
    • G02B27/141—Beam splitting or combining systems operating by reflection only using dichroic mirrors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P54/00—Cutting or separating of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/30—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for conveying, e.g. between different workstations
    • H10P72/32—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for conveying, e.g. between different workstations between different workstations
    • H10P72/3206—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for conveying, e.g. between different workstations between different workstations the substrate being handled substantially vertically
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7402—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/76—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches
    • H10P72/7604—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches the wafers being placed on a susceptor, stage or support
    • H10P72/7606—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches the wafers being placed on a susceptor, stage or support characterised by edge clamping, e.g. clamping ring
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/27—Structural arrangements therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Die Bonding (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
TW105135961A 2015-12-24 2016-11-04 半導體製造裝置及半導體裝置的製造方法 TWI624887B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2015251207A JP6685126B2 (ja) 2015-12-24 2015-12-24 半導体製造装置および半導体装置の製造方法
JP2015-251207 2015-12-24

Publications (2)

Publication Number Publication Date
TW201735209A TW201735209A (zh) 2017-10-01
TWI624887B true TWI624887B (zh) 2018-05-21

Family

ID=59234588

Family Applications (1)

Application Number Title Priority Date Filing Date
TW105135961A TWI624887B (zh) 2015-12-24 2016-11-04 半導體製造裝置及半導體裝置的製造方法

Country Status (4)

Country Link
JP (1) JP6685126B2 (https=)
KR (1) KR20170076545A (https=)
CN (1) CN106920762B (https=)
TW (1) TWI624887B (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI877661B (zh) * 2022-07-28 2025-03-21 日商捷進科技有限公司 黏晶裝置，黏晶方法及半導體裝置的製造方法

Families Citing this family (20)

* Cited by examiner, † Cited by third party
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JP7082862B2 (ja) * 2017-07-27 2022-06-09 ファスフォードテクノロジ株式会社 ダイボンディング装置、半導体装置の製造方法および半導体製造システム
JP7029900B2 (ja) * 2017-08-03 2022-03-04 ファスフォードテクノロジ株式会社 ダイボンディング装置および半導体装置の製造方法
JP7010633B2 (ja) * 2017-09-19 2022-01-26 ファスフォードテクノロジ株式会社 半導体製造装置および半導体装置の製造方法
JP7010638B2 (ja) * 2017-09-26 2022-01-26 ファスフォードテクノロジ株式会社 ダイボンディング装置および半導体装置の製造方法
JP6886379B2 (ja) * 2017-09-28 2021-06-16 Ｔｏｗａ株式会社 保持部材、保持部材の製造方法、検査装置及び切断装置
JP6965368B2 (ja) * 2017-12-07 2021-11-10 株式会社Fuji 情報管理装置
JP7102271B2 (ja) 2018-07-17 2022-07-19 ファスフォードテクノロジ株式会社 半導体製造装置および半導体装置の製造方法
JP7146352B2 (ja) * 2018-12-10 2022-10-04 株式会社ディスコ 試験装置
WO2020157971A1 (ja) * 2019-02-01 2020-08-06 株式会社Ｆｕｊｉ 作業機
JP7299728B2 (ja) 2019-03-22 2023-06-28 ファスフォードテクノロジ株式会社 半導体製造装置および半導体装置の製造方法
JP7300353B2 (ja) * 2019-09-13 2023-06-29 ファスフォードテクノロジ株式会社 ダイボンディング装置および半導体装置の製造方法
JP7377655B2 (ja) * 2019-09-19 2023-11-10 ファスフォードテクノロジ株式会社 ダイボンディング装置および半導体装置の製造方法
JP7437987B2 (ja) * 2020-03-23 2024-02-26 ファスフォードテクノロジ株式会社 ダイボンディング装置および半導体装置の製造方法
JP7502108B2 (ja) * 2020-07-31 2024-06-18 ファスフォードテクノロジ株式会社 ダイボンディング装置および半導体装置の製造方法
KR102792628B1 (ko) * 2020-11-03 2025-04-07 세메스 주식회사 다이 이송 장치 및 방법
JP7575937B2 (ja) 2020-12-21 2024-10-30 ファスフォードテクノロジ株式会社 ダイボンディング装置および半導体装置の製造方法
JP7635075B2 (ja) * 2021-05-28 2025-02-25 ファスフォードテクノロジ株式会社 ダイボンディング装置および半導体装置の製造方法
JP7788847B2 (ja) * 2021-12-21 2025-12-19 ファスフォードテクノロジ株式会社 実装装置、照明システムの調整方法および半導体装置の製造方法
DE102022118873B4 (de) * 2022-07-27 2024-02-08 ASMPT GmbH & Co. KG Verfahren und Vorrichtung zum Entnehmen von Chips von einem Waferfilmframe, Bestücksystem und Computerprogramm
WO2026078941A1 (ja) * 2024-10-10 2026-04-16 ファスフォードテクノロジ株式会社 半導体製造装置、照明装置、半導体装置の製造方法および照明方法

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US20040075837A1 (en) * 1994-10-07 2004-04-22 Shunji Maeda Manufacturing method of semiconductor substrate and method and apparatus for inspecting defects of patterns of an object to be inspected
US20050260829A1 (en) * 2004-05-20 2005-11-24 Toshihide Uematsu Manufacturing method of a semiconductor device
US20060166466A1 (en) * 2005-01-21 2006-07-27 Hiroshi Maki Semiconductor manufacturing method of die-pick-up from wafer
US20080057599A1 (en) * 2006-09-06 2008-03-06 Hideharu Kobashi Fabrication method of semiconductor device
JP2008098348A (ja) * 2006-10-11 2008-04-24 Yamaha Corp 半導体チップの検査方法
US20100271627A1 (en) * 2007-02-28 2010-10-28 Hitachi High-Technologies Corporation Defect Inspection Method and Defect Inspection Apparatus

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JP3744966B2 (ja) * 1994-10-07 2006-02-15 株式会社ルネサステクノロジ 半導体基板の製造方法
JPH11345865A (ja) * 1998-06-01 1999-12-14 Sony Corp 半導体製造装置
JP2000150546A (ja) * 1998-11-16 2000-05-30 Toshiba Corp 電子部品の実装装置及び実装方法
JP2006138830A (ja) * 2004-11-10 2006-06-01 Nippon Electro Sensari Device Kk 表面欠陥検査装置
JP2008215875A (ja) * 2007-02-28 2008-09-18 Omron Corp 成形体の検査方法およびこの方法を用いた検査装置
JP5903229B2 (ja) * 2011-08-30 2016-04-13 ファスフォードテクノロジ株式会社 ダイボンダ及び半導体製造方法
JP2013092661A (ja) * 2011-10-26 2013-05-16 Panasonic Corp 部品実装装置に用いる撮像用照明ユニット及び部品実装装置
JP5438165B2 (ja) * 2012-06-13 2014-03-12 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP6266275B2 (ja) * 2013-09-09 2018-01-24 ファスフォードテクノロジ株式会社 ダイボンダ及びボンディング方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040075837A1 (en) * 1994-10-07 2004-04-22 Shunji Maeda Manufacturing method of semiconductor substrate and method and apparatus for inspecting defects of patterns of an object to be inspected
US20050260829A1 (en) * 2004-05-20 2005-11-24 Toshihide Uematsu Manufacturing method of a semiconductor device
US20060166466A1 (en) * 2005-01-21 2006-07-27 Hiroshi Maki Semiconductor manufacturing method of die-pick-up from wafer
US20080057599A1 (en) * 2006-09-06 2008-03-06 Hideharu Kobashi Fabrication method of semiconductor device
JP2008098348A (ja) * 2006-10-11 2008-04-24 Yamaha Corp 半導体チップの検査方法
US20100271627A1 (en) * 2007-02-28 2010-10-28 Hitachi High-Technologies Corporation Defect Inspection Method and Defect Inspection Apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI877661B (zh) * 2022-07-28 2025-03-21 日商捷進科技有限公司 黏晶裝置，黏晶方法及半導體裝置的製造方法

Also Published As

Publication number Publication date
TW201735209A (zh) 2017-10-01
JP2017117916A (ja) 2017-06-29
CN106920762B (zh) 2020-03-10
JP6685126B2 (ja) 2020-04-22
CN106920762A (zh) 2017-07-04
KR20170076545A (ko) 2017-07-04

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