TWI624887B - Semiconductor manufacturing device and method for manufacturing semiconductor device - Google Patents

Abstract

The subject of the present invention is that if an abnormality detection on the surface of a semiconductor wafer (die) is performed by a method of binarization or a good image difference method, cracks of less than one pixel width cannot be found.

The solution to this problem is that the semiconductor manufacturing apparatus includes an imaging section that picks up the crystal grains, an illumination section arranged on a line connecting the crystal grains and the imaging section, and a control section that controls the imaging section and the illumination section. The control unit is configured to make the irradiation area of the illuminating unit during the visual inspection of the crystal grains smaller than the irradiation area of the illuminating unit during positioning of the crystal grains, and capture the crystal grains by the imaging unit.

Description

Semiconductor manufacturing device and method for manufacturing semiconductor device

The present invention relates to a semiconductor manufacturing apparatus, and is applicable to, for example, a die bonder including a wafer identification camera.

When a circular wafer is first cut to manufacture a semiconductor wafer, cracks may occur in the semiconductor wafer extending from the cut section to the inside due to cutting resistance during dicing and the like. The individualized semiconductor wafers are inspected for cracks and the like, and a good or bad product is determined (for example, Japanese Patent Application Laid-Open No. 2008-98348).

[Previous Technical Literature] [Patent Literature]

[Patent Document 1] Japanese Patent Laid-Open No. 2008-98348

[Patent Document 2] Japanese Patent Laid-Open No. 2008-66452

If you use the method of binarization or difference with good-quality portraits, When abnormality detection is performed on the surface of a semiconductor wafer (die), cracks less than one pixel wide cannot be found.

An object of the present invention is to provide a technique capable of improving the recognition accuracy of cracks.

Other problems and novel features can be clearly understood from the description of this specification and the drawings.

The outline of a representative in the present invention is as follows if it is briefly explained.

That is, the semiconductor manufacturing apparatus includes an imaging section that picks up a die, an illumination section that is disposed on a line connecting the die and the imaging section, and a control section that controls the imaging section and the illumination section. The control unit is configured to make the irradiation area of the illumination unit during the appearance inspection of the crystal grains smaller than the irradiation area of the illumination unit during the positioning of the crystal grains, and to pick up the crystal grains by the imaging unit.

According to the semiconductor manufacturing apparatus described above, it is possible to improve the accuracy of identifying cracks.

10‧‧‧ Sticky Crystal Machine

1‧‧‧ Wafer Supply Department

D‧‧‧ Grain

VSW‧‧‧Wafer Identification Camera

ID‧‧‧ Camera Department

LD‧‧‧Lighting Department

2A, 2B‧‧‧Pick up department

3A, 3B‧‧‧Alignment

BAS‧‧‧Intermediate Platform

VSA‧‧‧ Platform Identification Camera

4A, 4B‧‧‧Joint

BBH‧‧‧Joint Head

42‧‧‧ Suction cup

BHT‧‧‧ Joint Head Platform

VSB‧‧‧Substrate Identification Camera

5‧‧‧Transportation Department

BS‧‧‧Joint Platform

P‧‧‧ substrate

8‧‧‧Control Department

FIG. 1 is a schematic top view showing the configuration of a die bonder of an embodiment.

FIG. 2 is an external perspective view showing a configuration of a die supply unit in FIG. 1.

FIG. 3 is a schematic cross-sectional view showing a main part of the crystal grain supply unit in FIG. 2.

FIG. 4 is a diagram illustrating a schematic configuration and operation of the die attacher of FIG. 1.

FIG. 5 is a block diagram showing a schematic configuration of a control system.

FIG. 6 is a flowchart illustrating a die-bonding process of the semiconductor manufacturing apparatus of the embodiment.

7 is a cross-sectional view showing a state where tension is applied to the dicing tape.

8 is a cross-sectional view showing a state where a dicing tape is attracted.

FIG. 9 is a flowchart for explaining an imitation operation.

FIG. 10 is a diagram showing an example of a unique portion (selection area).

FIG. 11 is a diagram showing an example of a registered image and a similar image.

FIG. 12 is a flowchart for explaining a continuous start operation.

FIG. 13 is a view showing a portrait of cracked crystal grains.

FIG. 14 is a diagram showing an image obtained by binarizing the image of FIG. 13.

FIG. 15 is a diagram showing a portrait of a good crystal grain.

FIG. 16 is a diagram showing a difference between the image in FIG. 13 and the image in FIG. 15.

FIG. 17 is a view showing an image in a case where the crack is coarse.

FIG. 18 is a view showing an image in a case where cracks are fine.

FIG. 19 is a diagram illustrating a portrait of an indirect detection method of cracks.

20 is a diagram for explaining an optical system of a wafer supply unit.

FIG. 21 is a diagram showing a camera image when the surface of the crystal grains is a flat surface.

22 is a cross-sectional view for explaining unevenness caused by bending specific to thin crystal grains.

FIG. 23 is a view showing a camera image when the surface of the crystal grains is uneven.

FIG. 24 is a diagram showing a camera portrait of a wafer subjected to expansion processing.

FIG. 25 is a diagram for explaining a light source for coaxial illumination.

FIG. 26 is a diagram for explaining the relationship between the area of a light emitting surface and the imaging range of coaxial illumination.

FIG. 27 is a diagram for explaining the relationship between the area of a light emitting surface and the imaging range of coaxial illumination.

FIG. 28 is a cross-sectional view showing a state of a wafer during an expansion process.

FIG. 29 is a diagram showing coaxial illumination of a direct detection method.

FIG. 30 is a diagram showing a first example of coaxial illumination of the indirect detection method.

FIG. 31 is a diagram showing a second example of coaxial illumination of the indirect detection method.

FIG. 32 is a diagram showing coaxial illumination that can correspond to both the direct detection method and the indirect detection method.

FIG. 33 is a diagram showing a combination of coaxial illumination and ring illumination.

FIG. 34 is a diagram showing an image of a wafer having no cracks picked up by an indirect detection method.

FIG. 35 is a diagram showing an image of a cracked wafer picked up by an indirect detection method.

FIG. 36 shows a third example of coaxial illumination of the indirect detection method. Illustration.

FIG. 37 is a diagram showing a portrait of the indirect detection method of FIG. 36.

FIG. 38 is a flowchart showing a pickup process.

FIG. 39 is a plan view showing a substrate.

FIG. 40 is a plan view of a die bonded to the substrate of FIG. 39.

FIG. 41 is a sectional view of FIG. 40.

FIG. 42 is a view showing a portrait of a cracked crystal grain. FIG.

FIG. 43 is a diagram showing the lightness in the direction of the arrow in FIG. 42.

A part of the manufacturing process of a semiconductor device includes a process of combining a semiconductor wafer (hereinafter referred to as a die) on a wiring substrate, a lead frame, or the like (hereinafter referred to as a substrate) and combining the packaging, and a part of the packaging and packaging process includes a semiconductor wafer (Hereinafter referred to as a wafer) a process of dividing a die and a joining process of mounting the divided die on a substrate. The manufacturing apparatus used in the bonding process is a die attacher.

The die bonder is a device that uses solder, gold plating, and resin as bonding materials to bond (mount and adhere) the crystals to the substrate or the bonded crystals. In a bonding device for bonding crystal grains to, for example, the surface of a substrate, an adsorption nozzle called a collet is used to pick up the crystal grains from a wafer, transfer the crystal grains to the substrate, apply a pressing force, and heat the bonding material. The operation (work) for joining is repeated. The suction cup is a holder having an adsorption hole that attracts air and adsorbs and holds the crystal grains, and has the same size as the crystal grains.

<Embodiment>

Hereinafter, a semiconductor manufacturing apparatus according to the embodiment will be described. The symbols in parentheses are examples and are not limited thereto.

The semiconductor manufacturing device (10) includes an imaging unit (ID) that picks up the die (D), an illumination unit (LD) that is arranged on a line connecting the die (D) and the imaging unit (ID), and control imaging Control unit (8) of the lighting unit (ID) and the lighting unit (LD). The control part (8) is to make the irradiation area of the illumination part (LD) during the visual inspection of the die (process P4) smaller than the irradiation area of the illumination part (LD) during the positioning of the die (process P5). The imaging unit (ID) picks up the crystal grains (D).

As a result, it is found that cracks with a width of less than one pixel cannot be detected by the method of binarization or image difference with good products, and the accuracy of crack recognition can be improved.

Hereinafter, examples, comparative examples, and modified examples will be described using drawings. However, in the following description, the same reference numerals are assigned to the same constituent elements, and redundant descriptions are omitted. In addition, in order to clarify the description, the drawings may be schematically shown with respect to the width, thickness, shape, and the like of each part in comparison with the actual form. However, it is not an example to limit the interpreter of the present invention.

[Example]

FIG. 1 is a schematic top view of the die attacher of the embodiment. The die attacher 10 is roughly divided into: a wafer supply unit 1; pickup units 2A and 2B; The alignment sections 3A and 3B, the joint sections 4A and 4B, the transport section 5 and the control section 8 (see FIG. 4). The wafer supply unit 1 supplies a wafer ring 14 (see FIGS. 2 and 3) on which the die D mounted on the substrate P is mounted. The pick-up sections 2A and 2B pick up the die D from the wafer supply section 1. The alignment portions 3A and 3B place the picked-up crystal grains D at a time in the middle. The bonding portions 4A and 4B are the crystal grains D of the pickup alignment portions 3A and 3B, and are bonded to the substrate P or the crystal grains D that have already been bonded. The transfer unit 5 transfers the substrate P to a mounting position. The control unit 8 monitors and controls the operation of each unit.

The wafer supply unit 1 includes a wafer cassette lifter WCL, a wafer correction chute WRA, a wafer ring holder (wafer support table) WRH, a die ejection unit WDE, and a wafer identification camera VSW. The wafer cassette lifter WCL moves a wafer cassette storing a plurality of wafer rings 14 up and down to a wafer transfer height. The wafer correction chute WRA performs alignment of the wafer ring 14 supplied by the wafer cassette lifter WCL. The wafer extractor WRE is taken out of the wafer cassette and stored in the wafer ring 14. The wafer ring holder WRH is moved in the X direction and the Y direction by a driving means (not shown), and the picked-up die D is moved to the position of the die jack unit WDE. The two-dotted circle in FIG. 1 is the moving range of the wafer ring holder WRH. The die ejection unit WDE protrudes and peels from the wafer 11 mounted on the wafer tape (dicing tape) 16 in a unit of a die. The wafer identification camera VSW picks up the die D of the wafer 11 supported by the wafer ring holder WRH and identifies the position of the die D to be picked up.

The pickup sections 2A and 2B are respectively provided with a pickup head BPH and a pickup head platform BPT. The pick-up head BPH has: The crystal grains D lifted by the WDE are adsorbed and held on the front chuck 22 (see FIG. 4), and the crystal grains D are picked up and placed on the intermediate platform BAS. The pickup head platform BPT moves the pickup head BPH in the Z direction, the X direction, and the Y direction. The pick-up head BPH can also be added with a function of matching the angle of the crystal grain D to rotate. Picking up is performed based on a classification chart showing the ranks of the plurality of crystal grains having different electrical characteristics of the wafer 11. The classification map is stored in the control unit 8 in advance.

The alignment sections 3A and 3B are respectively provided with an intermediate stage BAS on which the die D is temporarily placed, and a stage identification camera VSA for identifying the die D on the intermediate stage BAS (see FIG. 4). The die lifting unit WDE is located between the intermediate platform BAS of the alignment portion 3A and the intermediate platform BAS of the alignment portion 3B in plan view, and the die lifting unit WDE, the intermediate platform BAS of the alignment portion 3A, and the alignment portion 3B The intermediate platform BAS is configured along the X direction.

The bonding sections 4A and 4B include a bonding head BBH, a suction cup 42 (see FIG. 4), a bonding head stage BHT, and a substrate identification camera VSB (see FIG. 4). The bonding head BBH has a structure similar to that of the pick-up head BPH, picks up the die D from the intermediate stage BAS, and bonds the transferred substrate P. The chuck 42 is a die D attached to the tip of the bonding head BBH by suction. The bonding head stage BHT moves the bonding head BBH in the Z direction, the X direction, and the Y direction. The substrate identification camera VSB picks up a position identification mark (not shown) of the substrate P that has been transferred, and recognizes the bonding position of the die D to be bonded.

With this configuration, the joint head BBH is identified by the platform Identify the VSA camera data to correct the pickup position. Posture, pick the die D from the intermediate platform BAS, and bond the die D to the substrate P according to the imaging data of the substrate recognition camera VSB.

The transfer unit 5 is provided with a first transfer lane 51 and a second transfer lane 52 that carry a cassette (five in FIG. 1) on which a substrate P (18 pieces in FIG. 1) on which the bonded die D is placed is transported. The first transfer path 51 includes a first cleaning platform CS1, a first bonding platform BS1, and a second bonding platform BS2. FIG. 1 shows a case 91 placed on the first cleaning platform CS1, a case 92 placed on the first joining platform BS1, and a case 93 placed on the second joining platform BS2. The second transfer path 52 is provided with a second cleaning platform CS2 and a third bonding platform BS3. FIG. 1 shows a case 94 placed on the second cleaning platform CS2 and a case 95 placed on the third bonding platform BS3. At the preview point PVP of the first cleaning platform CS1 and the second cleaning platform CS2, the identification of the defective mark attached to the substrate of the substrate P and the washing of foreign objects attracted to the substrate P are performed. The substrate P is bonded to the bonding point BP at the first bonding platform BS1, the second bonding platform BS2, and the third bonding platform BS3. The line connecting the intermediate platform BAS of the alignment section 3A, the joint point BP of the first joint platform BS1, and the joint point BP of the third joint platform BS3 is arranged along the Y direction, and the intermediate platform BAS and the first joint platform 3B The line of the joint point BP of the 2 joint platform BS2 is arrange | positioned along the Y direction. The first conveying path 51 and the second conveying path 52 are respectively provided with a box loader IMH, a feed chute FMT, a loader feeder FIG, a main feeder FMG1, a main feeder FMG2, a main feeder MFG3, and an unloader supply FOG and box unloader OMH. The cassette loader IMH moves the cassette storing the substrate P up and down to the substrate transfer height. Once the substrate P is fully supplied by the pusher, the cassette is released, and the cassette that re-stores the substrate P is moved up and down to the substrate transfer height. The feed chute FMT is a chute that opens and closes the substrate transfer section in accordance with the width of the substrate. The loader feeder FIG holds and feeds the supplied substrate P to the preview point PVP. The main feeder FMG1 is clamped and transported until the substrate P that has been clamped and transported to the preview point PVP is transferred to the main feeder FMG2. The main feeder FMG2 receives the substrate P from the main feeder FMG1 and transfers the substrate P to the main feeder MFG3. The main feeder FMG3 receives the substrate P from the main feeder FMG2 and carries it to the unloading position by clamping. The unloader feeder FOG clamps and transports the substrate P that is clamped and transported to the unloading position to a release position. The cassette unloader OMH moves the supplied empty cassette up and down to the substrate transfer height. When the cassette is filled with the released substrate, the empty cassette is moved up and down to the substrate transfer height again.

Next, a detailed configuration of the wafer supply unit will be described with reference to FIGS. 2 and 3. FIG. 2 is an external perspective view showing a main part of a wafer supply unit. 3 is a schematic cross-sectional view showing a main part of a wafer supply unit. A die attach film (DAF) 18 is attached to the back surface of the wafer 11, and a dicing tape 16 is attached to the back side of the wafer 11. In addition, the edge of the dicing tape 16 is attached to the wafer ring 14, and is sandwiched and fixed by the expansion ring 15. In other words, the wafer ring holder WRH is provided with an expansion ring 15 that holds the wafer ring 14 and a support that is held by the wafer ring 14 and horizontally positions the dicing tape 16 to which a plurality of dies D (wafer 11) are adhered. Ring 17. The wafer supply unit 1 is arranged inside the support ring 17 and includes a die-up unit WDE for pushing up the die D to the upper side. Grain jacking unit WDE is The wafer ring holder WRH moves in the horizontal direction by a driving mechanism (not shown) that moves in the vertical direction. In this way, as the thickness of the crystal grain D is reduced, the adhesive for sticking crystals is replaced from a liquid state to a thin film state, and it is assumed that a so-called crystal grain adhesion film 18 is attached between the wafer 11 and the dicing tape 16. Structure of thin film adhesive material. For the wafer 11 having the die attach film 18, dicing is performed on the wafer 11 and the die attach film 18. The dicing tape 16 and the die attach film 18 may be integrated tapes.

The wafer ring holder WRH lowers the expansion ring 15 holding the wafer ring 14 when the die D is pushed up. At this time, since the support ring 17 does not descend, the dicing tape 16 held by the wafer ring 14 will be stretched, and the interval between the crystal grains D will be enlarged to prevent interference between the crystal grains D. The contact is a condition that individual crystal grains are easily separated and raised. Combining the expansion ring 15 and the support ring 17 is called a dilator. The grain jacking unit WDE jacks the grain D from below the grain, thereby promoting the peeling of the grain D, and improving the picking property of the grain D of the chuck.

FIG. 4 is a schematic side view of a main part of the die attacher. The die attacher 10 includes three bonding platforms BS1, BS2, and BS3, but FIG. 4 illustrates the bonding platform BS. The die attacher 10 once mounts the die D picked up by the pick-up head BPH on the intermediate platform BAS, picks up the mounted die D again with the bonding head BBH, joins it at the mounting position, and mounts it to the substrate P.

The die sticking machine 10 is a wafer recognition camera VSW having a posture of recognizing the die D on the wafer 11 and a platform recognition camera VSA recognizing the attitude of the die D carried on the intermediate platform BAS, and The board identification camera VSB that recognizes the mounting position on the bonding platform BS. In this embodiment, it is necessary to correct the posture deviation between the recognition cameras. The platform recognition camera VSA participating in the pickup of the bonding head BBH and the substrate recognition camera VSB participating in the bonding of the bonding head BBH to the installation position.

The die attacher 10 includes a rotary drive device 25 provided on the intermediate platform BAS, an under vision camera CUV provided between the intermediate platform BAS and the joint platform BS, and an joint platform BS.的 Heating device 34, and the control unit 8. The rotation driving device 25 rotates the intermediate platform BAS on a plane parallel to a mounting surface having a mounting position, and corrects a rotation angle offset between the platform recognition camera VSA and the substrate recognition camera VSB. The down-view camera CUV observes the state of the crystal grains D adsorbed during the movement of the bonding head BBH from below, and the heating device 34 heats the bonding stage BS for mounting the crystal grains D.

The control unit 8 will be described using FIG. 5. FIG. 5 is a block diagram showing a schematic configuration of a control system. The control system 80 includes a control unit 8, a driving unit 86, a signal unit 87, and an optical system 88. The control unit 8 is roughly divided into: a CPU (Central Processor Unit); The computing unit 81, the memory device 82, the input / output device 83, the bus line 84, and the power supply unit 85. The memory device 82 includes a main memory device 82a composed of a RAM, such as a memory processing program, and an auxiliary memory device 82b composed of an HDD, which stores control data or image data necessary for control. The input / output device 83 includes a monitor 83a that displays the status or information of the device, a touch panel 83b for inputting instructions from the operator, a mouse 83c that operates the monitor, and an image that takes in image data from the optical system 88. Take-in device 83d. The input / output device 83 is a motor control device 83e having a drive unit 86 that controls an XY stage (not shown) of the wafer supply unit 1 or a ZY drive shaft of the joint head stage BHT, and various sensors. A signal unit 87 such as a switch of a signal or a lighting device receives or controls an I / O signal control device 83f of the signal. The optical system 88 includes a wafer identification camera VSW, a platform identification camera VSA, and a substrate identification camera VSB. control. The computing unit 81 fetches necessary data via the bus line 84, and controls the pickup head BPH and the like, and transmits information to the monitor 83a and the like.

FIG. 6 is a flowchart illustrating a die-bonding process of the semiconductor manufacturing apparatus of the embodiment.

In the die-bonding process of the embodiment, first, the wafer ring 14 holding the wafer 11 taken out from the wafer cassette will be placed on the wafer ring holder WRH and transferred to the reference for picking up the die D. Position (hereinafter this operation is referred to as wafer loading (process P1)). Next, fine adjustment (wafer alignment) is performed so that the arrangement position of the wafer 11 can be accurately matched with its reference position (process P2).

Next, the wafer ring holder WRH pitch on which the wafer 11 is placed is moved (wafer pitch) at a predetermined pitch, and the wafer D is initially held at the pick-up position by moving the wafer pitch D to a horizontal position (process P3).

Next, the appearance inspection of the die D is performed from the image acquired by the wafer recognition camera VSW (process P4). Details of the grain appearance inspection will be described later. When it is determined that there is no problem with the appearance of the crystal grain D, the process proceeds to the process P5 described later, and when it is determined that there is a problem, the process is skipped. After the die D, the process P3 is performed again, so that the wafer ring holder WRH on which the wafer 11 is placed is moved at a predetermined pitch (wafer pitch), and the next picked-up die D is arranged at the pickup position.

The grain D of the picking object determined to be a good product after the above-mentioned process P4 is the main surface (upper surface) of the grain D of the picking object being picked up by the wafer recognition camera VSW, and the grains from the picking object are calculated from the acquired image The displacement amount of the above-mentioned pickup position of D (process P5). The wafer ring holder WRH on which the wafer 11 is placed is moved in accordance with this displacement amount, and the die D to be picked up is accurately arranged at the picking position.

The wafer 11 is inspected for each die by an inspection device such as a prober in advance, and map data showing good or bad for each die is generated and stored in the memory device 82 of the control unit 8. The determination that the grain D to be picked is a good product or a defective product is made based on the map data. When the die D is a defective product, the appearance inspection identification of the die (process P4), grain positioning identification (process P5), picking (process P6), and bonding (process P7) are not performed, and The wafer ring holder WRH moves at a predetermined pitch (wafer pitch), and the next picked-up die D is arranged at the pick-up position.

After the pick-up die D is correctly arranged at the pick-up position, it is picked up from the cutting tape 16 by the pick-up head BPH including the suction cup 22 and placed on the intermediate platform BAS (process P6). The platform recognition camera VSA was used to take an image to perform the visual inspection of the die placed on the intermediate platform BAS. The bonding head BBH including the suction cup 42 is used to pick up the die from the intermediate platform BAS. 程 P7). A substrate recognition camera VSB is used to take an image of the die and check the appearance of the die. When performing lamination of a plurality of crystal grains, before the picked-up crystal grains are joined, a substrate recognition camera VSB is used to image and inspect the appearance of the crystal grains that have been mounted on the lower layer of the substrate P.

Thereafter, in accordance with the same procedure, the crystal grains D are peeled from the dicing tape 16 one by one (process P8). Once the pick-up of all the dies D from which defective products have been removed is completed, the dicing tape 16 and the wafer ring 14 holding the dies D in the shape of the wafer 11 are unloaded to the wafer cassette (process P9).

7 is a cross-sectional view showing a state where tension is applied to the dicing tape. 8 is a cross-sectional view showing a state where a dicing tape is attracted. In addition, in FIGS. 7 and 8, the display of the die attach film 18 is omitted.

As before. The dicing tape 16 acquires tension by pressing against the support ring 17 in such a manner that the slackness in the picking process disappears and maintains the flat surface. Such processing is referred to as expansion processing. When the wafer 11 subjected to the expansion process has a thickness of less than 200 to 300 μm in recent years, due to the expansion tension, as shown in FIG. 7, the crystal grain D is warped. The grain appearance inspection identification (process P4) was performed in the state of FIG. 7. As shown in FIG. 8, the bending of the crystal grain D is corrected by the vacuum dome unit 19 supporting the cutting tape 16 in the direction of the arrow. Grain positioning identification (process P5) and picking up (process P6) were performed in the adsorption state of FIG. 8.

A method for crystal grain positioning will be described with reference to FIGS. 9 to 12. FIG. 9 is a flowchart for explaining an imitation operation. FIG. 10 is a diagram showing an example of a unique portion (selection area). Fig. 11 shows a registered portrait and the like Example of portrait. FIG. 12 is a flowchart for explaining a continuous start operation.

The grain positioning algorithm mainly uses template matching as a commonly known operation of normalized correlations. The result is set as a coincidence rate. Model matching is a reference learning imitating action and continuous starting action.

First, a description will be given of the imitation action. The control unit 8 transfers the reference sample to the pickup position (step S1). The control unit 8 acquires the image PCr of the reference sample with the wafer recognition camera VSW (step S2). The operator of the sticky crystal machine selects a unique portion UA as shown in FIG. 10 from the image through a human-machine interface (touch panel 83b or mouse 83c) (step S3). The control unit 8 stores the positional relationship (coordinates) of the selected unique portion (selection area) UA and the reference sample in the memory device 82 (step S4). The control unit 8 stores an image (template image) PT of the selected area in the memory device 82 (step S5). The reference workpiece image and its coordinates are stored in a memory device.

Next, the continuous operation will be described. The control unit 8 transfers the component (product wafer) to the pick-up position for continuous operation (step S11). The control unit 8 acquires an image PCn of the product die using the wafer recognition camera VSW (step S2). As shown in FIG. 11, the control unit 8 compares the template image PT stored in the imitation operation with the image PCn of the product grain obtained in step S2, and calculates the coordinates of the image PTn of the most similar part (step S13). . The coordinates are compared with the coordinates measured in the reference sample, and the position of the crystal grains for the product (the offset between the image PTn and the template image PT) is calculated (step S14).

Figures 13 to 16 are used to explain the identification of grain appearance inspection (crack Or foreign object detection). FIG. 13 is a view showing a portrait of cracked crystal grains. FIG. 14 is a diagram showing an image obtained by binarizing the image of FIG. 13. FIG. 15 is a diagram showing a portrait of a good crystal grain. FIG. 16 is a diagram showing a difference between the image in FIG. 13 and the image in FIG. 15.

The abnormality detection on the surface of the crystal grain is performed by a method such as binarization or image difference method. An image PC2 (FIG. 14) obtained by binarizing the image PCa (FIG. 13) of crystal grains having cracked CR was generated, and an abnormal portion (cracked CR) was detected. A difference image PCa-n between the image PCa (FIG. 13) of the crystal grain with crack CR and the image PCn (FIG. 15) of the good crystal grain was generated, and the crack CR was detected.

The problems related to the above-mentioned method will be described using FIGS. 17 and 18. FIG. 17 is a portrait of a case where the crack is coarse. FIG. 18 is an image of a cracked case. The above method is to directly look at the cracks. As shown in FIG. 17, the crack CR1 of the image PCa1 is coarse. However, as shown in FIG. 18, if the crack CR2 of the image PCa2 becomes thin, the color Thinning makes it difficult to detect. That is, the above-mentioned method has the following problems.

(1) Cracks less than 1 pixel wide will not be detected.

When the crack width is less than 1 pixel, if the crack is to be reflected in an image, the image thickness cannot be recognized. Considering the direction of the crack, etc., there is substantially no width of 3 pixels or more, and it cannot be reliably detected.

(2) It is easily affected by the surface appearance of the crystal grains.

When the grain surface has a complicated pattern, it is difficult to identify the cracks running on the surface.

(3) It is difficult to control the brightness of cracks.

It is difficult to show only cracks bright and even dim.

The above-mentioned problem is caused by direct observation of cracks as in the case of grain positioning identification. The defect of a product is determined by the presence or absence of cracks, and its width need not be considered. Therefore, an indirect detection method of cracks is designed. FIG. 19 is a portrait for explaining a crack indirect detection method. Indirect detection of cracks is a way to grasp the changes that occur in the surroundings when there is a crack. For example, as shown in FIG. 19, with the crack CR as the boundary, if the brightness of the portrait PC of the crystal grains changes, the crack can be grasped regardless of the width of the crack CR. In FIG. 19, the right image of the crack CR is dark, and the left image is bright. Hereinafter, a specific method for the indirect detection method of cracks will be described.

First, a wafer identification camera will be described using FIG. 20. FIG. 20 is a diagram for explaining the optical system of the wafer supply unit, and shows the arrangement of a wafer recognition camera and an illumination unit that irradiates light for image capturing of crystal grains to be picked up.

The imaging unit ID of the wafer identification camera VSW is connected to one end of the lens barrel BT, and the other end of the lens barrel BT is equipped with an objective lens (illustration is omitted). The composition of the main face portrait.

An illumination unit LD is arranged between the lens barrel BT and the crystal grain D on a line connecting the imaging unit ID and the crystal grain D. The illumination unit LD includes a surface-emission illumination (light source) SL and a translucent mirror (semi-transparent) Mirror) HM. The irradiation light from the surface-emission illumination SL is reflected by the translucent mirror HM on the same optical axis as the imaging unit ID, and irradiates the crystal grain D. The scattered light irradiated to the crystal grain D with the same optical axis as the imaging unit ID is the crystal grain D Reflected, the regular reflected light will pass through the semi-transparent mirror HM to reach the imaging unit ID, forming the image of the crystal grain D. That is, the illumination unit LD has a function of coaxial epi-illumination (coaxial illumination).

Features of coaxial illumination will be described with reference to FIGS. 21 to 24. FIG. 21 is a diagram showing a camera image when the surface of the crystal grains is a flat surface. 22 is a cross-sectional view for explaining unevenness caused by bending specific to thin crystal grains. FIG. 23 is a view showing a camera image when the surface of the crystal grains is uneven. FIG. 24 is a diagram showing a camera portrait of a wafer subjected to expansion processing.

The surface of the crystal grains is susceptible to specular reflection, and the surface thereof is substantially flat. For example, if coaxial illumination is used in a state where the crystal grains D are completely flat, the reflected light can be efficiently collected, so that the crystal grains D appear bright as shown in FIG. 21.

However, as shown in FIG. 22, when there is unevenness on the surface of the crystal grain D, when the coaxial light is illuminated in parallel, the direction of light reflection is scattered according to the unevenness, as shown in FIG. 23, which is an uneven reflection. the way. Affected by this property during the expansion process, the wafers are lifted by the expansion. As shown in FIG. 24, the shadow will be reflected on the camera image of the wafer. The size and density of this shadow depends on the area of the light emitting surface of the coaxial illumination.

A mechanism related to coaxial illumination will be described with reference to FIGS. 25 to 27. FIG. 25 is a diagram for explaining a light source for coaxial illumination. 26 and 27 are diagrams for explaining the relationship between the area of the light emitting surface and the imaging range of the coaxial illumination. FIG. 26 is a case where the area of the light emitting surface is narrow, and FIG. 27 is a case where the area of the light emitting surface is wide.

If the coaxial lighting is configured as it is, it will block As shown in FIG. 25, the optical path between the die and the camera is provided with a translucent mirror HM, and the light source SL is disposed at a position deviated from the optical path. However, when viewed from the die D, the light source (virtual light source) VSL can also be regarded as a light source (virtual light source) VSL existing at a virtual position between the die and the camera by the semi-transparent mirror HM. However, the hypothetical light source VSL has a lower luminosity than the actual light source SL. Hereinafter, the position of the light source of coaxial illumination is represented by a virtual light source VSL of light.

The relationship with the area of the light-emitting surface will be described using a virtual light source VSL. In order to illuminate the surface of the wafer 11 that is specularly reflected by the illumination, the image of the wafer is taken by the imaging unit ID, which largely depends on the position of the light source and the direction of the mirror surface that is reflected by the wafer 11. As shown in FIG. 26, once the crystal grain D is lifted, the direction of the mirror surface will not be constant. If the area of the light emitting surface of the light source VSL is narrow, the illumination light L1 and L2 are not reflected to the imaging unit ID. Orientation, VT is not reflected. In other words, if there is no imaging unit ID in the range R12 to which the reflected lights R1 and R2 go, the raised portion VT does not appear. When the direction of the mirror surface is unstable within a certain range, all the light sources can be arranged in the range. The wider the range, the larger the area of the light emitting surface must be. Once the area of the light emitting surface is wide, the imaging unit ID can receive reflected light. As shown in FIG. 27, since the imaging unit ID is provided in the range R12 to which the reflected lights R1 and R2 go, the raised portion VT can be reflected. On the contrary, because it is not diffuse reflection, the total amount of illumination from each direction to a specific reflecting surface (each position) is independent, and it becomes important that the light source emits light with a uniform light amount.

The nature of cracks in the crystal grains will be described using FIG. 28. FIG. 28 is a cross-sectional view showing a state of a wafer during an expansion process. Once in crystal When the crack CR occurs in the grain D, the peripheral portion of the crack CR is lifted due to the tension during expansion, similar to the cut groove. Even if there is a crack CR that does not penetrate through the crystal grains D, the crack is penetrated by this expansion process.

The implementation method of the indirect detection method of cracks using cracks as a boundary to change the brightness of the image of the crystal grains will be described with reference to FIGS. 29 to 32. FIG. 29 is a diagram showing coaxial illumination of a direct detection method. FIG. 30 is a diagram showing a first example of coaxial illumination of the indirect detection method. FIG. 31 is a diagram showing a second example of coaxial illumination of the indirect detection method. FIG. 32 is a diagram showing coaxial illumination that can correspond to both the direct detection method and the indirect detection method. FIG. 33 is a diagram showing a combination of coaxial illumination and ring illumination.

The indirect detection method of cracking is to use the relationship between the aforementioned warpage of the crystal grains and the area of the light emitting surface of the illumination. As shown in FIG. 29, in general (for example, grain positioning identification by a direct detection method), coaxial illumination having a sufficient light emitting surface area is prepared in order to see a panoramic view of the grain. The area of the light emitting surface of the virtual light source VSL is made sufficiently larger than the area of the crystal grain D.

On the other hand, in the indirect detection method, a means for reducing a light emitting surface area (or an irradiation area) is provided. However, in order to be able to switch between the direct detection method and the indirect detection method, a means for increasing or reducing the area of the light emitting surface (a means for controlling the light emitting surface) is provided. The means of controlling the light emitting surface is by:

(a) Movement of the shield

(b) ON / OFF of LCD

(c) ON / OFF of part of LEDs arranged in a plane

(d) a combination of coaxial lighting and ring lighting,

And other methods to achieve. Hereinafter, the control of the light emitting surface will be described using a shielding plate as an example.

As shown in FIG. 30, the area of the light emitting surface is reduced by disposing the shielding plate SHL on a part of the outside of the virtual light source VSL (the right side in the drawing). Thereby, the irradiated light LL on the left is the crack CR irradiated to the crystal grain D and is reflected to the imaging unit ID, but the irradiated light LR on the right is blocked by the shielding plate SHL and is not irradiated to the crack CR. The relative position of the cracked CR's realm interface differs in brightness (dark on the right and bright on the left). In addition, as shown in FIG. 31, the area of the light emitting surface is reduced by an annular shielding plate SHL outside the virtual light source VSL. As a result, the central irradiation light LC is irradiated around the crystal grain D and is reflected to the imaging unit ID. However, the outer irradiation light LO is not irradiated, which is the same as that shown in Figure 30. The position makes a difference in lightness.

As shown in FIG. 32, the LEDs of the surface-emission lighting SL in the planar array lighting unit LDA are divided into a first area SL1 near the periphery and a second area SL2 near the center. The direct detection method is to turn on the LEDs of both the first area SL1 and the second area SL to increase the area of the light emitting surface. Thereby, the same configuration as that shown in FIG. 29 can be achieved. In the indirect detection method, for example, the LED of SL1 in the first area is turned OFF, and the LED of SL2 in the second area is turned ON to reduce the light emitting surface area. Thereby, it is possible to form the same as FIG. 31.

As shown in FIG. 33, the imaging unit ID of the wafer recognition camera VSW is connected to one end of the lens barrel BT, and the other end of the lens barrel BT is equipped with an objective lens (illustration is omitted). Lens comes The composition of the image of the main surface of the picked-up crystal grain D. Around the end of the lens barrel BT where the objective lens is mounted, ring illumination RL is mounted.

A coaxial illumination portion CL is disposed between the lens barrel BT and the die D, and the coaxial illumination portion CL is provided with a surface-emission illumination SL and a semi-transparent mirror (semi-transparent mirror) HM inside. The irradiation light from the surface-emission illumination SL is reflected by the translucent mirror HM on the same optical axis as the imaging unit ID, and irradiates the crystal grain D. The scattered light that is irradiated to the crystal grain D with the same optical axis as the imaging unit ID is reflected by the crystal grain D, and the regular reflected light will pass through the translucent mirror HM to reach the imaging unit ID to form the crystal grain D Image.

For example, the ring illumination RL is turned on in the direct detection mode and turned off in the indirect detection mode.

FIG. 34 is an image of a wafer having no cracks picked up by an indirect detection method. FIG. 35 is an image of a cracked wafer picked up by an indirect detection method. According to the above method, when the center of the crystal grain exists on the central axis of the camera optical system, the curvature of the crystal grain is formed into a bowl shape, so the surrounding portion of the crystal grain directly below is the light emitting surface even if the illumination is reduced from the surrounding. It is not easily affected, and cracks that occur in the center are exposed.

FIG. 36 is a diagram showing a third example of the coaxial illumination of the indirect detection method. FIG. 37 is a portrait of the indirect detection method of FIG. 36. As shown in FIG. 36, by forming the position of the shielding plate SHL as a central axis corresponding to the imaging unit ID, the outer irradiation light LO is irradiated near the center of the crystal grain D and is reflected to the imaging unit ID. The irradiation light LC is not irradiated, and an inverted image like that shown in FIG. 37 can be obtained. Light on specular surface It's all a matter of using the position of the light source. On the contrary, the mirror surface of one place of the light source is not limited to one. In addition, the shielding plate SHL of FIG. 36 does not actually exist in the imaging unit ID central axis, but exists in the reflection direction of the translucent mirror HM.

The presence or absence of cracks is determined using the contrast obtained by the indirect detection method using any of the following image processing and the like.

(a) Differential portrait

Perform a difference with the good-quality image. Since the images are different, it can be detected by checking the gradation of the differential image.

(b) Edge detection

It is detected whether there are no unintentional edges in the portrait. This is the use of Sobel Filter. Spatial filters such as differential filters.

(c) Brightness data

The average brightness of the specified area is detected. Changes in histogram.

The picking process using the indirect detection method will be described using FIG. 38. FIG. 38 is a flowchart showing a pickup process.

The die appearance inspection identification (process P4) performed after the die is moved (pitch shifted) to the wafer pitch (process P3) of the pick-up position includes the following steps.

Step P41: The control unit 8 switches the lighting for crack inspection. The control unit 8 is, for example, the first part of the surface-emission illumination SL of the lens barrel BT2A of FIG. 32. The LED of SL1 in the first area is turned off, and the LED of SL2 in the second area is turned on to reduce the area of the light emitting surface.

Step P42: The control unit 8 takes the image for crack inspection. The control unit 8 picks up the die D by a wafer recognition camera and takes in the image.

Step P43: The control unit 8 performs image processing for cracking inspection.

Prior to the grain positioning identification (process P5), the control unit 8 performs grain adsorption by vacuum adsorbing the grain D from the dicing tape side in order to correct the warped grain D (process P11). Grain orientation identification (process P5) includes the following steps.

Step P51: The control unit 8 switches the illumination for crystal positioning identification. For example, the control unit 8 turns on the LED in the first area SL1 of the surface-emission lighting SL of the lens barrel BT2A of FIG. The plane area is much larger.

Step P52: The control unit 8 takes the image for crystal positioning. The control unit 8 picks up the die D by a wafer recognition camera and takes in the image.

Step P53: The control unit 8 performs image processing for crystal grain positioning.

After picking up (process P6), the control unit 8 performs suction OFF (process P11) to stop vacuum adsorption.

Even after the bonding of the bonded substrates, the cracks can be detected by similar methods. This will be described using FIGS. 39, 40, and 41. FIG. 39 is a plan view showing a substrate. FIG. 40 is a plan view of a die bonded to the substrate of FIG. 39. FIG. 41 is a sectional view of FIG. 40.

Wirings WI are provided on the surface of the substrate P formed of epoxy resin or the like. The die D is mounted on the wiring WI of the substrate P together with the DAF 18 attached under the die D. The substrate P has a surface that is not completely flat due to a surface or an internal wiring structure (wiring WI, via VI) or the like. As shown by an arrow AR in FIG. 41, the surface of the substrate P on which the crystal grain D is mounted (the crystal grain positioning surface) is uneven, so that the crystal grain D is slightly bent. When the crystal grains D of the crack CR are mounted here, as shown by the oval dotted line OV in FIG. 41, the crack CR is different in steps or directions (plane angles) between the two sides of the crack CR. The reflection angle (reflection direction) of the illumination varies depending on the plane angle. This can cause a large drop in brightness on both sides of the crack CR.

FIG. 42 is a view showing a portrait of a cracked crystal grain. FIG. FIG. 43 is a diagram showing the lightness in the arrow direction (the image address GA direction) in FIG. 42. The illumination method is the same as that of the wafer supply unit. A coaxial illumination device (such as a lens barrel BT2A) is provided in the substrate recognition camera VSB to control the area of the light emitting surface. The light emitting surface area of the illuminating device which recognizes a cracked appearance inspection is formed to be narrower than the area of the light emitting surface for identifying the position of the substrate. Although the unevenness of the substrate P is used, the crystal grain D itself may cause a step difference due to uneven melting of the DAF 18. In order to discern a slight step difference, once the above-mentioned lighting arrangement is performed, as shown in FIG. 42, the unevenness on the crystal grain D also appears dark and light. However, as shown by the arrow CAR in FIG. 43, when there is a drop (a sharp change) in the brightness distribution in an unknown place on the surface of the crystal grain D, it can be judged that there is crack CR.

With this, it is possible to detect the failure in the wafer supply section before bonding. Detected cracks or cracks that occurred after the picking process (cracks that were not surfaced before the bonding process).

The inventions developed by the present inventors have been described in detail based on the embodiments, examples, comparative examples, and modifications. However, the present invention is not limited to the embodiments, examples, comparative examples, and modifications described above, and various changes can be implemented.

For example, in the embodiment, the coaxial illumination is described with respect to the type arranged between the objective lens and the crystal grains, but it may also be a swing-in type.

Moreover, in the embodiment, the grain positioning identification is performed after the grain appearance inspection and identification, but the grain appearance detection and identification may be carried out after the grain positioning identification.

In the embodiment, the DAF is attached to the back surface of the wafer, but the DAF may be omitted.

In the embodiment, two pick-up heads and a bonding head are provided, but they may be one each. In the embodiment, the intermediate platform is provided, but the intermediate platform may not be provided. In this case, the pickup head and the bonding head may be used in combination.

In the embodiment, the surfaces of the crystal grains are bonded together, but the front and back surfaces of the crystal grains may be reversed after picking up the crystal grains, and the back surface of the crystal grains may be bonded upward. In this case, the intermediate platform is optional. This device is called a Flip Chip Bonder.

Moreover, although an Example is provided with the joint head, it is not necessary to have a joint head. In this case, the picked crystal grains are placed in a container or the like. This device is called a pickup device.

Claims (31)

A semiconductor manufacturing device, comprising: an imaging section that picks up a die; an illumination section arranged on a line connecting the die and the imaging section; and a control section that controls the imaging section and the illumination section, and the control section The irradiated area of the illuminating portion during the visual inspection of the crystal grains is made smaller than the irradiated area of the illuminating portion during positioning of the crystal grains, and the crystal grains are taken in by the imaging unit. For example, the semiconductor manufacturing apparatus according to the first patent application scope further includes a wafer supply unit having a wafer ring holder. The wafer ring holder is provided with a wafer ring, which is used to hold a dicing die to which the aforementioned die is attached. A tape; and a dilator, which stretches and expands the cutting tape. For example, the semiconductor manufacturing device according to claim 1 further includes a bonding portion having a bonding head for bonding the above-mentioned crystal grains to the bonded crystal grains. For example, the semiconductor manufacturing device according to the second or third aspect of the patent application, wherein the illumination unit is coaxial illumination including a translucent mirror disposed on a center line of the imaging unit and a light emitting source disposed beside the translucent mirror. . For example, the semiconductor manufacturing device according to item 4 of the application, wherein the aforementioned light emitting source is a surface emitting source. For example, in the semiconductor manufacturing device according to the scope of the patent application, the light emitting source includes a first area emitting light near the periphery and a second area emitting light near the center, and the lighting of the first area and the second area can be individually controlled. And lights out. For example, the semiconductor manufacturing device according to the second or third aspect of the patent application, wherein the illumination section includes a coaxial illumination section including a translucent mirror disposed on a center line of the imaging section and the translucent mirror disposed on the center line of the imaging section. And a ring lighting part, which is arranged on the upper part of the coaxial lighting part. For example, in the semiconductor manufacturing apparatus according to the scope of the patent application, the lighting and turning-off of the coaxial lighting section and the ring lighting section can be individually controlled. For example, the semiconductor manufacturing device according to the second patent application scope further includes a pickup section for picking up the aforementioned crystal grains. For example, the semiconductor manufacturing device according to claim 9 further includes a bonding portion that bonds the picked up crystal grains to the substrate or the crystal grains that have already been bonded. For example, in the semiconductor manufacturing apparatus of claim 10, the pick-up section is provided with an intermediate platform, the picked-up grains are placed on the intermediate platform, and the joint section is a die-mounted section on the intermediate platform. Bonded to the substrate or a die that has been bonded to the substrate. For example, in the semiconductor manufacturing apparatus of claim 10, the picked-up crystal grains are inverted upside-down, and the bonding portion is configured to bond the inverted crystal grains to the substrate. For example, the semiconductor manufacturing apparatus according to claim 9 may further include a container for storing crystal grains, and the picked-up crystal grains are placed in the container. A method for manufacturing a semiconductor device, comprising: (a) a process of preparing a wafer ring holder for holding a dicing tape with a die attached; (b) a process of stretching the aforementioned dicing tape; (c) using a camera device and A process of inspecting the appearance of the crystal grains by a lighting device; (d) a process of positioning the crystal grains by using the camera device and the illumination device; and (e) a process of picking the crystal grains, (c) the engineering system The area of the light-emitting surface of the lighting device is smaller than the area of the light-emitting surface of the lighting device in the step (d), and imaging is performed. For example, the method for manufacturing a semiconductor device according to item 14 of the patent application, wherein there is a process for adsorbing the crystal grains through the dicing tape between the process (c) and the process (d), and the process (d) There is a process to release the adsorption of the crystal grains between the process (e) and the process. For example, the method for manufacturing a semiconductor device according to item 14 of the patent application, wherein the illumination device is coaxial illumination including a translucent reflector disposed on a center line of the imaging device and a light emitting source disposed beside the translucent reflector. . For example, the method for manufacturing a semiconductor device according to claim 16 in which the aforementioned light emitting source is a surface light emitting source. For example, the method for manufacturing a semiconductor device according to item 17 of the patent application, wherein the light emitting source includes a first field of light emission near the periphery and a second field of light emission near the center, and the first field and the second field can be individually controlled. Turn on and off. For example, the method for manufacturing a semiconductor device according to item 14 of the patent application, wherein the illumination device includes a coaxial illumination unit including a translucent mirror disposed on a center line of the imaging device and a translucent mirror disposed on the center line of the imaging device. And a ring lighting part, which is arranged on the upper part of the coaxial lighting part. For example, the method for manufacturing a semiconductor device according to item 19 of the scope of patent application, wherein the lighting and turning off of the coaxial lighting section and the ring lighting section can be individually controlled. For example, the method for manufacturing a semiconductor device according to item 14 of the patent application, further comprising: (f) a process of placing the picked-up die on the intermediate platform; and (g) performing a process of placing the aforementioned die on the intermediate platform. The appearance inspection process of the die. For example, the method for manufacturing a semiconductor device according to claim 21, wherein the (g) process is performed by using a platform recognition camera to take an image. For example, the method for manufacturing a semiconductor device according to item 14 of the patent application, further comprising: (h) a process of performing an appearance inspection of the bonded die; and (i) bonding the die to the bonded die. Engineering on the die. For example, the method for manufacturing a semiconductor device according to claim 23, wherein the (h) process is performed by using a substrate recognition camera to take an image. A die sticking machine is characterized by comprising: a wafer identification camera that picks up a die; an illumination unit arranged on a line connecting the die and the wafer recognition camera; and a control unit for controlling the wafer recognition camera and the illumination unit. The control unit is configured so that an irradiation area of the illumination unit during the appearance inspection of the die is narrower than an irradiation area of the illumination unit during the positioning of the die, and the wafer is captured by the wafer recognition camera. Grain. For example, the wafer sticking machine with the scope of patent application No. 25, which further includes a wafer supply unit having a wafer ring holder, which is provided with: a wafer ring, which keeps the dicing with the aforementioned die attached. A tape; and a dilator, which stretches and expands the cutting tape. For example, the die sticking machine of the scope of application for patent No. 25, further comprising: a bonding head for bonding the aforementioned crystal grains to the substrate or the crystal grains already bonded; and a substrate recognition camera. For example, the die sticking machine with the scope of patent application No. 26 or 27, wherein the control unit stretches and expands the dicing tape and performs the appearance inspection of the die with the wafer recognition camera. For example, the die sticking machine of the scope of application for patent No. 25, further comprising: a picking head for picking up the aforementioned grains; an intermediate platform on which the picked up grains are placed; and a platform identification camera, the control unit is based on the aforementioned platform identification The camera performs an appearance inspection of the die placed on the intermediate platform. For example, the die sticking machine according to item 27 of the patent application scope, wherein the control unit performs the appearance inspection of the bonded die with the substrate identification camera. For example, the die sticking machine of the 27th scope of the patent application, in which, when the control unit is laminating the die sticking of a plurality of grains, before the picked up grains are joined, the board identification camera is used to mount the sticky Visual inspection of the underlying die of the substrate.