TWI610375B - 在密封劑上透過絕緣層形成開口以供互連結構的強化黏著度之半導體裝置和方法 - Google Patents

在密封劑上透過絕緣層形成開口以供互連結構的強化黏著度之半導體裝置和方法 Download PDF

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TWI610375B
TWI610375B TW100144138A TW100144138A TWI610375B TW I610375 B TWI610375 B TW I610375B TW 100144138 A TW100144138 A TW 100144138A TW 100144138 A TW100144138 A TW 100144138A TW I610375 B TWI610375 B TW I610375B
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Taiwan
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insulating layer
encapsulant
interconnect
semiconductor
semiconductor die
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TW100144138A
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English (en)
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TW201246408A (en
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林耀劍
陳康
方建敏
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史達晶片有限公司
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Abstract

一種半導體裝置，此者具有經架置於一載體的半導體晶粒。一密封劑係經沉積在該半導體晶粒和載體上。移除該載體。在該半導體晶粒形跡之外部於一互連處所內該密封劑的一局部上構成一第一絕緣層。在該互連處所內透過該第一絕緣層構成一開口以曝出該密封劑。該開口可為環繞該互連處所並且位在該互連處所之中央範圍內的環狀或通道以曝出該密封劑。一第一導體層係經構成於該第一絕緣層上以依循該第一絕緣層的輪廓。一第二導體層係經構成在該第一導體層和所曝出的密封劑上。一第二絕緣層係經構成於該第二導體層上。而一凸起則為構成於該互連處所內該第二導體層上。

Description

在密封劑上透過絕緣層形成開口以供互連結構的強化黏著度之半導體裝置和方法
本發明概略關於半導體裝置，並且尤其是關於一種在密封劑上透過絕緣層形成開口以供互連結構的強化黏著度之半導體裝置和方法。
半導體裝置常見於當今的電子產品。半導體裝置在電氣元件的數量及密度上多所變化。離散半導體裝置通常含有某種類型的電氣元件，即如發光二極體(LED)、小型信號產生器、電阻器、電容器、電感器以及功率金屬氧化物半導體場效電晶體(MOSFET)。積體半導體裝置通常含有數百至數百萬個這種電氣元件。積體半導體裝置的範例包含微控制器、微處理器、電荷耦合裝置(CCD)、太陽能電池以及數位微映鏡裝置(DMD)。
半導體裝置可執行廣泛各種功能，像是信號處理、高速計算、電磁信號傳送與接收、電子裝置控制、陽光至電力之轉換處理，以及電視顯示器的視覺投影產生作業。半導體裝置可見於娛樂、通訊、電力轉換、網路、電腦及消費性產品的領域。半導體裝置亦可見於軍事應用項目、航空、車輛、工業用控制器以及辦公室設備。
半導體裝置是運用半導體材料的電氣性質。半導體材料的原子結構可供藉由施加電場或基極電流，或是透過摻雜處理，以操縱其導電性。摻雜處理可將雜質引入至該半導體材料內以供操縱並控制該半導體裝置的導體性。
半導體裝置可含有主動性和被動性的電氣結構。主動結構，包含二極體和場效電晶體，可控制電流的行流。藉由改變摻雜以及電場或基極電流施加的位準，該電晶體可促成或阻制電流的流動。而包含電阻器、電容器和電感器在內的被動結構則可產生為執行各種電氣功能所必要的電壓與電流間關係。這些被動與主動結構係經電氣連接以構成電路而可供該半導體裝置能夠執行高速計算以及其他的可用功能。
一般說來，半導體裝置是利用兩項複雜製程所製造，亦即前端製造與後端製造，而各者都可能牽涉到數以百計的步驟。前端製造牽涉到在半導體晶圓的表面上形成複數個晶粒。各個晶粒通常為等同，並且含有藉由以電氣方式連接多個主動及被動元件所構成的電路。後端製造則涉及到從所完工的晶圓單切出個別晶粒，並且進行晶粒封裝以提供結構支撐與環境隔離。
半導體製造的其一目標為產生更微小的半導體裝置。小型化裝置通常耗用較少電力、擁有較高效能並且能夠更加提升生產效率。此外，較微小的半導體裝置具有較小形跡，這對於微型終端產品而言確為所企求者。小型晶粒可藉由改善前端製程所達成，而獲致具備更小、更高密度之主動及被動元件的晶粒。後端製程則可藉由改善電氣互連及封裝材料以獲致具有較小形跡的半導體裝置封裝。
在「扇出式晶圓層級晶片尺度封裝(Fo-WLCSP)」裡，半導體晶粒具有一作用表面，此作用表面含有按如依據該晶粒之電氣設計與功能而構成於該晶粒內且為電氣互連的主動裝置、被動裝置、導體層及介電層所實作之類比或數位電路。在該半導體晶粒上則沉積以密封劑。第一鈍化層係經構成於該密封劑上。在該第一鈍化層上構成有一重分佈層(RDL)。而在該RDL和該第一鈍化層上構成有一第二鈍化層。該第二鈍化層的一部份會由蝕刻製程所移除以供曝出該RDL。而於該第二鈍化層的所移除局部裡會在該RDL上構成多個凸起。
在許多Fo-WLCSP裡，該第一鈍化層與該密封劑之間的黏著度會趨向於微弱。該第一鈍化層與該密封劑之間的弱黏著度在像是墜落測試的可靠性測試過程中會特別顯著。從而該裝置會因後可靠性檢測作業所拒除，或者該裝置可能發生現場失效的問題。
因此存在一種對於能夠減少半導體裝置上之凸起結構失效問題的需要。從而，在一具體實施例裡，本發明為一種製作半導體裝置的方法，包含下列步驟，即提供一載體；將一半導體晶粒架置於該載體；將一密封劑沉積在該半導體晶粒及該載體上；移除該載體；在該半導體晶粒形跡之外部於一互連處所內該密封劑的一局部上構成一第一絕緣層；移除該第一絕緣層中位於該互連處所之內的局部以曝出該密封劑；在該第一絕緣層和所曝出的密封劑上構成一第一導體層；在該第一導體層上構成一第二絕緣層；以及在該互連處所內於該第一導體層上構成一凸起。
在另一具體實施例裡，本發明為一種製作半導體裝置的方法，包含下列步驟，即提供一載體；將一半導體晶粒架置於該載體；將一密封劑沉積在該半導體晶粒及該載體上；移除該載體；在該半導體晶粒形跡之外部於一互連處所內該密封劑的一局部上構成一第一絕緣層；在該互連處所內透過該第一絕緣層構成一開口以曝出該密封劑；以及在該第一絕緣層及所曝出的密封劑上構成一第一導體層。
在另一具體實施例裡，本發明為一種製作半導體裝置的方法，包含下列步驟，即提供一半導體晶粒；將一密封劑沉積在該半導體晶粒上及附近；在該半導體晶粒形跡之外部於一互連處所內該密封劑的一局部上構成一第一絕緣層；在該互連處所內透過該第一絕緣層構成一開口以曝出該密封劑；以及在該第一絕緣層及所曝出的密封劑上構成一第一導體層。
在另一具體實施例裡，本發明為一種含有一半導體晶粒以及經沉積在該半導體晶粒上和附近之密封劑的半導體裝置。在該半導體晶粒形跡之外部於一互連處所內該密封劑的一局部上構成一第一絕緣層。在該互連處所內透過該第一絕緣層構成一開口以曝出該密封劑。在該第一絕緣層和所曝出的密封劑上構成一第一導體層。
在後文說明中係按一或更多具體實施例並參照於各項圖式以敘述本發明，其中類似編號代表相同或相仿構件。本發明雖係按照為以達到本發明目的之最佳模式所描述，然熟諳本項技藝之人士將可瞭解所欲者係為以涵蓋可經納入在如後載申請專利範圍所定義之本發明精神與範疇內的替代、修改和等同項目，以及其等按照後文揭示說明與圖式所支持的等同項目。
半導體裝置通常是利用兩項複雜的製造程序所製成：前端製造及後端製造。前端製造牽涉到在半導體晶圓的表面上形成複數個晶粒。該晶圓上的各個晶粒含有主動及被動電氣元件，而該等元件係經電氣連接以構成功能性電路。像是電晶體及二極體之主動電氣元件擁有控制電流行流的能力。而像是電容器、電感器、電阻器及轉換器之被動電氣元件則可產生為執行電路功能所必要的電壓與電流間關係。
被動及主動元件是藉由包含摻雜、沉積、光微影、蝕刻及平坦化處理在內的一系列製程步驟所形成在該半導體晶圓的表面上。摻雜處理可藉由像是離子植入或熱性擴散的技術以將雜質引入至半導體材料內。摻雜製程可修改主動裝置內之半導體材料的導電性、將半導體材料轉換成絕緣體，或者是回應於電場或基極電流以按動態方式改變半導體材料導體性。電晶體包含具備各式摻雜類型與程度而視需要所排置的範圍，藉以當施加該電場或基極電流時讓電晶體能夠促成或阻禁電流的行流。
主動及被動元件是由具備不同電氣性質的材料覆層所構成。該等覆層是藉由沉積技術所形成，而這些技術則是部份地基於所予沉積之材料的類型所決定。例如，薄膜沉積作業可能牽涉到化學氣相沉積(CVD)、物理氣相沉積(PVD)、電解塗鍍處理以及無電塗鍍製程。各個覆層通常係經樣式化以供構成主動元件、被動元件的局部，或者是該等元件之間的電氣連接。
可利用光微影技術以樣式化該等覆層，而這種技術牽涉到在所予樣式化之覆層上進行即如光阻物之光敏材料的沉積作業。利用光線即可將該樣式自光遮罩轉傳至該光阻物。該光阻物樣式中受照於光線的局部可利用溶劑加以移除，從而曝出所予樣式化之底置覆層的局部。然後移除該光阻物的其餘部分而留下樣式化覆層。或另者，有些類型的材料則是利用像是無電或電解塗鍍技術以藉由將材料直接沉積至由先前沉積/蝕刻製程所形成的區域或空處內所樣式化。
將薄膜材料沉積在既有樣式上可能會造成底置樣式誇大並且產生不均勻的平坦表面。為產生較小且較密集包集之主動及被動元件，均勻的平坦表面確屬必要。可利用平坦化作業以自晶圓的表面去除材料，同時產生均勻的平坦表面。平坦化作業牽涉到以拋光板進行晶圓表面拋光處理。在拋光過程中可將摩擦材料及侵蝕性化學藥劑添增至晶圓的表面處。合併的摩擦機械性動作及化學藥劑侵蝕作用可去除任何不規則拓樸性，從而獲致均勻的平坦表面。
後端製造是指將經拋光完工的晶圓切割或單切成個別晶粒，然後封裝該晶粒以予結構支撐和環境隔離。為進行晶粒單切，可沿該晶圓上稱為鋸切線道或刻劃線的非功能性範圍將晶圓予以劃割且斷折。可利用雷射切割機具或鋸切刀片對晶圓進行單切。在單切作業之後，即可將個別晶粒架置在一封裝基板上，此者含有腳針或接觸板以供互連於其他的系統元件。然後再將在該半導體晶粒上所形成的接觸板連接至該封裝內的接觸板。該等電氣連接可藉由焊料凸起、釘頭凸起、導體膏劑或接線連附所進行。可將密封劑或其他的鑄造材料沉積在該封裝上以提供實體支撐與電氣隔離。然後將該所完工封裝插入至一電氣系統內，而且其他的系統元件即能獲用該半導體裝置的功能性。
圖1說明一電子裝置50，其中具有晶片載體基板或印刷電路板(PCB) 52，而該者含有複數個經架置於其表面上的半導體封裝。該電子裝置50可按照應用項目而定擁有單一類型的半導體封裝或是多種類型的半導體封裝。圖1中係為說明之目的而顯示不同類型的半導體封裝。
該電子裝置50可為運用該等半導體封裝以執行一或更多電氣功能的單立式系統。或另者，該電子裝置50可為一更大系統的子元件。例如，該電子裝置50可為行動電話、個人數位助理(PDA)、數位視訊相機(DVC)或其他電子通訊裝置的其中一部份。或另者，該電子裝置50可為圖形卡、網路介面卡或是其他可供插設於電腦內的信號處理機卡。該半導體封裝可包含微處理器、記憶體、應用特定積體電路(ASIC)、邏輯電路、類比電路、RF電路、離散裝置，或是其他的半導體晶粒或電氣元件。對於這些產品來說，若欲為市場所接受，則微小化和重量減輕確為重點。故而必須縮減半導體裝置之間的距離以利獲致更高密度。
在圖1中，PCB 52可供作為經架置於該PCB上之半導體封裝的結構支撐與電氣互連之通用基板。導體性信號跡線54係利用汽化作業、電解塗鍍、無電塗鍍、網版印刷或是其他的適當金屬沉積製程構成於該PCB 52的表面上或覆層內。信號跡線54提供該等半導體封裝、所架置元件與其他外部系統元件各者之間的電氣通訊。該等跡線54亦提供連至該等半導體封裝各者的電力和接地連接。
在一些具體實施例裡，半導體裝置具有兩種封裝層級。第一層級的封裝處理是一種將該半導體晶粒按照機械性和電氣性之方式接附至中介載體的技術。而第二層級的封裝處理則牽涉到將該中介載體以機械性和電氣性方式接附至PCB。在其他的具體實施例裡，半導體裝置可僅具有該第一層級封裝處理，其中晶粒是以機械性和電氣性的方式直接地架置於PCB。
為示範說明，在PCB 52上顯示有多種類型的第一層級封裝，包含線路連附封裝56及覆晶58。除此之外，在PCB 52上顯示有多種類型的第二層級封裝，包含焊球柵格陣列(BGA)60、凸起晶片載體(BCC)62、雙線內封裝64(DIP) 64、基面柵格陣列(LGA)66、多晶片模組(MCM)68、四側扁平無鉛封裝(QFN)70以及四側扁平封裝72。根據系統需求而定，任何經組態設定具任何第一與第二層級封裝式樣之組合的半導體封裝組合，以及其他電子元件，皆可連接至PCB 52。在一些具體實施例裡，該電子裝置50含有單一個接附半導體封裝，而其他的具體實施例則運用多個互連封裝。藉由在單一基板上合併一或更多半導體封裝，製造廠商可將預製元件併入在電子裝置及系統之內。由於半導體封裝含有複雜的功能性，因此能夠利用較價廉元件及流線化製程來製造電子裝置。所獲裝置較不易於失效並且製造成本較低，故而消費者的價格成本較低。
圖2a-2c顯示一示範性半導體封裝。圖2a說明經架置於PCB 52上之DIP 64的進一步細節。該半導體晶粒74含有一作用範圍，其內含有按如依據該晶粒之電氣設計而構成於該晶粒內且為電氣互連的主動裝置、被動裝置、導體層及介電層所實作之類比或數位電路。例如，該電路可含有一或更多經構成於該半導體晶粒74之作用範圍內的電晶體、二極體、電感器、電容器、電阻器以及其他的電路構件。接觸板76為一或更多像是鋁(Al)、銅(Cu)、錫(Sn)、鎳(Ni)、金(Au)或銀(Ag)的導體材料層，並且電氣連接至該半導體晶粒74之內所形成的一或更多電路構件。在組裝DIP 64的過程中，該半導體晶粒74係利用金-矽共晶層或者像是熱性環氧樹脂或環氧樹脂的黏著材料以架置於中介載體78。該封裝本體含有像是聚合物或陶瓷的絕緣封裝材料。該等導體引腳80及接線連附82提供該半導體晶粒74與PCB 52之間的電氣互連。該密封劑84係經沉積於該封裝上以藉由防止溼氣及粒子進入封裝內並污染晶粒74或接線連附82來提供環境保護。
圖2b說明經架置於PCB 52上之BCC 62的進一步細節。半導體晶粒88是利用底部填充或環氧樹脂黏著材料92以架置於載體90上。該等接線連附94提供該等接觸板96與98之間的第一層級封裝互連。鑄造化合物或密封劑100係經沉積在該半導體晶粒88及該等接線連附94上，藉以提供對於該裝置的實體支撐與電氣隔離。該等接觸板102是利用像是電解塗鍍或無電塗鍍的適當金屬沉積製程而構成於PCB 52的表面上藉以避免氧化。該等接觸板102係經電氣連接至PCB 52內的一或更多導體信號跡線54。在BCC 62的接觸板98與PCB 52的接觸板102之間構成有多個凸起104。
在圖2c中，半導體晶粒58是藉由覆晶式樣第一層級封裝以向下面朝該中介載體106的方式所架置。該半導體晶粒58的作用範圍108含有類比或數位電路，此等電路係按根據該晶粒之電氣設計而形成的主動裝置、被動裝置、導體層和介電層所實作。例如，該電路在該作用範圍108內可含有一或更多電晶體、二極體、電感器、電容器、電阻器以及其他的電路構件。該半導體晶粒58係透過凸起110電氣且機械性地連接至該載體106。
BGA 60是利用凸起112以BGA式樣第二層級封裝所電氣且機械性地連接至PCB 52。該半導體晶粒58透過該等凸起110、信號線114和凸起112以電氣性地連接至PCB 52內的導體信號跡線54。鑄造化合物或密封劑116係經沉積在該半導體晶粒58及該載體106上，藉以提供對於該裝置的實體支撐與電氣隔離。該覆晶半導體裝置可提供一條從該半導體晶粒58上之主動裝置至該PCB 52上之傳導軌線的微短導電路徑，藉以縮短信號傳播距離、降低電容值並且改善整體的電路效能。在另一具體實施例裡，該半導體晶粒58則是利用覆晶式樣第一層級封裝以機械性地且電氣性地直接連接至該PCB 52而無需中介載體106。
圖3a顯示一擁有即如矽、鍺、砷化鎵、磷化銦或碳化矽之基底基板材料122的半導體晶圓120以供結構性支撐。複數個半導體晶粒或元件124係經形成於晶圓120上，並如前述般依鋸切線道126所分離。
圖3b顯示該半導體晶圓120之一局部的截面視圖。各個半導體晶粒124具有一背側表面128以及一作用表面130，此作用表面含有按如依據該晶粒之電氣設計與功能而構成於該晶粒內且為電氣互連的主動裝置、被動裝置、導體層及介電層所實作之類比或數位電路。例如，該電路可含有一或更多構成於該作用表面130內的電晶體、二極體和其他電路構件，藉以實作像是數位信號處理器(DSP)、ASIC、記憶體或是其他信號處理電路的類比電路或數位電路。該半導體晶粒124亦可含有即如電感器、電容器和電阻器的積體被動裝置(IPD)以供進行RF信號處理。在一具體實施例裡，該半導體晶粒124為覆晶類型的半導體晶粒。
導電層132是利用PVD、CVD、電解塗鍍及無電塗鍍製程或是其他適當的金屬沉積製程以構成於該作用表面130上。該導體層132可為Al、Cu、Sn、Ni、Au、Ag或是其他適當導電材料的覆層。該導體層132可運作如經電氣連接至該作用表面130上之電路的接觸板。而該等接觸板132上則形成有多個凸起134。
絕緣或介電層136係利用PVD、CVD、網版印刷、旋轉塗鍍、噴灑塗鍍、燒結或熱性氧化作業以構成於該作用表面130及該導體層132上。該絕緣層136含有多個二氧化矽(SiO2)、氮化矽(Si3N4)、氮氧化矽(SiON)、五氧化二鉭(Ta2O5)、氧化鋁(Al2O3)或是其他具有類似絕緣與結構性質之材料的覆層。該絕緣層136的一局部係藉蝕刻製程所移除以曝出該等接觸板132。
在圖3c中，該半導體晶圓120是利用鋸切刀片或雷射切割機具138經由鋸切線道126單切成個別的半導體晶粒124。
圖4a-4k說明，關聯於圖1及圖2a-2c，在一密封劑上透過絕緣層形成開口以供互連結構之強化黏著度的製程。圖4a顯示一基板或載體140，其中含有像是矽、聚合物、氧化鈹的臨時性或可犧牲基底材料，或是其他適當的低成本、硬固性材料，以供結構性支撐。在該載體140上構成有介面層或雙側式條帶142以作為臨時性的黏著連附膜層或蝕刻停阻層。
圖3a-3c的半導體晶粒124是利用撿拾和放置作業以予定位且架置於該載體140上，而該絕緣層136的指向則是朝向該載體。圖4b顯示經架置於該載體140的半導體晶粒124，而該絕緣層136及該等接觸板132毗連於該介面層142。
在圖4c中，密封劑或鑄造化合物144是利用膏劑印刷、沖壓鑄造、傳動鑄造、液體密封劑鑄造、真空疊覆、旋轉塗鍍或是其他適當的塗佈器以沉積在該半導體晶粒124及該介面層142上。該密封劑144可為聚合物合成材料，即如具有填充物的環氧樹脂、具有填充物的環氧丙烯酸酯或是具有適當填充物的聚合物。該密封劑144為非導體性，並且環境保護該半導體裝置不致受到外部構件及污染物所影響。
在圖4d裡，可藉由化學蝕刻、機械剝除、CMP、機械研磨、熱性烘烤、雷射掃瞄或濕性剝離來移除該等載體140與介面層142以曝出該等接觸板132。絕緣或鈍化層146係利用PVD、CVD、網版印刷、旋轉塗鍍、噴灑塗鍍、燒結或熱性氧化作業以構成於該半導體晶粒124及該密封劑144上。該絕緣層146含有一或更多SiO2、Si3N4、SiON、Ta2O5、Al2O3或是其他具有類似絕緣及結構性質之材料的覆層。該絕緣層146之一局部是利用蝕刻製程所移除，藉以構成一開口或通道148並且曝出該等接觸板132及該密封劑144。
圖4e顯示該絕緣層146及該開口148的平面視圖。尤其，該絕緣層146內之開口148在互連處所或凸起構成區域150裡的形狀為環形，藉以將該密封劑144曝出在該半導體晶粒124形跡的外部。在一具體實施例裡，該環形開口148的寬度為20-100微米(μm)。
圖4f顯示該絕緣層146及該等開口152之另一具體實施例的平面視圖，此等開口係繞於互連處所或凸起構成區域153依90度增量而按四個分隔圓圈或通道所構成。該等開口152具有與圖4e類似的截面視圖，並且將該密封劑144曝出在該半導體晶粒124形跡的外部。該等開口152可分佈在靠近該互連處所153的邊緣處，即如40μm淨空。圖4g顯示該絕緣層146及該等開口154之另一具體實施例的平面視圖，此等開口係繞於互連處所或凸起構成區域155之環週而按複數個分隔圓圈或通道所構成。該等開口154具有與圖4e類似的截面視圖，並且將該密封劑144曝出在該半導體晶粒124形跡的外部。該等開口154可分佈在靠近該互連處所155的邊緣處，即如40μm淨空。
在圖4h中，導電層156是利用樣式化和金屬沉積製程，像是PVD、CVD、濺鍍、電解塗鍍與無電塗鍍處理，共形地施佈於該絕緣層146、該密封劑144以及該等曝出接觸板132上。該導體層156可為Al、Cu、Sn、Ni、Au、Ag或是其他適當導電材料的覆層。該導體層156依循該絕緣層146的輪廓，包含在該密封劑144上進入該環形開口148。更特定地說，該導體層156是在該環形開口148內直接地構成於該密封劑144上。同樣地，該導體層156在圖4f及4g的開口152及154內是直接地構成於該密封劑144上。該導體層156可為含有Ti/Cu、TiW/Cu、Ta/Cu、Cr/Cu、Ni、NiV、Au或Al的種源層或黏著層。
在圖4i中，導電層或RDL 158是利用樣式化和金屬沉積製程，像是PVD、CVD、濺鍍、電解塗鍍與無電塗鍍處理，構成於該導體層156上。該導體層158可為Al、Cu、Sn、Ni、Au、Ag或是其他適當導電材料的覆層。該導體層158的多個局部可根據該半導體晶粒124的設計與功能而為電氣共通或電氣隔離。
在圖4j裡，絕緣或鈍化層160是利用PVD、CVD、網版印刷、旋轉塗鍍、噴灑塗鍍、燒結或熱性氧化作業以構成於該絕緣層146及該導體層158上。該絕緣層160含有一或更多SiO2、Si3N4、SiON、Ta2O5、Al2O3或是其他具有類似絕緣及結構性質之材料的覆層。該絕緣層160的一部份係經移除，藉以在該互連處所或凸起構成區域150上曝出該導體層158。
在圖4k裡，可利用汽化作業、電解塗鍍、無電塗鍍、焊球滴落或是網版印刷製程以將導電凸起材料沉積在該互連處所150及所曝出導體層158上。該凸起材料可為Al、Sn、Ni、Au、Ag、Pb、Bi、Cu、焊料以及該等的組合，並具有選擇性的通流溶液。例如該凸起材料可為共晶Sn/Pb、高鉛焊料，或是無鉛焊料。該凸起材料是利用適當的接附或連附製程以連附於該導體層158。在一具體實施例裡，該凸起材料是藉由將該材料加熱至高於其熔點所回流，藉以構成球形焊球或凸起164。在一些應用項目中，該等凸起164係經二次回流以供改善對該導體層158的電氣接觸。該等凸起亦可為壓縮連附於該導體層158。該等凸起164是代表一種能夠在該導體層158上形成的互連結構類型。該互連結構亦可運用釘頭凸起、微型凸起或者其他的電氣互連。
在Fo-WLCSP 166裡，位於該半導體晶粒124形跡外部該環形開口148之內直接地構成在該密封劑144上的導體層156局部(以及RDL 158)可對該等所錨定凸起164提供強化的黏著度與可靠性。同樣地，該導體層156(以及RDL 158)可在該等開口152及154之內直接地構成於該密封劑144上以供強化的黏著度與可靠性。該導體層156局部(以及RDL 158)是在該半導體晶粒124形跡外部直接地設置於該絕緣層146上，藉以作為對該密封劑144的應力紓解和緩衝，且同時均衡施於該半導體晶粒上的應力。在另一具體實施例裡，接續於圖4c所示之結構，絕緣或鈍化層168是利用PVD、CVD、網版印刷、旋轉塗鍍、噴灑塗鍍、燒結或熱性氧化作業所構成於該半導體晶粒124及該密封劑144上。該絕緣層168含有一或更多SiO2、Si3N4、SiON、Ta2O5、Al2O3或是其他具有類似絕緣及結構性質之材料的覆層。該絕緣層168之一局部是利用蝕刻製程所移除，藉以構成多個開口或通道170並且曝出該等接觸板132及該密封劑144。
圖5b顯示該絕緣層168及該等開口170的平面視圖，此等開口係依跨越於互連處所或凸起構成區域172均勻分佈的複數個分隔圓圈或通道所構成。該等開口154可分佈在靠近該邊緣處且位於該互連處所172的內部(中央)範圍裡，即如40μm淨空。該等開口170將該密封劑144曝出於該半導體晶粒124形跡的外部。
在圖5c中，導電層174是利用樣式化和金屬沉積製程，像是PVD、CVD、濺鍍、電解塗鍍與無電塗鍍處理，共形地施佈於該絕緣層146、該密封劑144以及該等曝出接觸板132上。該導體層174可為Al、Cu、Sn、Ni、Au、Ag或是其他適當導電材料的覆層。該導體層174依循該絕緣層146的輪廓，包含在該密封劑144上進入該等開口170。更特定地說，該導體層174是在該等開口170內直接地構成於該密封劑144上。該導體層170可為含有Ti/Cu、TiW/Cu、Ta/Cu、Cr/Cu、Ni、NiV、Au或Al的種源層或黏著層。
導電層或RDL 176是利用樣式化和金屬沉積製程，像是PVD、CVD、濺鍍、電解塗鍍與無電塗鍍處理，構成於該導體層174上。該導體層176可為Al、Cu、Sn、Ni、Au、Ag或是其他適當導電材料的覆層。該導體層176的多個局部可根據該半導體晶粒124的設計與功能而為電氣共通或電氣隔離。
在圖5d裡，絕緣或鈍化層178是利用PVD、CVD、網版印刷、旋轉塗鍍、噴灑塗鍍、燒結或熱性氧化作業以構成於該絕緣層146及該導體層176之上。該絕緣層178含有一或更多SiO2、Si3N4、SiON、Ta2O5、Al2O3或是其他具有類似絕緣及結構性質之材料的覆層。該絕緣層178的一部份係經移除，藉以在該互連處所或凸起構成區域172上曝出該導體層176。
在圖5e裡，可利用汽化作業、電解塗鍍、無電塗鍍、焊球滴落或是網版印刷製程以將導電凸起材料沉積在該互連處所172及所曝出導體層176上。該凸起材料可為Al、Sn、Ni、Au、Ag、Pb、Bi、Cu、焊料以及該等的組合，並具有選擇性的通流溶液。例如，該凸起材料可為共晶Sn/Pb、高鉛焊料，或是無鉛焊料。該凸起材料是利用適當的接附或連附製程以連附於該導體層176。在一具體實施例裡，該凸起材料是藉由將該材料加熱至高於其熔點所回流，藉以構成球形焊球或凸起180。在一些應用項目中，該等凸起180係經二次回流以供改善對該導體層176的電氣接觸。該等凸起亦可為壓縮連附於該導體層176。該等凸起180是代表一種能夠在該導體層176上形成的互連結構類型。該互連結構亦可運用釘頭凸起、微型凸起或者其他的電氣互連。
在Fo-WLCSP 182裡，位於該半導體晶粒124形跡外部該等開口170之內直接地構成在該密封劑144上的導體層174局部(以及RDL 176)可對該等所錨定凸起180提供強化的黏著度與可靠性。該導體層174局部(以及RDL 176)是在該半導體晶粒124形跡外部直接地設置於該絕緣層146上，藉以作為對該密封劑144的應力紓解和緩衝，且同時均衡施於該半導體晶粒上的應力。
雖既已詳細說明本發明的具體實施例，然熟諳本項技藝之人士將能瞭解可對該等具體實施例進行修改及調適而不致悖離按如後載申請專利範圍中所陳述的本發明範疇。
50．．．電子裝置
52．．．印刷電路板
54．．．信號跡線
56．．．接線連附封裝
58．．．覆晶
60．．．焊球柵格陣列
62．．．凸起晶片載體
64．．．雙線內封裝
66．．．基面柵格陣列
68．．．多晶片模組
70．．．四側扁平無鉛封裝
72．．．四側扁平封裝
74．．．半導體晶粒
76．．．接觸板
78．．．中介載體
80．．．導體引腳
82．．．接線連附
84．．．密封劑
88．．．半導體晶粒
90．．．載體
92．．．黏著劑材料
94．．．接線連附
96．．．接觸板
98．．．接觸板
100．．．鑄造化合物或密封劑
102．．．接觸板
104．．．凸起
106．．．載體
108．．．作用範圍
110．．．凸起
112．．．凸起
114．．．信號線路
116．．．鑄造化合物或密封劑
120．．．晶圓
122．．．基底基板材料
124．．．半導體晶粒或元件
126．．．鋸切線道
128．．．背側表面
130．．．作用表面
132．．．導電層
136．．．絕緣層
138．．．鋸切刀片或雷射切割機具
140．．．載體
142．．．介面層
144．．．密封劑
146．．．絕緣層
148．．．開口
150．．．互連處所或凸起構成區域
152．．．開口
153．．．互連處所或凸起構成區域
154．．．開口
155．．．互連處所或凸起構成區域
156．．．導體層
158．．．導體層
160．．．絕緣或鈍化層
164．．．球形焊球或凸起
166．．．扇出式晶圓層級晶片尺度封裝(Fo-WLCSP)
168．．．絕緣層
170．．．開口
172．．．互連處所或凸起構成區域
174．．．導體層
176．．．導體層
178．．．絕緣層
180．．．球形焊球或凸起
182．．．扇出式晶圓層級晶片尺度封裝(Fo-WLCSP)
圖1顯示構成於一半導體晶粒上的傳統凸起結構；
圖2a-2c顯示一PCB，此者具有經架置於其表面上的不同類型封裝；
圖3a-3c顯示經架置於該PCB之代表性半導體封裝的進一步細節；
圖4a-4k說明在一密封劑上透過絕緣層形成開口以供互連結構之強化黏著度的製程；以及
圖5a-5e說明另一在一密封劑上透過絕緣層形成開口以供互連結構之強化黏著度的製程。
124．．．半導體晶粒或元件
128．．．背側表面
130．．．作用表面
132．．．導電層
136．．．絕緣層
144．．．密封劑
146．．．絕緣層
148．．．開口
156．．．導體層
158．．．導體層
160．．．絕緣或鈍化層
164．．．球形焊球或凸起
166．．．扇出式晶圓層級晶片尺度封裝(Fo-WLCSP)

Claims (10)

  1. 一種製造半導體裝置之方法，包含：提供一半導體晶粒；在該半導體晶粒的一第一表面上以及該半導體晶粒附近沉積一密封劑；在該半導體晶粒的一第二表面上構成一第一絕緣層，並且該第一絕緣層與該半導體晶粒形跡之外部於一互連處所之內該密封劑的表面直接接觸；移除該第一絕緣層的位於該互連處所之內的一第一局部以曝出該密封劑的在該互連處所之內的複數個部分，同時留下在該互連處所之內與該密封劑的該表面直接接觸的該第一絕緣層的一第二局部；在該互連處所之內的該第一絕緣層上構成一第一導體層，並且該第一導體層與該第一絕緣層的該第二局部和所曝出的該密封劑的該部分接觸；在該第一導體層上構成一第二絕緣層；以及在該半導體晶粒形跡之外部於該互連處所上構成一凸起，其中該互連處所上包含在該第一導體層上、該第一絕緣層的該第二局部上和該密封劑上。
  2. 如申請專利範圍第1項所述之方法，其中在該互連處所之內的該密封劑的所暴露的表面是與在該互連處所之外部的該密封劑的表面共平面。
  3. 如申請專利範圍第1項所述之方法，其中移除該第一絕緣層的該第一局部會在該第一絕緣層內繞於該互連處所 而依90度增量留下複數個開口以曝出該密封劑。
  4. 如申請專利範圍第1項所述之方法，其中移除該第一絕緣層的該第一局部會在該第一絕緣層內繞於該互連處所之環週留下複數個開口以曝出該密封劑。
  5. 一種製造半導體裝置之方法，包含：提供一半導體晶粒；在該半導體晶粒附近沉積一密封劑；構成與該密封劑的表面直接接觸並且覆蓋該半導體晶粒的一第一絕緣層；在一互連處所之內通過該第一絕緣層構成一開口以在該互連處所之內曝出該密封劑的該表面，同時保留在該互連處所之內該第一絕緣層的與該密封劑的該表面直接接觸的部分；在該互連處所之內的在該第一絕緣層上且在該第一絕緣層的該部分和所曝出的該密封劑的表面上構成一第一導體層；以及在該互連處所上構成一互連結構，該互連處所上包含在該第一絕緣層的該部分上和所曝出的該密封劑的表面上。
  6. 如申請專利範圍第5項所述之方法，其中在該第一絕緣層內的開口為環形。
  7. 如申請專利範圍第5項所述之方法，其中在該第一絕緣層內的開口包含該第一絕緣層內繞於該互連處所之環週的複數個通道。
  8. 一種半導體裝置，包含：一半導體晶粒；一密封劑，其係經沉積在該半導體晶粒附近；一第一絕緣層，其係經構成以與該密封劑的表面直接接觸，其中該第一絕緣層包含經形成在該半導體晶粒外側的該密封劑的該表面上而於一互連處所之內且延伸至該密封劑的該表面的一開口、及在該互連處所之內與該密封劑的該表面直接接觸的該第一絕緣層的一部分；一第一導體層，其係經構成在該互連處所之內的該第一絕緣層上且在該第一絕緣層的該部分和該密封劑的該表面上；以及一互連結構，其係經構成在該互連處所之內該第一導電層和該第一絕緣層的該部分上。
  9. 如申請專利範圍第8項所述之半導體裝置，其中在該第一絕緣層內的開口為環形。
  10. 如申請專利範圍第8項所述之半導體裝置，其中在該第一絕緣層內的開口包含該第一絕緣層內繞於該互連處所之環週的複數個通道。
TW100144138A 2010-12-10 2011-12-01 在密封劑上透過絕緣層形成開口以供互連結構的強化黏著度之半導體裝置和方法 TWI610375B (zh)

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