TWI578531B - 量子阱元件及其形成方法 - Google Patents

量子阱元件及其形成方法 Download PDF

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TWI578531B
TWI578531B TW105106939A TW105106939A TWI578531B TW I578531 B TWI578531 B TW I578531B TW 105106939 A TW105106939 A TW 105106939A TW 105106939 A TW105106939 A TW 105106939A TW I578531 B TWI578531 B TW I578531B
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肖德元
汝京 張
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上海新昇半導體科技有限公司
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Description

量子阱元件及其形成方法
本發明涉及半導體製造領域,尤其涉及一種量子阱元件及其形成方法。
高電子遷移率電晶體(HEMT)的基本結構由一個調整摻雜異質接面及其源汲結構組成。存在於調製摻雜異質接面中的二維電子氣(2-DEG),由於不受電離雜質離子散射的影響,其遷移率非常高。HEMT是電壓控制元件,閘極電壓Vg可控制異質接面勢阱的深度,從而控制勢阱中2-DEG的面密度,進而控制元件的工作電流。對於GaAs體系的HEMT,通常其中的n-AlxGa1-xAs控制層應該是空乏的。若n-AlxGa1-xAs層厚度較大、摻雜濃度又高,則在Vg=0時就存在有2-DEG,為空乏型元件,反之則為增強型元件(Vg=0時,肖特基空乏層即延伸到本質GaAs層內部);對於HEMT,主要是要控制好寬禁帶半導體層(控制層)的摻雜濃度和厚度,特別是厚度。在考慮HEMT中的2-DEG面密度Ns時,通常只需要考慮異質接面勢阱中的兩個二維子能帶(i=0和1)即可。2-DEG面電荷密度Ns將受到閘極電壓Vg的控制。
本发明的目的在于提供一种量子阱元件及其形成方法,能夠獲得具有高遷移率的量子阱元件。
為了實現上述目的,本發明提出了一種量子阱元件的形成方法,包括步驟:提供基板,在所述基板的表面形成具有鰭狀結構的緩衝層;在所述緩衝層及鰭狀結構表面上依次沉積量子阱通道層、阻擋層及介電層;在所述鰭狀結構兩側的介電層表面形成金屬閘極,所述金屬閘極高度低於所述鰭狀結構的高度;在鰭狀結構兩側暴露出的介電層表面及金屬閘極的兩側形成側牆;依次蝕刻位於鰭狀結構及緩衝層表面暴露出的介電層及阻擋層,暴露出源汲區域的所述量子阱通道層;在暴露出的源汲區域的量子阱通道層內進行摻雜,形成源極和汲極;在所述源極和汲極上形成源汲電極。
進一步的,在所述的量子阱元件的形成方法中,所述具有鰭狀結構的緩衝層的形成步驟包括:在所述基板上形成所述緩衝層;在所述緩衝層表面形成圖案化的光阻;以所述圖案化的光阻作為幕罩,乾式蝕刻所述緩衝層,形成鰭狀結構。
進一步的,在所述的量子阱元件的形成方法中,所述緩衝層的材質為AlN,厚度範圍是100nm~5000nm。
進一步的,在所述的量子阱元件的形成方法中,所述緩衝層採用MOCVD、ALD或者MBE製程形成。
進一步的,在所述的量子阱元件的形成方法中,所述量子阱通道層的材質為N-型GaN,厚度範圍是1nm~100nm。
進一步的,在所述的量子阱元件的形成方法中,所述阻擋層的材質為AlN。
進一步的,在所述的量子阱元件的形成方法中,所述量子阱通道層及阻擋層均採用磊晶生長製程形成。
進一步的,在所述的量子阱元件的形成方法中,所述介電層的材質為二氧化矽、氧化鋁、氧化鋯或氧化鉿,厚度範圍是1nm~5nm。
進一步的,在所述的量子阱元件的形成方法中,所述介電層採用CVD、MOCVD、ALD或MBE製程形成。
進一步的,在所述的量子阱元件的形成方法中,所述金屬閘極的材質為NiAu或CrAu。
進一步的,在所述的量子阱元件的形成方法中,所述金屬層採用CVD、PVD、MOCVD、ALD或MBE製程形成。
進一步的,在所述的量子阱元件的形成方法中,所述側牆的材質為氮化矽。
進一步的,在所述的量子阱元件的形成方法中,採用選擇性蝕刻製程依次蝕刻位於鰭狀結構及緩衝層表面暴露出的介電層及阻擋層, 暴露出源汲區域的所述量子阱通道層。
進一步的,在所述的量子阱元件的形成方法中,採用離子植入或離子擴散製程對所述量子阱通道層進行N+離子植入,形成源極和汲極。
在本發明中,還提出了一種量子阱元件,採用如上文所述的量子阱元件的形成方法形成,其特徵在於,包括:基板、設有鰭狀結構的緩衝層、量子阱通道層、阻擋層、金屬閘極、介電層、側牆及源汲極,其中,所述設有鰭狀結構的緩衝層形成在所述基板上,所述量子阱通道層、阻擋層、介電層及金屬閘極依次形成在所述鰭狀結構的兩側,所述側牆形成在鰭狀結構兩側暴露出的介電層表面及金屬閘極的兩側,所述源極形成在金屬閘極兩側的量子阱通道層內,所述汲極形成在所述及鰭狀結構頂部暴露出的量子阱通道層內。
進一步的,在所述的量子阱元件中,還包括源汲極電極,所述源汲極電極形成在所述源極和汲極上。
與現有技術相比,本發明的有益效果主要體現在:提出了一種量子阱元件的形成方法,能夠形成具有高遷移率的量子阱元件,並且形成的量子阱元件具有較高的擊穿電壓,從而獲得具有較好的性能及可靠性的量子阱元件。
100‧‧‧基板
200‧‧‧緩衝層
210‧‧‧鰭形結構
310‧‧‧量子阱通道層
311‧‧‧源極
312‧‧‧汲極
320‧‧‧阻擋層
330‧‧‧介電層
400‧‧‧金屬閘極
500‧‧‧側牆
600‧‧‧源汲極電極
第1圖為本發明一實施例中量子阱元件的形成方法的流程圖;第2圖至第9圖為本發明一實施例中形成量子阱元件過程中的剖面示意圖。
下面將結合示意圖對本發明的量子阱元件及其形成方法進行更詳細的描述,其中表示了本發明的優選實施例,應該理解本領域技術人員可以修改在此描述的本發明,而仍然實現本發明的有利效果。因此,下列描述應當被理解為對於本領域技術人員的廣泛知道,而並不作為對本發明的限制。
為了清楚,不描述實際實施例的全部特徵。在下列描述中,不詳細描述公知的功能和結構,因為它們會使本發明由於不必要的細節而混亂。應當認為在任何實際實施例的開發中,必須做出大量實施細節以實現開發者的特定目標,例如按照有關系統或有關商業的限制,由一個實施例改變為另一個實施例。另外,應當認為這種開發工作可能是複雜和耗費時間的,但是對於本領域技術人員來說僅僅是常規工作。
在下列段落中參照附圖以舉例方式更具體地描述本發明。根據下面說明和權利要求書,本發明的優點和特徵將更清楚。需說明的是,附圖均採用非常簡化的形式且均使用非精準的比例,僅用以方便、明晰地輔助說明本發明實施例的目的。
請參考第1圖,在本發明中,提出了一種量子阱元件的形成方法,包括步驟:S100:提供基板,在所述基板的表面形成具有鰭狀結構的緩衝層;S200:在所述緩衝層及鰭狀結構表面上依次沉積量子阱通道層、阻擋層及介電層;S300:在所述鰭狀結構兩側的介電層表面形成金屬閘極,所述金屬閘 極高度低於所述鰭狀結構的高度;S400:在鰭狀結構兩側暴露出的介電層表面及金屬閘極的兩側形成側牆;S500:依次蝕刻位於鰭狀結構及緩衝層表面暴露出的介電層及阻擋層,暴露出源汲區域的所述量子阱通道層;S600:在暴露出的源汲區域的量子阱通道層內進行摻雜,形成源極和汲極;S700:在所述源極和汲極上形成源汲電極。
具體的,請參考第2圖,在步驟S100中,所述基板100可以為矽基板、藍寶石基板或者SiC基板等,其還可以是設有Σ型凹槽等圖形的基板。
在所述基板100表面形成緩衝層200;所述緩衝層200材質為AlN,其厚度範圍是100nm~5000nm,例如是3000nm。所述緩衝層200可以採用MOCVD(Metal-organic Chemical Vapor Deposition,金屬有機化合物化學氣相沉澱)、ALD(Atomic layer deposition,原子層沉積)或者MBE(Molecular Beam Epitaxy,分子束磊晶)製程形成。
接著,在所述緩衝層200上形成鰭形結構210,其形成步驟包括:在所述基板上形成所述緩衝層;在所述緩衝層表面形成圖案化的光阻;以所述圖案化的光阻作為幕罩,乾式蝕刻所述緩衝層,形成鰭狀結構(Fin)。
接著,請參考第3圖和第4圖,在所述緩衝層200及鰭狀結構210表面上依次沉積量子阱通道層310、阻擋層320及介電層330;其中,所述量子阱通道層310材質為N-型GaN,在本實施例中,其厚度範圍是1nm~100nm,例如是50nm。所述阻擋層320材質為AlN。所述介電層330的材質為二氧化矽、氧化鋁、氧化鋯或氧化鉿,其厚度範圍是1nm~5nm,例如是3nm。其中,所述量子阱通道層310、阻擋層320及介電層330均可以採用CVD、MOCVD、ALD或MBE等製程形成。
接著,請參考第5圖,在所述鰭狀結構兩側的介電層330表面形成金屬閘極400,所述金屬閘極400高度低於所述鰭狀結構210的高度;其中,所述金屬閘極400的材質為NiAu或CrAu等,其可以採用PVD(Physical Vapor Deposition,物理氣相沉積)、MOCVD、ALD或MBE製程形成。
請參考第6圖,在鰭狀結構兩側暴露出的介電層330表面及金屬閘極400的兩側形成側牆500;所述側牆500的材質為氮化矽。
接著,請參考第7圖,蝕刻位於鰭狀結構210及緩衝層200表面暴露出的介電層330及阻擋層320,暴露出源汲區域的所述量子阱通道層310;其中,採用選擇性蝕刻製程進行蝕刻,去除所述部分介電層330及阻擋層320,暴露出位於鰭狀結構210頂部的量子阱通道層310,後續作為汲極,以及位於金屬閘極400兩側緩衝層200上的量子阱通道層310,後續作為源極。
接著,請參考第8圖,採用離子植入或離子擴散製程對所述量子阱通道層310進行N+離子植入,形成源極311和汲極312。形成的量子阱層310、阻擋層320及源極311和汲極312結構,調整摻雜異質接面中的量子阱層310可以形成二維電子氣(2-DEG,如圖中虛線所示),由於不受電離雜質 離子散射的影響,其遷移率非常高,從而可以使形成的量子阱元件具有較高的遷移率。
接著,請參考第9圖,在所述源極311和汲極312上形成源汲電極600。
在本實施例的另一方面還提出了一種量子阱元件,採用如上文所述的量子阱元件的形成方法形成,包括:基板100、設有鰭狀結構210的緩衝層200、量子阱通道層310、阻擋層320、金屬閘極400、介電層330、側牆500及源極311和汲極312,其中,所述設有鰭狀結構的緩衝層200形成在所述基板100上,所述量子阱通道層310、阻擋層320、介電層330及金屬閘極400依次形成在所述鰭狀結構210的兩側,所述側牆500形成在鰭狀結構210兩側暴露出的介電層330表面及金屬閘極400的兩側,所述源極311形成在金屬閘極400兩側的量子阱通道層310內,所述汲極312形成在所述及鰭狀結構210頂部暴露出的量子阱通道層310內。
其中,量子阱元件還包括源汲極電極600,所述源汲極電極600形成在所述源極311和汲極312上。
綜上,在本發明實施例提供的量子阱元件及其形成方法中,提出了一種量子阱元件的形成方法,能夠形成具有高遷移率的量子阱元件,並且形成的量子阱元件具有較高的擊穿電壓,從而獲得具有較好的性能及可靠性的量子阱元件。
上述僅為本發明的優選實施例而已,並不對本發明起到任何限制作用。任何所屬技術領域的技術人員,在不脫離本發明的技術方案的範圍內,對本發明揭露的技術方案和技術內容做任何形式的等同替換 或修改等變動,均屬未脫離本發明的技術方案的內容,仍屬於本發明的保護範圍之內。
S100~S700‧‧‧步驟

Claims (16)

  1. 一種量子阱元件的形成方法,包括步驟:提供基板,在所述基板的表面形成具有鰭狀結構的緩衝層;在所述緩衝層及鰭狀結構表面上依次沉積量子阱通道層、阻擋層及介電層;在所述鰭狀結構兩側的介電層表面形成金屬閘極,所述金屬閘極高度低於所述鰭狀結構的高度;在鰭狀結構兩側暴露出的介電層表面及金屬閘極的兩側形成側牆;依次蝕刻位於鰭狀結構及緩衝層表面暴露出的介電層及阻擋層,暴露出源汲區域的所述量子阱通道層;在暴露出的源汲區域的量子阱通道層內進行摻雜,形成源極和汲極;在所述源極和汲極上形成源汲電極。
  2. 如權利要求1所述的量子阱元件的形成方法,其中所述具有鰭狀結構的緩衝層的形成步驟包括:在所述基板上形成所述緩衝層;在所述緩衝層表面形成圖案化的光阻;以所述圖案化的光阻作為幕罩,乾式蝕刻所述緩衝層,形成鰭狀結構。
  3. 如權利要求2所述的量子阱元件的形成方法,其中所述緩衝層的材質為AlN,厚度範圍是100nm~5000nm。
  4. 如權利要求2所述的量子阱元件的形成方法,其中所述緩衝層採用MOCVD、ALD或者MBE製程形成。
  5. 如權利要求1所述的量子阱元件的形成方法,其中所述量子阱通道 層的材質為N-型GaN,厚度範圍是1nm~100nm。
  6. 如權利要求1所述的量子阱元件的形成方法,其中所述阻擋層的材質為AlN。
  7. 如權利要求5或6所述的量子阱元件的形成方法,其中所述量子阱通道層及阻擋層均採用磊晶生長製程形成。
  8. 如權利要求1所述的量子阱元件的形成方法,其中所述介電層的材質為二氧化矽、氧化鋁、氧化鋯或氧化鉿,厚度範圍是1nm~5nm。
  9. 如權利要求8所述的量子阱元件的形成方法,其中所述介電層採用CVD、MOCVD、ALD或MBE製程形成。
  10. 如權利要求1所述的量子阱元件的形成方法,其中所述金屬閘極的材質為NiAu或CrAu。
  11. 如權利要求10所述的量子阱元件的形成方法,其中所述金屬閘極採用CVD、PVD、MOCVD、ALD或MBE製程形成。
  12. 如權利要求1所述的量子阱元件的形成方法,其中所述側牆的材質為氮化矽。
  13. 如權利要求1所述的量子阱元件的形成方法,其中暴露出源汲區域的所述量子阱通道層係採用選擇性蝕刻製程依次蝕刻位於鰭狀結構及緩衝層表面暴露出的介電層及阻擋層。
  14. 如權利要求1所述的量子阱元件的形成方法,其中形成源極和汲極係採用離子植入或離子擴散製程對所述量子阱通道層進行N+離子植入。
  15. 一種量子阱元件,採用如權利要求1至6,權利要求8,10以及權利要求12至14中任一種所述的量子阱元件的形成方法形成,包括:基板、 設有鰭狀結構的緩衝層、量子阱通道層、阻擋層、金屬閘極、介電層、側牆及源極和汲極,其中,所述設有鰭狀結構的緩衝層形成在所述基板上,所述量子阱通道層、阻擋層、介電層及金屬閘極依次形成在所述鰭狀結構的兩側,所述側牆形成在鰭狀結構兩側暴露出的介電層表面及金屬閘極的兩側,所述源極形成在金屬閘極兩側的量子阱通道層內,所述汲極形成在所述鰭狀結構頂部暴露出的量子阱通道層內。
  16. 如權利要求15所述的量子阱元件,還包括源汲極電極,所述源汲極電極形成在所述源極和汲極上。
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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103681836A (zh) * 2012-09-21 2014-03-26 罗伯特·博世有限公司 垂直的微电子元件以及相应的制造方法
US20140264369A1 (en) * 2013-03-15 2014-09-18 Semiconductor Components Industries, Llc High electron mobility semiconductor device and method therefor

Family Cites Families (4)

* Cited by examiner, † Cited by third party
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US7205604B2 (en) * 2001-03-13 2007-04-17 International Business Machines Corporation Ultra scalable high speed heterojunction vertical n-channel MISFETs and methods thereof
US6943407B2 (en) * 2003-06-17 2005-09-13 International Business Machines Corporation Low leakage heterojunction vertical transistors and high performance devices thereof
US7504691B2 (en) * 2004-10-07 2009-03-17 Fairchild Semiconductor Corporation Power trench MOSFETs having SiGe/Si channel structure

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103681836A (zh) * 2012-09-21 2014-03-26 罗伯特·博世有限公司 垂直的微电子元件以及相应的制造方法
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