TWI553793B - 陶瓷基板、封裝基板、半導體晶片封裝件及其製造方法 - Google Patents
陶瓷基板、封裝基板、半導體晶片封裝件及其製造方法 Download PDFInfo
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Description
本發明是有關一種陶瓷基板,特別是有關一種用以與一底基板組成一封裝基板之陶瓷基板。
陶瓷封裝基板相較於一般塑料成型支架(Plastic leaded chip carrier, PLCC)更具有耐溫抗黃化性佳、散熱性佳、以及可靠度佳等優點,一般而言常使用在高功率半導體晶片封裝件所需之封裝基板。
常見的陶瓷封裝基板是採用低溫共燒多層陶瓷(Low-Temperature Co-fired Ceramic, LTCC)燒結而一體成形,因此針對不同封裝晶片承載區尺寸或不同基板側壁設計,只要產品設計略有修改,則需要重新修改模具設計,或著需要重新製作一套生產模具,所費不貲。另一方面,陶瓷封裝基板之晶片承載區上之開孔在燒結成形過程中,難以避免受材料收縮影響其孔徑尺寸或形狀。
綜上所述,如何提供一種容易生產加工且控制其孔徑精確度的半導體晶片封裝件之陶瓷基板便是目前極需努力的目標。
本發明提供一種陶瓷基板、封裝基板、半導體晶片封裝件及其製造方法,其是將一陶瓷基板透過預開孔之溝槽、圖案化保護層以及噴砂製程控制其開孔孔徑及尺寸,用以與一底基板組成一封裝基板,以用於封裝一半導體晶片。
本發明一實施例之封裝基板是用以封裝一半導體晶片。封裝基板包含一底基板以及一陶瓷基板。底基板之一表面具有一導電接點。陶瓷基板具有一第一表面、一第二表面以及至少一開孔。陶瓷基板是以第一表面朝向底基板設置於底基板之表面,其中,開孔貫穿陶瓷基板之第一表面以及第二表面,以於底基板之表面定義一晶片承載區,使導電接點容置於開孔。開孔具有一垂直部以及一漸變部。其中,垂直部設置於第一表面側,且垂直部之內徑等於開孔於第一表面之第一孔徑;漸變部設置於第二表面側,且漸變部之內徑由第一孔徑逐漸增大為開孔於第二表面之第二孔徑。
本發明另一實施例之陶瓷基板用以與一底基板組成一用以封裝一半導體晶片之封裝基板,其中底基板之一表面具有一導電接點。陶瓷基板包含一第一表面、一第二表面以及至少一開孔。陶瓷基板以第一表面朝向底基板設置於底基板之表面,其中,開孔貫穿陶瓷基板之第一表面以及第二表面,以於底基板之表面定義一晶片承載區,使導電接點容置於開孔。開孔具有一垂直部以及一漸變部。其中,垂直部設置於第一表面側,且垂直部之內徑等於開孔於第一表面之第一孔徑;漸變部設置於第二表面側,且漸變部之內徑由第一孔徑逐漸增大為開孔於第二表面之第二孔徑。
本發明又一實施例之半導體晶片封裝件包含一封裝基板、一半導體晶片以及一封裝體。封裝基板包含一底基板以及一陶瓷基板。底基板之一表面具有一導電接點。陶瓷基板具有一第一表面、一第二表面以及至少一開孔。陶瓷基板以第一表面朝向底基板設置於底基板之表面,其中,開孔貫穿陶瓷基板之第一表面以及第二表面,以於底基板之表面定義一晶片承載區,使導電接點容置於開孔。開孔具有一垂直部以及一漸變部。其中,垂直部設置於第一表面側,且垂直部之內徑等於開孔於第一表面之第一孔徑;漸變部設置於第二表面側,且漸變部之內徑由第一孔徑逐漸增大為開孔於第二表面之第二孔徑。半導體晶片設置於晶片承載區,並與導電接點電性連接。封裝體設置於開孔,以包覆半導體晶片以及導電接點。
本發明再一實施例之具有開孔之陶瓷基板之製造方法,包含:提供一陶瓷基板,其具有一第一表面以及相對之一第二表面;形成預開孔之一溝槽於陶瓷基板之第一表面;形成一圖案化保護層於該陶瓷基板之該第二表面;以及噴砂衝擊陶瓷基板之第二表面,以形成一開孔,其中,開孔貫穿陶瓷基板之第一表面以及第二表面。開孔具有一垂直部以及一漸變部。其中,垂直部設置於第一表面側,且垂直部之內徑等於開孔於第一表面之第一孔徑;漸變部設置於第二表面側,且漸變部之內徑由第一孔徑逐漸增大為開孔於第二表面之第二孔徑。
藉由本發明,針對不同陶瓷基板孔徑尺寸或形狀之設計,可較精確地進行加工生產,不需要修改封裝基板之模具設計或重新製作一套生產模具,可以共用同一款底基板,以節省生產成本,同時提高陶瓷基板孔徑尺寸或形狀之精確度。
以下藉由具體實施例配合所附的圖式詳加說明,當更容易瞭解本發明之目的、技術內容、特點及其所達成之功效。
請一併參照圖1a、圖1b及圖4,本發明之一實施例之一封裝基板10是用以封裝一半導體晶片20,以組成一半導體晶片封裝件1。封裝基板10由一底基板12以及一陶瓷基板14所組成。底基板12之材質可為一陶瓷、高分子聚合物或金屬。舉例而言,底基板12之種類可為低溫共燒多層陶瓷基板(Low-Temperature Co-fired Ceramic, LTCC)、高溫共燒多層陶瓷基板(High-Temperature Co-fired Ceramic, HTCC)、直接接合銅基板(Direct Bonded Copper, DBC)以及直接鍍銅基板(Direct Plate Copper, DPC)至少其中之一。底基板12於一表面120具有二導電接點122a、122b,用以分別與半導體晶片20之二電極電性相接。舉例而言,陶瓷基板14之種類亦可為低溫共燒多層陶瓷基板以及高溫共燒多層陶瓷基板至少其中之一。特別說明的是,相較於習知技術選用樹脂支架或金屬基板,本發明選用陶瓷基板具有熱膨脹係數相近於半導體材料、熱導率高、絕緣電阻高以及可靠度佳等優異材料特性。
接續上述說明,陶瓷基板14具有一第一表面140、一相反側之第二表面142以及至少一開孔144,且陶瓷基板14以第一表面140朝向底基板12設置於底基板12之表面120。開孔144貫穿陶瓷基板14之第一表面140形成一第一孔徑141,以及貫穿第二表面142形成一第二孔徑143,以於底基板12之表面120定義一晶片承載區,使二導電接點122a、122b容置於開孔144。開孔144具有一垂直部145a以及一漸變部145b。其中,垂直部145a設置於第一表面140側,且垂直部145a之內徑等於開孔144於第一表面140之第一孔徑141;漸變部145b設置於第二表面142側,且漸變部145b之內徑由第一孔徑141逐漸增大為開孔144於第二表面142之第二孔徑143。較佳者,開孔144之漸變部145b其內側表面經過粗糙化處理,例如透過噴砂製程。可以理解的是,漸變部145b之側壁亦可因光學設計需求而為一平面或曲面,該領域中具有通常知識者當可自行修飾變換。
於一實施例中,第一孔徑141或第二孔徑143之截面可為圓形(如圖2所示)、橢圓形、矩形以及多邊形至少其中之一。可視半導體晶片20之晶片尺寸、封裝製程限制或封裝件機構設計等不同之需求目的,而針對第一孔徑141或第二孔徑143之截面形狀進一步修飾其設計。舉例而言,請參照圖3,第一孔徑141之截面可設計為一矩形及其各頂點處分別設置一凹部之幾何形狀,致使半導體晶片20在後續封裝的固晶製程(Die bonding)中更容易擺置於晶片承載區上,提升其生產良率。較佳者,可透過黑漆印刷製作一定位圖案146於第二表面142上,以方便於封裝製程中之對位及定位步驟。
請參照圖4,本發明之一實施例之一半導體晶片封裝件1,其是透過共晶鍵合(Eutectic bonding)或覆晶接合(Flip chip bonding)等習知接合技術,將一半導體晶片20設置於晶片承載區,並與底基板12一表面120上之二導電接點122a、122b分別電性相接。其中,晶片承載區如同前述封裝基板10中定義,於此不再贅述。半導體晶片20可為一發光二極體、聚光型太陽能晶片、電晶體、積體電路晶片、主動元件、保護元件或被動元件。接續地,提供一封裝體30用以包覆半導體晶片20以及導電接點122a、122b,以組成一半導體晶片封裝件1。封裝體30所用之材料包含環氧樹酯(Epoxy)、矽膠(Silicone)、以及複合型(Hybrid)封裝膠材至少其中之一。於一實施例中,半導體晶片20為一發光二極體,則封裝體30可添加一光波長轉換物質,例如一螢光粉(Phosphor),用以搭配發光二極體之工作波長,於半導體晶片封裝件1運作時,混成並發出一白光。可以理解的是,陶瓷基板14之漸變部145b可提升出光效率,此外,漸變部145b之粗糙化內側表面具有混光以及均勻化光線的效果。
請一併參照圖5以及圖6a至6e,其所示為本發明之一實施例之一種具有開孔之陶瓷基板之製造方法。首先,提供一陶瓷基板14(S41),其具有一第一表面140以及相對之一第二表面142,如圖6a所示。其次,形成預開孔之一溝槽50於陶瓷基板14之第一表面140(S42),如圖6b所示。舉例而言,可利用雷射切割形成溝槽50。接著,形成一圖案化保護層40於陶瓷基板14之第二表面142(S43),如圖6c所示,其中圖案化保護層40可透過顯影蝕刻技術(Photolithography)、塗佈印刷或遮罩壓合等習知技術,其為所屬技術領域中具有通常知識者所能理解及實現者。最後,噴砂衝擊陶瓷基板14之第二表面142,以形成一開孔144(S43),並與第一表面140之溝槽50相接,如圖6d所示,其中,開孔144貫穿陶瓷基板14之第一表面140以及第二表面142。開孔144具有一垂直部145a以及一漸變部145b。其中,垂直部145a設置於第一表面140側,且垂直部145a之內徑等於開孔144於第一表面140之第一孔徑141;漸變部145b設置於第二表面142側,且漸變部145b之內徑由第一孔徑141逐漸增大為開孔144於第二表面142之第二孔徑143。
於一實施例中,噴砂步驟所用砂珠為碳化矽(SiC)材質,且其粒徑均值大約為80微米(μm)。同時,噴砂步驟包含一第一噴砂處理以及一第二噴砂處理,且第一噴砂處理以及第二噴砂處理之衝擊力道相異,舉例而言:第一噴砂處理使用大約2~5 Kg/cm^2之衝擊力道,而第二噴砂處理使用大約1 Kg/cm^2之衝擊力道以細修孔徑。可以理解的是,開孔144之漸變部145b係由噴砂步驟所實現,將使漸變部145b其表面粗糙化。
於其他實施例中,較佳者,可清潔陶瓷基板14,舉例而言可為一刷磨或水洗步驟,以去除陶瓷基板14表面髒汙或其雷射切割殘渣。較佳者,可製作一定位圖案146於第二表面142上,舉例而言可透過雷射雕刻、染料塗佈或網版印刷等習知技術,其為所屬技術領域中具有通常知識者所能理解及實現者。較佳者,可在移除圖案化保護層40步驟前,先檢驗量測噴砂後之開孔尺寸或形狀,以確認開孔尺寸或形狀是否符合生產管制規格。若發現孔徑過小之不良品,可返回噴砂步驟再次加工生產,相較於習知技術使用模具一次性燒結陶瓷基板之製造方法,本發明具有可重工生產以提升良率以及無庸報廢生產中不良品以降低生產成本之優點。較佳者,可移除圖案化保護層40,舉例而言可以直接撕除、透過蝕刻或鹼性清洗步驟移除之,如圖6e所示。
綜合上述,本發明之陶瓷基板、封裝基板、半導體晶片封裝件及其製造方法,透過預開孔之溝槽、圖案化保護層以及噴砂製程,可針對不同陶瓷基板孔徑尺寸或形狀之設計,較精確地進行加工生產,再將陶瓷基板設置於底基板之上,以形成一封裝基板,用以封裝一半導體晶片,同時選用陶瓷材料具有熱膨脹係數相近於半導體材料、熱導率高、絕緣電阻高以及可靠度佳等優異特性。對照於習知技術使用模具一次性燒結封裝基板之製造方法,本發明具有可重工生產以提升良率以及無庸報廢生產中不良品以降低生產成本之優點,而不需要修改模具設計或重新製作一套生產模具;針對具有不同開孔設計之陶瓷基板,可以共用同一款底基板,以節省生產成本,同時提高陶瓷基板孔徑尺寸或形狀之精確度。
以上所述之實施例僅是為說明本發明之技術思想及特點,其目的在使熟習此項技藝之人士能夠瞭解本發明之內容並據以實施,當不能以之限定本發明之專利範圍,即大凡依本發明所揭示之精神所作之均等變化或修飾,仍應涵蓋在本發明之專利範圍內。
1‧‧‧半導體晶片封裝件
10‧‧‧封裝基板
12‧‧‧底基板
120‧‧‧表面
122a, 122b‧‧‧導電接點
14‧‧‧陶瓷基板
140‧‧‧第一表面
141‧‧‧第一孔徑
142‧‧‧第二表面
143‧‧‧第二孔徑
144‧‧‧開孔
145a‧‧‧垂直部
145b‧‧‧漸變部
146‧‧‧定位圖案
20‧‧‧半導體晶片
30‧‧‧封裝體
40‧‧‧保護層
50‧‧‧溝槽
10‧‧‧封裝基板
12‧‧‧底基板
120‧‧‧表面
122a, 122b‧‧‧導電接點
14‧‧‧陶瓷基板
140‧‧‧第一表面
141‧‧‧第一孔徑
142‧‧‧第二表面
143‧‧‧第二孔徑
144‧‧‧開孔
145a‧‧‧垂直部
145b‧‧‧漸變部
146‧‧‧定位圖案
20‧‧‧半導體晶片
30‧‧‧封裝體
40‧‧‧保護層
50‧‧‧溝槽
圖1a為一剖面示意圖,顯示本發明一實施例之封裝基板剖面圖。 圖1b為一剖面分解示意圖,顯示本發明一實施例之封裝基板分解圖。 圖2為一俯視示意圖,顯示本發明一實施例之陶瓷基板俯視圖。 圖3為一俯視示意圖,顯示本發明一實施例之陶瓷基板俯視圖。 圖4為一剖面示意圖,顯示本發明一實施例之半導體晶片封裝件剖面圖。 圖5為一流程圖,顯示本發明一實施例之陶瓷基板之製造方法。 圖6a至圖6e為一示意圖,顯示本發明一實施例之陶瓷基板之製造步驟。
14‧‧‧陶瓷基板
140‧‧‧第一表面
141‧‧‧第一孔徑
142‧‧‧第二表面
143‧‧‧第二孔徑
144‧‧‧開孔
145a‧‧‧垂直部
145b‧‧‧漸變部
Claims (21)
- 一種封裝基板,用以封裝一半導體晶片,該封裝基板包含: 一底基板,其於一表面具有一導電接點;以及 一陶瓷基板,其具有一第一表面、一第二表面以及至少一開孔,該陶瓷基板以該第一表面朝向該底基板設置於該底基板之該表面,其中,該開孔貫穿該陶瓷基板之該第一表面以及該第二表面,以於該底基板之該表面定義一晶片承載區,使該導電接點容置於該開孔,且該開孔具有一垂直部以及一漸變部;其中該垂直部設置於該第一表面側,且該垂直部之內徑等於該開孔於該第一表面之一第一孔徑;該漸變部設置於該第二表面側,且該漸變部之內徑由該第一孔徑逐漸增大為該開孔於該第二表面之一第二孔徑。
- 如請求項1所述之封裝基板,其中該漸變部之一側壁為一平面或曲面。
- 如請求項1所述之封裝基板,其中該漸變部之一側壁之表面經粗糙化處理。
- 如請求項1所述之封裝基板,其中該開孔於該第一表面或該第二表面之截面為一矩形,且該矩形之至少一頂點處設置一凹部。
- 如請求項1所述之封裝基板,其中該底基板之材質包含一陶瓷、高分子聚合物或金屬。
- 一種陶瓷基板,其用以與一底基板組成一用以封裝一半導體晶片之封裝基板,該底基板之一表面具有一導電接點,該陶瓷基板包含: 一第一表面、一第二表面以及至少一開孔,該陶瓷基板以該第一表面朝向該底基板設置於該底基板之該表面,其中,該開孔貫穿該陶瓷基板之該第一表面以及該第二表面,以於該底基板之該表面定義一晶片承載區,使該導電接點容置於該開孔,且該開孔具有一垂直部以及一漸變部;其中該垂直部設置於該第一表面側,且該垂直部之內徑等於該開孔於該第一表面之一第一孔徑;該漸變部設置於該第二表面側,且該漸變部之內徑由該第一孔徑逐漸增大為該開孔於該第二表面之一第二孔徑。
- 如請求項6所述之陶瓷基板,其中該漸變部之一側壁為一平面或曲面。
- 如請求項6所述之陶瓷基板,其中該漸變部之一側壁之表面經粗糙化處理。
- 如請求項6所述之陶瓷基板,其中該開孔於該第一表面或該第二表面之截面為一矩形,且該矩形之至少一頂點處設置一凹部。
- 如請求項6所述之陶瓷基板,其中該半導體晶片包括發光二極體、聚光型太陽能晶片、電晶體、積體電路晶片、主動元件、保護元件或被動元件。
- 一種半導體晶片封裝件,包含: 一封裝基板,其包含: 一底基板,其於一表面具有一導電接點;以及 一陶瓷基板,其具有一第一表面、一第二表面以及至少一開孔,該陶瓷基板以該第一表面朝向該底基板設置於該底基板之該表面,其中,該開孔貫穿該陶瓷基板之該第一表面以及該第二表面,以於該底基板之該表面定義一晶片承載區,使該導電接點容置於該開孔,且該開孔具有一垂直部以及一漸變部;其中該垂直部設置於該第一表面側,且該垂直部之內徑等於該開孔於該第一表面之一第一孔徑;該漸變部設置於該第二表面側,且該漸變部之內徑由該第一孔徑逐漸增大為該開孔於該第二表面之一第二孔徑; 一半導體晶片,其設置於該晶片承載區,並與該導電接點電性連接;以及 一封裝體,其設置於該開孔,以包覆該半導體晶片以及該導電接點。
- 如請求項11所述之半導體晶片封裝件,其中該漸變部之一側壁為一平面或曲面。
- 如請求項11所述之半導體晶片封裝件,其中該漸變部之一側壁之表面經粗糙化處理。
- 如請求項11所述之半導體晶片封裝件,其中該開孔於該第一表面或該第二表面之截面為一矩形,且該矩形之至少一頂點位置設置一凹部。
- 如請求項11所述之半導體晶片封裝件,其中該底基板之材質包含一陶瓷、高分子聚合物或金屬。
- 一種具有開孔之陶瓷基板之製造方法,包含: 提供一陶瓷基板,其具有一第一表面以及相對之一第二表面; 形成預開孔之一溝槽於該陶瓷基板之該第一表面; 形成一圖案化保護層於該陶瓷基板之該第二表面;以及 噴砂衝擊該陶瓷基板之該第二表面,以形成一開孔,其中,該開孔貫穿該陶瓷基板之該第一表面以及該第二表面,且該開孔具有一垂直部以及一漸變部;其中該垂直部形成於該第一表面側,且該垂直部之內徑等於該開孔於該第一表面之一第一孔徑;該漸變部形成於該第二表面側,且該漸變部之內徑由該第一孔徑逐漸增大為該開孔於該第二表面之一第二孔徑。
- 如請求項16所述之具有開孔之陶瓷基板之製造方法,其中該噴砂步驟包含一第一噴砂處理以及一第二噴砂處理,且該第一噴砂處理以及該第二噴砂處理之衝擊力道相異。
- 如請求項16所述之具有開孔之陶瓷基板之製造方法,其中該溝槽是以雷射預切割該陶瓷基板之該第一表面所形成。
- 如請求項16所述之具有開孔之陶瓷基板之製造方法,其中該溝槽之位置對應於該開孔於該第一表面之該第一孔徑。
- 如請求項16所述之具有開孔之陶瓷基板之製造方法,更包含: 移除該圖案化保護層
- 如請求項16所述之具有開孔之陶瓷基板之製造方法,其中該開孔於該第一表面或該第二表面之截面為一矩形,且該矩形之至少一頂點位置設置一凹部。
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CN201510442011.XA CN105304576A (zh) | 2014-07-24 | 2015-07-24 | 陶瓷基板、封装基板、半导体芯片封装件及其制造方法 |
US14/808,656 US9437549B2 (en) | 2014-07-24 | 2015-07-24 | Method for manufacturing ceramic substrate |
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WO2018062101A1 (ja) * | 2016-09-28 | 2018-04-05 | 新東工業株式会社 | 孔あけ加工方法、レジスト層及び繊維強化プラスチック |
CN109346415B (zh) * | 2018-09-20 | 2020-04-28 | 江苏长电科技股份有限公司 | 封装结构选择性包封的封装方法及封装设备 |
CN109346534B (zh) * | 2018-11-23 | 2024-05-07 | 中国电子科技集团公司第四十四研究所 | 一种陶瓷管壳结构及其封装结构 |
KR20210077372A (ko) * | 2019-12-17 | 2021-06-25 | 삼성전기주식회사 | 전자부품 내장기판 |
JP7424821B2 (ja) * | 2019-12-25 | 2024-01-30 | 京セラ株式会社 | 電子部品搭載用パッケージ、電子装置および電子モジュール |
DE102022101910A1 (de) | 2022-01-27 | 2023-07-27 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Optoelektronisches halbleiterbauteil, konversionselement und herstellungsverfahren |
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TW201021636A (en) * | 2008-09-29 | 2010-06-01 | Ngk Spark Plug Co | Wiring substrate with reinforcement |
TW201246488A (en) * | 2011-05-13 | 2012-11-16 | Xintec Inc | Chip package and manufacturing method thereof |
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ITTO20011019A1 (it) * | 2001-10-25 | 2003-04-28 | Olivetti I Jet | Procedimento perfezionato per la costruzione di un condotto di alimentazione per una testina di stampa a getto di inchiostro. |
TWI245436B (en) * | 2003-10-30 | 2005-12-11 | Kyocera Corp | Package for housing light-emitting element, light-emitting apparatus and illumination apparatus |
DE102004014207A1 (de) * | 2004-03-23 | 2005-10-13 | Osram Opto Semiconductors Gmbh | Optoelektronisches Bauteil mit mehrteiligem Gehäusekörper |
JP2005294051A (ja) * | 2004-03-31 | 2005-10-20 | Fujitsu Hitachi Plasma Display Ltd | プラズマディスプレイパネルの製造方法 |
EP1953836B1 (en) * | 2005-11-21 | 2016-01-13 | Nippon Carbide Industries Co., Inc. | Light reflecting material, package for light emitting element accommodation, light emitting device and process for producing package for light emitting element accommodation |
CN101409997A (zh) * | 2007-10-12 | 2009-04-15 | 台达电子工业股份有限公司 | 共烧陶瓷模块 |
KR20130051708A (ko) * | 2011-11-10 | 2013-05-21 | 삼성전기주식회사 | 반도체 패키지 및 그 제조 방법 |
US20130181351A1 (en) * | 2012-01-12 | 2013-07-18 | King Dragon International Inc. | Semiconductor Device Package with Slanting Structures |
KR20130096094A (ko) * | 2012-02-21 | 2013-08-29 | 엘지이노텍 주식회사 | 발광소자 패키지, 발광 소자 패키지 제조방법 및 이를 구비한 조명 시스템 |
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TW201021636A (en) * | 2008-09-29 | 2010-06-01 | Ngk Spark Plug Co | Wiring substrate with reinforcement |
TW201246488A (en) * | 2011-05-13 | 2012-11-16 | Xintec Inc | Chip package and manufacturing method thereof |
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CN105304576A (zh) | 2016-02-03 |
TW201605000A (zh) | 2016-02-01 |
US20160049372A1 (en) | 2016-02-18 |
US9437549B2 (en) | 2016-09-06 |
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