TWI506681B - 製造半導體裝置之方法 - Google Patents

製造半導體裝置之方法 Download PDF

Info

Publication number
TWI506681B
TWI506681B TW099128941A TW99128941A TWI506681B TW I506681 B TWI506681 B TW I506681B TW 099128941 A TW099128941 A TW 099128941A TW 99128941 A TW99128941 A TW 99128941A TW I506681 B TWI506681 B TW I506681B
Authority
TW
Taiwan
Prior art keywords
layer
semiconductor
pattern
metal
semiconductor layer
Prior art date
Application number
TW099128941A
Other languages
English (en)
Chinese (zh)
Other versions
TW201137954A (en
Inventor
張鍾光
文永俊
金德南
鄭榮鐘
Original Assignee
三星電子股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三星電子股份有限公司 filed Critical 三星電子股份有限公司
Publication of TW201137954A publication Critical patent/TW201137954A/zh
Application granted granted Critical
Publication of TWI506681B publication Critical patent/TWI506681B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172—Manufacturing their gate conductors
    • H10D84/0177—Manufacturing their gate conductors the gate conductors having different materials or different implants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/40—Crystalline structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01354—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon passivation or protection of the electrode, e.g. using re-oxidation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/681—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
    • H10D64/685—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being perpendicular to the channel plane
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/691—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator comprising metallic compounds, e.g. metal oxides or metal silicates 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0181—Manufacturing their gate insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/26—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
    • H10P50/264—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means
    • H10P50/266—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only
    • H10P50/267—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only using plasmas
    • H10P50/268—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only using plasmas of silicon-containing layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/26—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
    • H10P50/264—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means
    • H10P50/266—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only
    • H10P50/269—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only pre- or post-treatments, e.g. anti-corrosion processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/60—Wet etching
    • H10P50/64—Wet etching of semiconductor materials
    • H10P50/642—Chemical etching
    • H10P50/644—Anisotropic liquid etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/667—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/667—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers
    • H10D64/669—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers the conductor further comprising additional layers of alloy material, compound material or organic material, e.g. TaN/TiAlN

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
TW099128941A 2009-10-19 2010-08-27 製造半導體裝置之方法 TWI506681B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020090099364A KR20110042614A (ko) 2009-10-19 2009-10-19 반도체 소자 및 그 형성방법

Publications (2)

Publication Number Publication Date
TW201137954A TW201137954A (en) 2011-11-01
TWI506681B true TWI506681B (zh) 2015-11-01

Family

ID=43879621

Family Applications (1)

Application Number Title Priority Date Filing Date
TW099128941A TWI506681B (zh) 2009-10-19 2010-08-27 製造半導體裝置之方法

Country Status (4)

Country Link
US (3) US8466023B2 (https=)
JP (1) JP5851089B2 (https=)
KR (1) KR20110042614A (https=)
TW (1) TWI506681B (https=)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2717214B2 (ja) 1988-09-06 1998-02-18 清水建設株式会社 トラベラーパイリングシステムにおける杭頭構造および杭頭処理方法
KR20110042614A (ko) 2009-10-19 2011-04-27 삼성전자주식회사 반도체 소자 및 그 형성방법
JP5933953B2 (ja) * 2011-10-06 2016-06-15 キヤノン株式会社 半導体装置の製造方法
US8803249B2 (en) * 2012-08-09 2014-08-12 Taiwan Semiconductor Manufacturing Co., Ltd. Profile pre-shaping for replacement poly gate interlayer dielectric
KR102167625B1 (ko) * 2013-10-24 2020-10-19 삼성전자주식회사 반도체 장치 및 그 제조 방법
CN106163721B (zh) 2014-02-03 2021-10-15 豪梅特航空航天有限公司 电阻焊接紧固件、装置和方法
MX2017004851A (es) 2014-10-13 2017-09-15 Arconic Inc Lamina de soldadura fuerte.
US10384296B2 (en) 2014-12-15 2019-08-20 Arconic Inc. Resistance welding fastener, apparatus and methods for joining similar and dissimilar materials
KR102333699B1 (ko) 2014-12-19 2021-12-02 에스케이하이닉스 주식회사 고유전 금속 게이트스택의 에칭 방법
US10593034B2 (en) 2016-03-25 2020-03-17 Arconic Inc. Resistance welding fasteners, apparatus and methods for joining dissimilar materials and assessing joints made thereby
CN109585293B (zh) * 2017-09-29 2021-12-24 台湾积体电路制造股份有限公司 切割金属工艺中的基脚去除

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW466609B (en) * 2000-08-17 2001-12-01 United Microelectronics Corp Manufacturing method and structure for polycide gate
US20060011949A1 (en) * 2004-07-18 2006-01-19 Chih-Wei Yang Metal-gate cmos device and fabrication method of making same
TWI299523B (en) * 2001-10-31 2008-08-01 Infineon Technologies Ag Verfahren zur Herstellung eines Gate-Schichtenstapels fur ei-ne integrierte Schaltungsanordnung
JP2009094106A (ja) * 2007-10-03 2009-04-30 Toshiba Corp 半導体装置の製造方法

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05175171A (ja) * 1991-12-20 1993-07-13 Nippon Steel Corp ドライエッチング方法
GB2286723B (en) * 1992-12-11 1997-01-08 Intel Corp A mos transistor having a composite gate electrode and method of fabrication
US5434093A (en) * 1994-08-10 1995-07-18 Intel Corporation Inverted spacer transistor
US6025232A (en) * 1997-11-12 2000-02-15 Micron Technology, Inc. Methods of forming field effect transistors and related field effect transistor constructions
US6344397B1 (en) * 2000-01-05 2002-02-05 Advanced Micro Devices, Inc. Semiconductor device having a gate electrode with enhanced electrical characteristics
US6316323B1 (en) * 2000-03-21 2001-11-13 United Microelectronics Corp. Method for forming bridge free silicide by reverse spacer
US6551941B2 (en) * 2001-02-22 2003-04-22 Applied Materials, Inc. Method of forming a notched silicon-containing gate structure
US6830975B2 (en) * 2002-01-31 2004-12-14 Micron Technology, Inc. Method of forming field effect transistor comprising at least one of a conductive metal or metal compound in electrical connection with transistor gate semiconductor material
EP1498955A4 (en) * 2002-04-17 2008-02-20 Matsushita Electric Industrial Co Ltd SEMICONDUCTOR COMPONENT AND METHOD FOR THE PRODUCTION THEREOF
TW550686B (en) * 2002-08-15 2003-09-01 Nanya Technology Corp Floating gate and method thereof
US6806534B2 (en) * 2003-01-14 2004-10-19 International Business Machines Corporation Damascene method for improved MOS transistor
JP2005175171A (ja) 2003-12-10 2005-06-30 Fujikura Ltd Ｑスイッチ光ファイバレーザ
JP4580657B2 (ja) * 2004-01-30 2010-11-17 株式会社東芝 半導体装置およびその製造方法
US7112479B2 (en) * 2004-08-27 2006-09-26 Micron Technology, Inc. Methods of forming gatelines and transistor devices
US7208424B2 (en) * 2004-09-17 2007-04-24 Freescale Semiconductor, Inc. Method of forming a semiconductor device having a metal layer
KR100602098B1 (ko) * 2004-12-30 2006-07-19 동부일렉트로닉스 주식회사 채널 길이를 줄일 수 있는 트랜지스터 형성 방법
KR100645196B1 (ko) * 2005-03-10 2006-11-10 주식회사 하이닉스반도체 플래시 메모리 소자의 게이트 형성 방법
US7361561B2 (en) * 2005-06-24 2008-04-22 Freescale Semiconductor, Inc. Method of making a metal gate semiconductor device
JP2007123890A (ja) 2005-10-28 2007-05-17 Interuniv Micro Electronica Centrum Vzw 改良型ゲートスタックのパターン化用プラズマ
EP1780779A3 (en) * 2005-10-28 2008-06-11 Interuniversitair Microelektronica Centrum ( Imec) A plasma for patterning advanced gate stacks
US20070202700A1 (en) 2006-02-27 2007-08-30 Applied Materials, Inc. Etch methods to form anisotropic features for high aspect ratio applications
JP5015533B2 (ja) * 2006-09-22 2012-08-29 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US7880241B2 (en) * 2007-02-23 2011-02-01 International Business Machines Corporation Low-temperature electrically activated gate electrode and method of fabricating same
KR100868768B1 (ko) 2007-02-28 2008-11-13 삼성전자주식회사 Ｃｍｏｓ 반도체 소자 및 그 제조방법
US20090212332A1 (en) * 2008-02-21 2009-08-27 International Business Machines Corporation Field effect transistor with reduced overlap capacitance
KR20110042614A (ko) 2009-10-19 2011-04-27 삼성전자주식회사 반도체 소자 및 그 형성방법

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW466609B (en) * 2000-08-17 2001-12-01 United Microelectronics Corp Manufacturing method and structure for polycide gate
TWI299523B (en) * 2001-10-31 2008-08-01 Infineon Technologies Ag Verfahren zur Herstellung eines Gate-Schichtenstapels fur ei-ne integrierte Schaltungsanordnung
US20060011949A1 (en) * 2004-07-18 2006-01-19 Chih-Wei Yang Metal-gate cmos device and fabrication method of making same
JP2009094106A (ja) * 2007-10-03 2009-04-30 Toshiba Corp 半導体装置の製造方法

Also Published As

Publication number Publication date
US20130270569A1 (en) 2013-10-17
US8466023B2 (en) 2013-06-18
US20110092040A1 (en) 2011-04-21
JP5851089B2 (ja) 2016-02-03
US9608054B2 (en) 2017-03-28
US20160056259A1 (en) 2016-02-25
TW201137954A (en) 2011-11-01
KR20110042614A (ko) 2011-04-27
JP2011086933A (ja) 2011-04-28
US9419072B2 (en) 2016-08-16

Similar Documents

Publication Publication Date Title
TWI506681B (zh) 製造半導體裝置之方法
JP5492842B2 (ja) 半導体素子
JP4398467B2 (ja) 半導体装置の製造方法
CN110610896B (zh) 负斜率隔离结构
CN111106000B (zh) 形成半导体器件的方法
KR102334898B1 (ko) 금속 게이트 커팅 공정에서의 잔류물 제거
CN106169500B (zh) 半导体器件结构的结构和形成方法
TWI786454B (zh) 半導體裝置的形成方法
US20050009281A1 (en) Method of forming gate in semiconductor device
JP4411907B2 (ja) 半導体装置の製造方法
JP5436362B2 (ja) 半導体装置
CN100568468C (zh) 半导体元件及其制造方法
KR100580587B1 (ko) 반도체 장치의 제조 방법
JP5210915B2 (ja) 半導体装置の製造方法
JP2009094106A (ja) 半導体装置の製造方法
KR101062835B1 (ko) 이중 하드마스크를 이용한 반도체 소자의 게이트전극 제조방법
US10056455B1 (en) Semiconductor device and method of fabricating the same
KR100529873B1 (ko) 반도체소자의 제조방법
KR101599840B1 (ko) 반도체 소자의 형성방법
CN104465378A (zh) 半导体器件的制作方法
JP2006019551A (ja) 半導体装置およびその製造方法
CN114975262A (zh) 半导体装置
CN117059574A (zh) 栅极隔离区域和鳍隔离区域及其形成方法
KR20040059972A (ko) 반도체 소자의 제조방법
KR20070036949A (ko) 반도체 소자의 제조방법