TWI476964B - 光電半導體裝置 - Google Patents

光電半導體裝置 Download PDF

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Publication number
TWI476964B
TWI476964B TW100121173A TW100121173A TWI476964B TW I476964 B TWI476964 B TW I476964B TW 100121173 A TW100121173 A TW 100121173A TW 100121173 A TW100121173 A TW 100121173A TW I476964 B TWI476964 B TW I476964B
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Taiwan
Prior art keywords
top surface
carrier
semiconductor device
cover
reflective
Prior art date
Application number
TW100121173A
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English (en)
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TW201208149A (en
Inventor
Johann Ramchen
David Racz
Hans-Christoph Gallmeier
Stefan Grotsch
Simon Jerebic
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Osram Opto Semiconductors Gmbh
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Publication of TW201208149A publication Critical patent/TW201208149A/zh
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Publication of TWI476964B publication Critical patent/TWI476964B/zh

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    • H01L33/46—Reflective coating, e.g. dielectric Bragg reflector
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Description

光電半導體裝置
本發明係提供一種光電半導體裝置。
美國專利文件US 2006/0138621 A1中係提出一種光電元件以及基於該光電元件之模組。
本發明之其中一個目的係達成一種具有高光耦合輸出效率的光電半導體裝置。
根據光電半導體裝置之至少一實施例，光電半導體裝置包含載體，載體具有載體頂面。載體係為例如電路板或印刷電路板，用以短路的PCB(printed circuit board)。電性導體軌跡係嵌合於載體的基本材料上，載體的基本材料可為例如像是氧化鋁或氮化鋁的陶瓷。載體可同樣地為金屬或金屬芯電路板。此外，載體可實施為用以短路的所謂的四面扁平無引腳封裝(Quad-Flat No-Leads Packages,QFN)。
根據光電半導體裝置之至少一實施例，光電半導體裝置包含嵌合於載體頂面上的複數個光電半導體晶片。半導體晶片具有遠離該載體頂面之輻射主要表面。產生於半導體晶片中之電磁輻射，例如可見光，係經由輻射主要表面而多數地或完全地離開半導體晶片。
半導體晶片特定地係為基於III-V族半導體材料的半導體晶片。例如，半導體晶片係為基於例如Al n In 1- n Ga m N 的氮化物化合物半導體材料或者基於例如Al n In 1- n Ga m P的磷化物化合物半導體材料，其中，在每一例子中，0≦n≦1，0≦m≦1以及n+m≦1。在此例子中，該材料可包含一種或複數種摻雜物以及額外的成分。然而，為簡化說明，僅標示出晶格的主要成分(crystal lattice)，也就是鋁(Al)、鎵(Ga)、銦(In)、氮(N)或磷(P)，即使這些成分可部分地由小量的其它物質替換及/或補充。較佳地，光電半導體晶片係設計成在半導體裝置操作期間產生可見輻射，例如藍光、綠光、黃光及/或紅光的頻譜範圍。產生的輻射係作用於包含至少一量子井結構及/或至少一pn接面的至少一主動區內。
根據光電半導體裝置之至少一實施例，係經由至少一銲線與半導體晶片產生電性接觸，較佳地經由精確地一銲線。銲線係連接至輻射主要表面上之半導體晶片。特別是，銲線連接載體表面上之導體軌跡至半導體晶片之輻射主要表面上之電流擴散結構。半導體晶片之電性接觸較佳地設置於半導體晶片之相對的主要表面上。
根據光電半導體裝置之至少一實施例，光電半導體裝置具有至少一蓋體，係嵌合於半導體晶片之輻射主要表面上。蓋體可被限制於輻射主要表面上，或者朝橫向突出超過半導體晶片，也就是朝平行輻射主要表面的方向。再者，蓋體朝遠離該載體頂面且垂直於該輻射主要表面的方向突出超過該銲線。也就是說，如圖式投影至垂直輻射主要表面的平面上，銲線可完全地躺在載體頂面以及蓋體中遠離載體頂面的本體頂面之間。
根據光電半導體裝置之至少一實施例，光電半導體裝置具有至少一反射封裝化合物。封裝化合物朝橫向於適當位置或完全地圍繞半導體晶片。如圖所示，自載體頂面起，封裝化合物以例如至多15μm或至多5μm的公差延伸至少直到輻射主要表面為止。較佳地，反射封裝化合物係朝橫向至少於適當位置立即地直接與半導體晶片接觸。
根據光電半導體裝置之至少一實施例，銲線係被反射封裝化合物完全地覆蓋或者被反射封裝化合物連同蓋體完全地覆蓋。換句話說，銲線在朝遠離載體頂面的方向並未自反射封裝化合物突出或者並未自反射封裝化合物連同蓋體突出。特別是，銲線係無暴露之處。也就是在朝垂直且遠離載體頂面的方向，銲線的每一部分係接著反射封裝化合物的材料及/或蓋體材料。
根據光電半導體裝置之至少一實施例，光電半導體裝置包含載體，其具有載體頂面，以及至少一光電半導體晶片，係嵌合於該載體頂面上且具有遠離該載體頂面之輻射主要表面。此外，半導體裝置包含至少一銲線，藉此經由銲線與半導體晶片產生電性接觸，以及至少一蓋體，係嵌合於輻射主要表面上且朝遠離該載體頂面且垂直該輻射主要表面之方向突出超過該銲線。至少一反射封裝化合物朝橫向圍繞該半導體晶片，且如圖所示自該載體頂面延伸至少直到該半導體晶片之輻射主要表面為止。在此例子中，銲線係被該反射封裝化合物完全地覆蓋或者被該反射封裝化合物連同蓋體完全地覆蓋。
藉由此種反射封裝化合物可獲得輻射發射(radiation emission)，特別是專門在半導體晶片之輻射主要表面上可獲得。此外，可減少或避免銲線上的遮蔽效應(shading effect)或不需要的反射，使得半導體裝置的輻射耦合輸出(coupling-out)效率可因此增加。
根據光電半導體裝置之至少一實施例，銲線係完全地埋入於該反射封裝化合物中。特別是，該反射封裝化合物以完全緊閉(positively locking)的方式圍繞銲線，並與銲線直接接觸。換句話說，銲線係直接被例如反射封裝化合物所封裝。完全地埋入可能意指銲線首先僅與反射封裝化合物接觸及/或第二，與電性連接區域接觸，銲線係電性導電連接至電性連接區域，而且銲線係接合至電性連接區域，及/或第三，與電性連接裝置接觸，銲線係藉由電性連接裝置固定至連接區域。
根據光電半導體裝置之至少一實施例，反射封裝化合物自該載體頂面延伸直到蓋體遠離該載體頂面之本體頂面為止。特別是，反射封裝化合物朝遠離載體頂面的方向而終止於蓋體的橫向邊界區域，與本體頂面齊平或在製造之公差範圍內。例如，製造公差係至多10μm。
根據光電半導體裝置之至少一實施例，蓋體之本體頂面係設有抗黏著層。抗黏著層係實施為用於該反射封裝化合物之非潮濕材料(non-wetting)。抗黏著層係由例如聚鹵代烯烴(polyhaloolefin)組成或者包含聚鹵代烯烴，特別是例如聚四氟乙烯(polytetrafluoroethylene)的含氟化合物。較佳地，抗黏著層係對半導體晶片中直接產生的輻射為可穿透的及/或對藉由波長轉換而在蓋體中產生的輻射為可穿透的。
根據光電半導體裝置之至少一實施例，反射封裝本體中遠離載體頂面的封裝頂面係延伸而與蓋體之本體頂面齊平及/或平行。關於齊平及/或平行的公差係為例如在垂直於本體頂面的方向上至多30μm或者至多10μm。在製造公差的範圍內，封裝頂面可延伸平行於載體頂面。
根據光電半導體裝置之至少一實施例，如平面圖所示，載體頂面係完全地被反射封裝化合物連同蓋體所覆蓋。換句話說，載體頂面的每一部分，於垂直且遠離載體頂面的方向，係接著封裝化合物及/或蓋體材料。特別是，載體頂面之每一部分係接著封裝化合物材料，或者接著蓋體材料。
根據光電半導體裝置之至少一實施例，半導體晶片的輻射主要表面具有電性連接區域。電性連接區域可為所謂的連接墊。特別是，在連接區域中，銲線係電性且機械性地連接至半導體晶片。較佳地，半導體晶片於輻射主要表面上具有精確的一個電性連接區域。從連接區域開始，用於電流分佈的結構可設置於輻射主要表面上，例如狹窄的、金屬製的長條。
根據光電半導體裝置之至少一實施例，電性連接區域於輻射主要表面上並無蓋體。換句話說，連接區域於遠離載體頂面之方向上並無以蓋體材料實施。連接區域較佳地未接觸蓋體。
根據光電半導體裝置之至少一實施例，於輻射主要表面上，電性連接區域係完全地或部分地被反射封裝化合物覆蓋。因此，在垂直且遠離輻射主要表面的方向上，連接區域的每一部分係以反射封裝化合物的材料完成。
根據光電半導體裝置之至少一實施例，銲線以至多20°或至多10°的公差延伸平行於輻射主要表面及/或平行於載體頂面及/或平行於輻射主要表面處之電性連接區域中之蓋體的本體頂面。尤其較佳的是，銲線亦延伸平行於電性連接區域周圍之鄰近區域中的輻射主要表面。例如，鄰近區域具有對應至少兩倍或至少五倍輻射主要表面上之電性連接區域的平均直徑的直徑。
根據光電半導體裝置之至少一實施例，蓋體係塑形為小型平板，且被限定於該輻射主要表面。換句話說，蓋體的橫向延伸程度超出其高度。蓋體被限定於該輻射主要表面係意指蓋體未朝橫向以例如至多50μm或至多15μm的公差突出超過輻射主要表面。塑形為小型平板可進一步意指蓋體的兩個主要表面係在製造公差的範圍內彼此平行。
根據光電半導體裝置之至少一實施例，該蓋體具有介於50μm至250μm之間的厚度，包括50μm及250μm，特別是介於50μm至120μm之間的厚度，包括50μm及120μm。
根據光電半導體裝置之至少一實施例，反射封裝化合物具有清澈、透明的基質材料(matrix material)，其中，反射粒子係埋入於基質材料中。例如，粒子係為擴散地反射並且為白色。尤其較佳的是，基質材料在室溫時具有至多Shore A 50或至多Shore A 40的硬度。換句話說，基質材料係為相對較軟的。
根據光電半導體裝置之至少一實施例，粒子包含金屬氧化物的粒子材料或由金屬氧化物的粒子材料組成。金屬氧化物係為例如二氧化鈦。
根據光電半導體裝置之至少一實施例，反射粒子相較於整個反射封裝化合物的比重係介於10%至40%之間，包括10%及40%，特別是介於20%至30%之間，包括20%及30%。
反射封裝化合物的反射係數就可見輻射而言(例如波長範圍介於450nm至700nm之間，包括450nm及700nm)為至少85%或較佳為至少90%或至少93%。
根據光電半導體裝置之至少一實施例，封裝化合物顯示為白色，如封裝化合物的平面圖所示，且特別是在圍繞半導體晶片之區域中。換句話說，例如，粒子的濃度係設定成使得封裝化合物給予觀察者白色的外觀。
根據光電半導體裝置之至少一實施例，反射封裝化合物如圖所示以橫向完全地於周圍圍繞該半導體晶片，並相對於半導體晶片之橫向邊界區域以完全緊閉的方式實施。此外，較佳地，反射封裝化合物同樣地以完全緊閉以及以橫向完全地於周圍的方式圍繞銲線及/或蓋體。
根據光電半導體裝置之至少一實施例，光電半導體裝置具有外殼，該外殼具有空腔，其中，該半導體晶片、該蓋體、該銲線以及該反射封裝化合物於每一例子中係設置於該空腔中，且其中，半導體晶片係嵌合於載體頂面。在此例子中，反射封裝化合物較佳地沿著橫向自該半導體晶片延伸直到該空腔之橫向邊界區域為止，使得在空腔的橫向邊界區域與半導體晶片之間不會發生空氣間隙或者用額外材料填充間隙的情形。
根據光電半導體裝置之至少一實施例，反射封裝化合物係設計成將該空腔之橫向邊界區域弄濕。換句話說，凹面可形成於橫向邊界區域上，且在製造半導體裝置期間，反射封裝化合物可朝遠離載體頂面的方向沿著空腔之橫向邊界區域漸漸產生。
根據光電半導體裝置之至少一實施例，直接位於空腔之橫向邊界區域處的封裝化合物之厚度比直接位於半導體晶片的厚度係大於至少50μm及/或至多400μm。換句話說，以反射封裝化合物形成拋物線反射器係有可能的，其中，封裝化合物的厚度(具有至多30μm的公差)朝遠離半導體晶片的方向持續地增加。在所述公差範圍內，封裝化合物之較小凹面同樣能在蓋體之橫向邊界區域處形成，而這與以上所述並沒有不一致的情形。
此處所述之光電半導體裝置係基於下列有關圖式之具體實施例以詳細細節描述。在此例子中，各別圖式中相同元件符號標示為相同元件。然而，在此例子中，圖式所示元件之尺寸關係不應被視為實際尺寸，而是個別元件可以誇大尺寸加以說明，以便能夠更清楚理解。
第1圖以示意剖視圖說明光電半導體裝置1之具體實施例。光電半導體晶片3係嵌合至載體2的平面載體頂面20。半導體晶片3具有遠離載體2的輻射主要表面30。具有遠離半導體晶片3之平面本體頂面50的蓋體5係嵌合於輻射主要表面30。蓋體5係塑形為小型平板且具有例如大約100μm的厚度A。半導體晶片的厚度C係為例如介於30μm至250μm之間，包括30μm及250μm，特別是大約120μm附近。輻射主要表面30角落的部分區域係設有電性連接區域7a，其並未受到蓋體5覆蓋。
經由銲線4而與半導體晶片3產生電性接觸，銲線4自載體頂面20的電性連接區域7b延伸到輻射主要表面30的電性連接區域7a為止。在電性連接區域7a周圍的區域中，銲線4的行進路線大約平行輻射主要表面30，例如具有至多20°的公差。相較於第1圖所示，銲線4與載體頂面20之間的距離係有可能從連接區域7a朝向連接區域7b的方向持續縮減，特別是，若連接區域7a以類似基座(pedestal-like)的方式實施時。
反射封裝化合物6以完全緊閉(positively locking)的方式朝橫向圍繞半導體晶片3、蓋體5以及銲線4。銲線4係完全埋入於反射封裝化合物6中。反射封裝化合物6的厚度T(具有至多5%或至多10%的公差)對應於例如蓋體5的厚度A以及半導體晶片3的厚度C之總和。封裝化合物6中遠離載體2的封裝頂面60(處於產品公差的範圍內)的方向平行載體頂面20以及本體頂面50，且在產品公差範圍內而與本體頂面50齊平。封裝化合物6係為例如透明矽或透明矽環氧化物混合材料，其中，特別是由二氧化鈦化合物構成的反射粒子係埋入於透明矽或透明矽環氧化物混合材料中。位於輻射主要表面30的連接區域7a係完全地被封裝化合物6覆蓋。
位於蓋體5之橫向邊界區域處，凹面(concave meniscus)可形成於封裝化合物6中遠離載體2的封裝頂面60上。較佳地，蓋體5的本體頂面50係設有抗黏著(antiadhesion)層8，其避免封裝化合物6之材料將本體頂面50弄濕。抗黏著層8的厚度係為例如介於10nm以及1μm之間，包括10nm以及1μm，特別是介於25nm以及200nm之間，包括25nm以及200nm。抗黏著層較佳地包含含氟材料，例如類似鐵氟龍(Teflon-like)之材料。蓋體5係為例如黏著接合至輻射主要表面30上或直接打印至輻射主要表面30上。相較於圖示說明，執行不同功能且為例如透明、擴散散射(diffusely scattering)或者具有轉化劑(conversion agent)的複數個蓋體可朝遠離載體頂面20的方向彼此接續。對於蓋體5而言，於本體頂面50處，每一例子中係同樣可能具有用以改善光之耦合輸出的粗糙結構，或(除了或替代抗黏著層8)設有抗反射塗層或特別是硬塗層以抵抗機械負載。
相較於第1圖中的說明，其亦可能於所有其它具體實施例中，於輻射主要表面30上經由二條銲線4與光電半導體晶片3產生電性接觸，且半導體晶片3接著實施為所謂的覆晶(flip-chip)。
第2A至第2E圖以透視圖示意說明用於製造光電半導體裝置1之具體實施例的方法。
根據第2A圖，係提供有一載體2。載體2於載體頂面20上具有電性連接區域7b、7c、7d。連接區域7b、7d較佳地係經由電鍍通孔(plated-through hole)連接至載體2之下側上的電性導體軌跡(未圖示)。
根據第2B圖，複數個半導體晶片3係藉由例如銲接或電性導電黏著接合而嵌合至連接區域7c。提供保護而免於遭受靜電放電的保護二極體11係嵌合於連接區域7d。半導體晶片3可為結構上相同的半導體晶片，否則就是例如發射不同頻譜範圍的不同半導體晶片。
在第2C圖中，銲線4a、4b係自載體頂面20的連接區域7b開始，連接至半導體晶片3的連接區域7a、7e以及連接至保護二極體11。銲線4a、4b較佳地先連接至載體頂面20，然後連接至半導體晶片3以及保護二極體11。根據第2D圖，蓋體5a、5b係鋪設於半導體晶片3上。
蓋體5a係為例如清澈的、透明的小型平板，其較佳地具有使得蓋體5a朝遠離載體2的方向而與蓋體5b齊平的厚度。蓋體5b包含轉化劑，轉化劑係設計成將由半導體晶片3發射的至少部分輻射轉化為具有不同波長的輻射。例如，指定給蓋體5b的半導體晶片3發射藍光，而指定給蓋體5a的半導體晶片3發射藍光或紅光。作為其替代者，半導體晶片3於每一例子中可為結構相同的半導體晶片。可同樣使用結構相同的蓋體5a、5b。
可由第3圖獲得銲線4a、4b的更詳細說明。在遠離載體頂面20的方向，蓋體5a、5b突出超過銲線4a、4b。沿著銲線4a、4b的方向，銲線4a、4b具有不同曲率半徑。於載體頂面20之電性連接區域7b上，銲線4a、4b的曲率半徑，特別是小於，靠近半導體晶片3以及保護二極體11中遠離載體2之表面上之連接區域7a、7e的曲率半徑。
根據第2E圖，半導體晶片3、蓋體5a，5b、以及銲線4a，4b係藉由反射封裝化合物6予以封裝並朝橫向圍繞。蓋體5a、5b以及封裝化合物6在遠離載體頂面20的方向完全地覆蓋載體2。銲線4a、4b係完全地埋入於封裝化合物6中。封裝頂面60大約平行載體頂面20延伸，且除了於蓋體5a，5b之橫向邊界區域處形成的凹面以外，係以平面方式成形，且與本體頂面50齊平。
封裝化合物6可防止尚未通過蓋體5b的輻射從半導體晶片3中發射出，該半導體晶片3係被指定給具有轉化劑的蓋體5b。其因此可能達成特定同質的(homogeneous)頻譜發射以及高轉化效率。
視需要地，根據第2E圖的半導體裝置1可分割而形成在每一例子中包含複數個半導體晶片3或者在每一例子中精確地包含一個半導體晶片3。
第4圖以剖面圖顯示半導體裝置1之另一具體實施例。不同於第1圖，銲線4係連同蓋體5埋入於封裝化合物6中。從載體頂面20可看出，反射封裝化合物6僅延伸到達輻射主要表面30為止。蓋體5完全地延伸或大體上完全地覆蓋整個載體頂面20。本體頂面50較佳地以平面方式成形。蓋體的厚度A較佳地介於50μm及150μm之間，包括50μm及150μm。蓋體5較佳地為清澈且透明的。對於蓋體5而言，係同樣可能含有過濾劑及/或轉化劑，所有其它具體實施例亦是如此。
根據第5A圖至第5E圖之具體實施例中，其顯示半導體裝置1之另一具體實施例之製造方法，類似於第2A圖至第2E圖，載體2具有包含空腔90的外殼9。空腔90的橫向邊界區域95的方向係大約垂直於電性連接區域7b、7c、7d所嵌合的載體頂面20。橫向邊界區域95係組構成相對於反射封裝化合物6為潮濕的，使得在藉由封裝頂面60將反射封裝化合物6填入空腔90期間形成反光槽(reflective trough)。封裝頂面60較佳地以拋物面形式成形。
載體2之橫向尺寸的範圍為，例如，介於1mm乘以2mm以及4mm乘以8mm之間，包括1mm乘以2mm以及4mm乘以8mm，所有其它具體實施例亦是如此。半導體裝置1係因此相對緊密地建構而成。視需要地，由例如構成對齊輔助件或安裝輔助件的圓柱形切除部分(cutout)可形成於外殼9及載體2的角落。
具有外殼9之半導體裝置1的另一具體實施例係根據第6A至6C圖的示意剖面圖說明。在所有其它具體實施例中亦是如此，較佳地並無另外的封裝順著(downstream)設置於封裝頂面60。特別是，封裝頂面60鄰接空氣。作為其替代者，係有可能讓光學單元(未於圖式中說明)，例如透鏡，順著設置於封裝頂面60之上及/或外殼9之上。
第7圖以剖面圖顯示半導體裝置1的另一具體實施例。為簡化說明，蓋體及銲線並未描繪於第7圖中。拋物線反射器係藉由封裝頂面60形成。於橫向邊界區域95處，封裝化合物6在製造期間逐漸增長。封裝化合物6在半導體晶片3處具有厚度T1以及在橫向邊界區域95處具有厚度T2。厚度T1以及厚度T2之間的差距係為例如介於50μm至400μm之間，包括50μm及400μm，或者介於75μm至300μm之間，包括75μm及300μm。封裝化合物6在外殼9的橫向邊界區域95以及半導體晶片3之間的橫向延伸程度係為例如介於100μm至1mm之間，包括100μm及1mm，特別是介於150μm至500μm之間，包括150μm及500μm，例如大約350μm。封裝化合物6係直接與半導體晶片3以及橫向邊界區域95接觸。藉由連接裝置的槽型部，半導體晶片3係固定至載體2，該槽型部可位於半導體晶片3之橫向邊界區域上。
第7圖中可見封裝化合物6的厚度T可先朝遠離半導體晶片3的方向稍微縮減，然後再朝向橫向邊界區域95的方向持續地增加。厚度T朝遠離半導體晶片3的方向的縮減係較佳為至多30μm或至多20μm，並可歸因於半導體晶片3上或蓋體上形成的小型凹面。封裝頂面60之射束成形(beam shaping)不會或者幾乎不會受到封裝化合物6之厚度T的局部最小值所影響。
本發明並不受具體實施例之所述內容所限。而是，即使特徵或結合的特徵本身並未明確地指定於專利申請範圍或具體實施例中，本發明包含任何新穎特徵且同時包含任何結合之特徵，其中，特別是包括申請專利範圍中任何結合的特徵。
1．．．光電半導體裝置
2．．．載體
3．．．半導體晶片
4、4a、4b．．．銲線
5、5a、5b．．．蓋體
6．．．封裝化合物
7a、7b、7c、7d、7e．．．連接區域
8．．．抗黏著層
9．．．外殼
11．．．保護二極體
20．．．載體頂面
30．．．輻射主要表面
50．．．本體頂面
60．．．封裝頂面
90．．．空腔
95．．．橫向邊界區域
A、C、T、T1、T2．．．厚度
第1圖至第7圖顯示此處所述之光電半導體裝置之具體實施例的示意圖。
1．．．光電半導體裝置
2．．．載體
3．．．半導體晶片
4．．．銲線
5．．．蓋體
6．．．封裝化合物
7a、7b．．．連接區域
8．．．抗黏著層
20．．．載體頂面
30．．．輻射主要表面
50．．．本體頂面
60．．．封裝頂面
A、C、T．．．厚度

Claims (13)

  1. 一種光電半導體裝置(1)，包含：載體(2)，係具有載體頂面(20)；至少一個光電半導體晶片(3)，係嵌合於該載體頂面(20)上，且係具有遠離該載體頂面(20)之輻射主要表面(30)；至少一條銲線(4)，係藉其與該半導體晶片(3)產生電性接觸；至少一個蓋體(5)，係位於該輻射主要表面(30)上，且係朝遠離該載體頂面(20)並垂直於該輻射主要表面(30)之方向突出超過該銲線(4)；以及至少一個反射封裝化合物(6)，係朝橫向圍繞該半導體晶片(3)且自該載體頂面(20)延伸到至少該輻射主要表面(30)為止，其中，該銲線(4)係被該反射封裝化合物(6)完全地覆蓋或者被該反射封裝化合物(6)連同該蓋體(5)完全地覆蓋，以及該銲線(4)係嵌合於該輻射主要表面(30)上之電性連接區域(7)中的該半導體晶片(2)，其中，該電性連接區域(7)係無該蓋體(5)且被該反射封裝化合物(6)部分地或完全地覆蓋。
  2. 如申請專利範圍第1項所述之光電半導體裝置，其中，該銲線(4)係完全地埋入於該反射封裝化合物(6)中。
  3. 如申請專利範圍第1項或第2項所述之光電半導體裝置，其中，該反射封裝化合物(6)自該載體頂面(20)延伸直到該蓋體(5)中遠離該載體頂面(20)之本體頂面 (50)為止。
  4. 如申請專利範圍第1項或第2項所述之光電半導體裝置，其中，該蓋體(5)之該載體頂面(50)係設有抗黏著層(8)，且該抗黏著層(8)對該反射封裝化合物(6)之材料而言為非潮濕的。
  5. 如申請專利範圍第1項或第2項所述之光電半導體裝置，其中，遠離該載體頂面(20)之封裝頂面(60)以至多30μm的公差延伸，並與該蓋體(5)之該本體頂面(50)齊平且平行。
  6. 如申請專利範圍第1項或第2項所述之光電半導體裝置，其中，該載體頂面(20)如平面圖所示係被該反射封裝化合物(6)連同該蓋體(5)完全地覆蓋。
  7. 如申請專利範圍第1項或第2項所述之光電半導體裝置，其中，該銲線(4)以至多20°的公差延伸平行於該電性連接區域(7)中之該輻射主要表面(30)。
  8. 如申請專利範圍第1項或第2項所述之光電半導體裝置，其中，該蓋體(5)係塑形為小型平板，且被限定於該輻射主要表面(30)，其中，該蓋體(5)之厚度(A)係介於50μm至250μm之間，且包括50μm及250μm。
  9. 如申請專利範圍第1項或第2項所述之光電半導體裝置，其中，該反射封裝化合物(6)包含透明基質材料以及埋入其中的反射粒子，其中，該基質材料在室溫時具有至多Shore A 50的硬度。
  10. 如申請專利範圍第9項所述之光電半導體裝置，其中， 形成該反射粒子之粒子材料係金屬氧化物，其中，該粒子於該反射封裝化合物(6)中之比重係介於10%至40%之間，且包括10%及40%。
  11. 如申請專利範圍第1項或第2項所述之光電半導體裝置，其中，該反射封裝化合物(6)以完全緊閉以及完全地朝橫向於周圍的方式圍繞該半導體晶片(3)、該銲線(4)以及該蓋體(5)。
  12. 如申請專利範圍第1項或第2項所述之光電半導體裝置，其中，該光電半導體裝置具有外殼(9)，該外殼(9)具有空腔(90)，其中，該半導體晶片(3)、該蓋體(4)以及該反射封裝化合物(6)係設置於該空腔(90)中之該載體頂面(20)處；以及其中，該反射封裝化合物(6)自該半導體晶片(3)延伸直到該空腔(90)之橫向邊界區域(95)為止。
  13. 如申請專利範圍第12項所述之光電半導體裝置，其中，該反射封裝化合物(6)係設計成濕潤該空腔(90)之該橫向邊界區域(95)，其中，該封裝化合物(6)於該橫向邊界區域(95)之厚度(T)係至少為50μm且至多為大於該半導體晶片(3)之厚度的400μm。
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