TWI462242B - 半導體模組及攝像裝置 - Google Patents

半導體模組及攝像裝置 Download PDF

Info

Publication number
TWI462242B
TWI462242B TW097143469A TW97143469A TWI462242B TW I462242 B TWI462242 B TW I462242B TW 097143469 A TW097143469 A TW 097143469A TW 97143469 A TW97143469 A TW 97143469A TW I462242 B TWI462242 B TW I462242B
Authority
TW
Taiwan
Prior art keywords
semiconductor element
semiconductor
bonding wire
opposite
electrode
Prior art date
Application number
TW097143469A
Other languages
English (en)
Other versions
TW200941663A (en
Inventor
Satoshi Noro
Tomofumi Watanabe
Original Assignee
Sanyo Electric Co
Sanyo Semiconductor Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co, Sanyo Semiconductor Co Ltd filed Critical Sanyo Electric Co
Publication of TW200941663A publication Critical patent/TW200941663A/zh
Application granted granted Critical
Publication of TWI462242B publication Critical patent/TWI462242B/zh

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00Cameras or camera modules comprising electronic image sensors; Control thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03BAPPARATUS OR ARRANGEMENTS FOR TAKING PHOTOGRAPHS OR FOR PROJECTING OR VIEWING THEM; APPARATUS OR ARRANGEMENTS EMPLOYING ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ACCESSORIES THEREFOR
    • G03B17/00Details of cameras or camera bodies; Accessories therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/50Constructional details
    • H04N23/54Mounting of pick-up tubes, electronic image sensors, deviation or focusing coils
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64Impedance arrangements
    • H01L2223/66High-frequency adaptations
    • H01L2223/6605High-frequency electrical connections
    • H01L2223/6611Wire connections
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05553Shape in top view being rectangular
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32135Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48235Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a via metallisation of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/494Connecting portions
    • H01L2224/4943Connecting portions the connecting portions being staggered
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14618Containers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01012Magnesium [Mg]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0103Zinc [Zn]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0105Tin [Sn]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01083Bismuth [Bi]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • Adjustment Of Camera Lenses (AREA)
  • Studio Devices (AREA)

Description

半導體模組及攝像裝置
本發明係有關一種半導體模組和搭載了該半導體模組的攝像裝置。
近年,伴隨著電子設備的小型化.高功能化,要求在電子設備中使用的半導體模組更加小型化、集成化。為了因應這種要求,開發了在基板上搭載了多個半導體晶片的多晶片模組(MCM)。
做為在MCM中作為搭載半導體晶片的構造者,將多個半導體晶片進行層疊的多級堆疊結構(stuck structure)為眾所周知。在多級堆疊結構的MCM中,在各半導體晶片的周圍設置外部電極,並藉由接合導線(bonding wire)電性連接各外部電極和基板上的電極焊墊。
這樣的MCM例如被組裝到CCD照相機中,對各半導體晶片賦予獨自的功能。例如,在作為邏輯元件起作用的半導體晶片中加入控制電路,在作為驅動元件起作用的半導體晶片中加入向驅動CCD的馬達等供給電流的電路。
伴隨MCM高密度化的進展,而以作為驅動元件起作用的半導體元件和作為邏輯元件起作用的半導體元件的距離更接近的狀態進行封裝化。為此,流過作為驅動元件起作用的半導體元件的接合導線的信號成為作為邏輯元件起作用的半導體元件的雜訊,使得作為邏輯元件起作用的半導體元件的動作可靠性降低,以至於有可能減低半導體模組的動作可靠性。
另外,數位照相機等的攝像裝置被要求更加小型化,在MCM中鄰接的半導體元件的間隔更加接近,所以上述半導體元件的動作可靠性的降低變得顯著,存在有可能導致攝像裝置的動作不良的問題。
本發明鑒於上述問題而產生,其目的在於提供一種在具有多個半導體元件的半導體模組中,對流過一方的半導體元件的接合導線的信號成為其他半導體元件的雜訊的問題進行抑制,使半導體模組的動作可靠性提高的技術。另外,本發明的其他目的在於提供一種使加入了具有多個半導體元件的半導體模組的攝像裝置的動作可靠性提高的技術。
本發明的一種形態為半導體模組。該半導體模組包括:佈線基板,在一個主表面上設置有基板電極;第一半導體元件,搭載於佈線基板,具有用於對邏輯信號進行輸入或輸出的邏輯信號用電極;第二半導體元件,與第一半導體元件並排搭載,具有用於輸出大電流的電流輸出用電極;第一接合導線,將邏輯信號用電極和與其對應的基板電極電性連接;和第二接合導線,將電流輸出用電極和與其對應的基板電極電性連接;從佈線基板的主表面一側觀察,第一接合導線係橫穿第一半導體元件的未與第二半導體元件的邊相對向的邊。
根據此形態,因為在第一半導體元件中設置的邏輯信號用電極以及第一接合導線被設置在遠離第二半導體元件的位置上,所以能夠抑制在第一半導體元件中產生由於第二半導體元件輸出的大電流導致的雜訊。
在上述形態中,電流輸出用電極也可以沿著第二接合導線所橫穿的第二半導體元件的邊設置。
另外,在上述形態中,也可以是第一半導體元件輸出攝像裝置的手抖動修正用的手抖動修正信號,第二半導體元件輸出供給到驅動單元的大電流,該驅動單元根據手抖動修正信號對攝像裝置的透鏡進行驅動。在這種情況下,驅動裝置可以是音圈馬達(VCM)。
另外,在上述形態中,邏輯信號用電極也可以沿著第一半導體元件的與第二半導體元件的邊相對向的邊不同的邊設置。另外,第二接合導線所橫穿的第二半導體元件的邊和與該邊相對向的佈線基板的邊之間的距離,也可以比第二接合導線所橫穿的第二半導體元件的邊的對邊和與該對邊,相對向的佈線基板的邊之間的距離短。在這種情況下,在與第二接合導線所橫穿的第二半導體元件的邊正交的方向上,第一半導體元件和第二半導體元件相互錯開配置。
本發明的另一種形態是攝像裝置。該攝像裝置包括上述任意一種形態的半導體模組。
下面,參照附圖對本發明的實施方式進行說明。但是,針對全部的附圖,對同樣的構成要素標注同樣的符號,且在下面的說明中對詳細說明進行適當的省略。
實施方式中的半導體模組,適於應用在具有手抖動修正功能的數位相機等攝像裝置中。第1圖是表示具有實施方式中的半導體模組的攝像裝置的電路構成的方塊圖。數位相機具有信號放大部10和手抖動修正部20。信號放大部10係對輸入的信號以預定的放大率進行放大,然後輸出到手抖動修正部20。手抖動修正部20係根據輸入的角速度信號和透鏡的位置信號,將用於控制透鏡的位置以進行手抖動修正的信號輸出到信號放大部10。
下面,對於數位相機的構成進行更具體地說明。
陀螺感測器50對數位相機的XY兩個軸的角速度進行檢測。透過陀螺感測器50得到的類比角速度信號,係透過放大電路12放大後輸出到ADC(類比數位轉換器)22。ADC 22將藉由放大電路12所放大的角速度信號轉換為數位角速度信號。從ADC 22輸出的角速度信號係輸出到陀螺均衡器24。
在陀螺均衡器24中,首先,自ADC 22輸出的數位角速度信號輸入到HPF(高通濾波器)26。HPF 26去除從陀螺感測器50輸出的角速度信號中比由於手抖動而產生的頻率成分低的頻率成分。一般而言,由於手抖動而產生的頻率成分為1~20Hz,所以例如從角速度信號中去除在0.7Hz以下的頻率成分。
搖攝(pan)/傾斜(tilt)判定電路28係根據HPF 26輸出的角速度信號,對攝像裝置的搖攝動作、傾斜動作進行檢測。在根據被攝體的移動等使攝像裝置移動的情況下,陀螺感測器50輸出相應於該移動的角速度信號。但是,因搖攝動作或傾斜動作而產生的角速度信號的變動,因為不是根據手抖動產生的變動,所以有不需要對透鏡60等光學系統進行修正的情況。搖攝/傾斜判定電路28為了在不依賴於根據搖攝動作或傾斜動作產生的角速度信號的變動的情況下進行手抖動修正而被設置。具體而言,搖攝/傾斜判定電路28係在檢測到角速度信號在一定期間連續處於預定值時,判定為相機處於搖攝動作或傾斜動作中。另外,根據被攝體的移動等將使攝像裝置在水平方向移動的情況稱作搖攝動作,將使攝像裝置在垂直方向移動的情況稱作傾斜動作。
增益調整電路30係根據搖攝/傾斜判定電路28的判定結果,改變從HPF 26輸出的角速度信號的放大率。例如,在不是搖攝動作或傾斜動作中的情況下,增益調整電路30進行HPF 26輸出的角速度信號的增益調整。另外,在搖攝動作或傾斜動作中的情況下,增益調整電路30係以減弱HPF 26輸出的角速度信號的強度而使輸出為0的方式,進行增益調整。
低通濾波器(LPF)32發揮積分電路的作用,對增益調整電路30輸出的角速度信號進行積分,從而生成表示攝像裝置移動量的角度信號。例如,LPF 32透過進行利用數位濾波器的濾波處理來求出角度信號、亦即攝像裝置的移動量。
定中心處理電路34係對從LPF 32輸出的角速度信號減去預定值。在攝像裝置中進行手抖動修正處理的情況下,在持續進行修正處理之時,透鏡位置漸漸離開基準位置,有可能到達透鏡可動範圍的界限點附近。此時,如果繼續進行手抖動修正處理,則透鏡變為可以向一個方向移動但是不能向其他方向移動。定中心處理電路是為了防止這種情況而設置者,透過從角度信號減去預定的值,控制透鏡難以接近可動範圍的界限點。
自定中心處理電路34輸出的角度信號,係透過增益調整電路36被調整在霍爾元件70的信號的範圍。透過增益調整電路36被調整的角度信號係輸出到霍爾均衡器40。
霍爾元件70是利用霍爾效應的磁敏感測器,作為透鏡60的X和Y方向的位置檢測單元來起作用。包括透過霍爾元件70而得到的透鏡60的位置資訊的類比位置信號,透過放大電路14放大後,傳送給ADC 22。ADC 22將透過放大電路14放大的類比位置信號轉換為數位位置信號。另外,ADC 22將放大電路12和放大電路14的類比輸出按分時方式轉換為數位值。
自ADC 22輸出的位置信號,係輸出到霍爾均衡器40。在霍爾均衡器40中,首先,自ADC 22輸出的位置信號輸入到加法電路42。另外,向加法電路42輸入透過增益調整電路36調整的角度信號。加法電路42將輸入的位置信號和角度信號進行加法運算。自加法電路42輸出的信號,係輸出到伺服電路44。伺服電路44係基於輸出到伺服電路44的信號,生成對VCM 80的驅動進行控制的信號。該信號的電流(VCM驅動電流)一般來說為200~300mA。另外,在伺服電路44中,也可以進行利用伺服電路數位濾波器的濾波處理。
自伺服電路44輸出的VCM驅動信號係透過DAC(數位類比轉換器)46從數位信號轉換為類比信號。類比VCM驅動信號在透過放大電路16放大後,係輸出到VCM 80。VCM 80係基於VCM驅動信號使透鏡60的X和Y方向的位置發生移動。
於此,對於在有手抖動的情況和沒有手抖動的情況下的本實施方式的攝像裝置的電路動作,進行說明。
(在沒有手抖動的情況下的動作)
在沒有手抖動的情況下,因為在攝像裝置不產生角速度,所以陀螺均衡器24輸出的信號為“0”。由VCM 80驅動的透鏡60的位置,其光軸和攝像裝置具備的CCD等攝像元件(未圖示)的中心一致,所以透過霍爾元件70和放大電路14產生的類比位置信號,在透過ADC 22轉換為表示“0”的數位位置信號之後,係輸出到霍爾均衡器40。伺服電路44在位置信號的值為“0”時,輸出控制VCM 80的信號,來維持當前的透鏡60的位置。
另外,在透鏡60的位置和攝像元件的中心不一致的情況下,透過霍爾元件70和放大電路14產生的類比位置信號,在透過ADC 22轉換為表示非“0”的數位位置信號之後,係輸出到霍爾均衡器40。伺服電路44係根據ADC 22輸出的數位位置信號的值,控制VCM 80,來使位置信號的值變為“0”。
透過反復進行這樣的動作,控制透鏡60的位置,來使透鏡60的位置和攝像元件的中心一致。
(在有手抖動的情況下的動作)
由VCM 80驅動的透鏡60的位置,其光軸和攝像裝置具備的攝像元件的中心一致,所以透過霍爾元件70和放大電路14產生的類比位置信號,在透過ADC 22轉換為表示“0”的數位位置信號之後,係輸出到霍爾均衡器40。
另一方面,由於手抖動而攝像裝置發生移動,LPF 32和定中心處理電路34係根據陀螺均衡器50檢測出的角速度信號,輸出表示攝像裝置的移動量的角度信號。
伺服電路44係根據將ADC 22輸出的表示“0”的位置信號、和定中心處理電路輸出的角度信號相加得到的信號,生成VCM的驅動信號。此時,儘管位置信號為“0”,由於加上了不是“0”的角度信號,所以伺服電路44生成使透鏡60移動的修正信號。
另外,本實施方式的手抖動修正,不是將CCD的圖像暫時讀入記憶體透過與下一圖像進行比較來排除手抖動的要素的所謂的電子式手抖動修正,而是如上前述,以光學方式使透鏡移動的透鏡移動方式或使CCD移動的CCD移動方式等光學式手抖動修正。
因此,光學式手抖動修正能夠解決在採用電子式手抖動修正機構的情況下產生的下述問題,即:對預先粗略拍攝的圖像進行修整而產生的畫質劣化;根據CCD大小的制約,修正範圍和攝像倍率有限;再者,不能對單幅的靜止圖像的模糊進行修正。特別是,在從高畫質攝像機的影像中取出靜止圖的情況下,光學式手抖動修正比較有效。
由於VCM 80根據伺服電路44輸出的修正信號使透鏡60移動,所以攝像裝置具備的攝像元件能夠得到將根據手抖動產生的被攝體的模糊進行抑制後的信號。透過反復進行這樣的控制,來實現手抖動修正控制。
第2圖是表示實施方式中的半導體模組的概略構成的俯視圖。另外,第3圖是表示實施方式中的半導體模組的概略構成的剖視圖。但是,在第2圖中,省略了後面講到的密封樹脂150。
半導體模組100包括:佈線基板110、第一半導體元件120、第二半導體元件130、第三半導體元件140、第四半導體元件170、密封樹脂150、和焊錫球160。
佈線基板110隔著絕緣樹脂層112具有第一佈線層114和第二佈線層116。第一佈線層114和第二佈線層116係透過貫穿絕緣樹脂層112的過孔117電性連接。第二佈線層116與焊錫球160連接。
作為構成絕緣樹脂層112的材料,可以例舉,例如:BT樹脂等三聚氰胺衍生物、液晶聚合物、環氧樹脂、PPE樹脂、聚醯亞胺樹脂、氟樹脂、酚醛樹脂、聚醯胺雙馬來醯亞胺等熱固性樹脂。為了提高半導體模組100的散熱性,絕緣樹脂層112較宜具有高熱傳導性的材料。為此,絕緣樹脂層112較宜含有銀、鉍、銅、鋁、鎂、錫、鋅和這些的合金等來作為高熱傳導性填充物。
作為構成第一佈線層114和第二佈線層116的材料,可以列舉,例如:銅。
在佈線基板110的主表面S1上,第一半導體元件120和第二半導體元件130被並排搭載。另外,按照層疊在第一半導體元件120上的方式搭載有第三半導體元件140。第一半導體元件120是邏輯元件,相當於第1圖所示的手抖動修正部20。另外,第二半導體元件130是驅動元件或功率元件,相當於第1圖所示的信號放大部10。第三半導體元件140是CPU。第三半導體元件140擔當第一半導體元件120的功能的一部分,根據需要代替第一半導體元件120的功能。另外,第四半導體元件170是EEPROM等記憶體元件。在第四半導體元件170中保持手抖動修正控制所需的數據。第一半導體元件120、第二半導體元件130、第三半導體元件140和第四半導體元件170係藉由密封樹脂150密封和封裝化。密封樹脂150係根據例如轉移模製(transfer mold)法來形成。
在第一半導體元件120中,設置有用於邏輯信號輸入或輸出的邏輯信號用電極122。作為輸入到第一半導體元件120的邏輯信號,可以列舉:上述角速度信號、位置信號。邏輯信號的電流典型為2mA。另外,作為從第一半導體元件120輸出的邏輯信號,可以列舉:手抖動修正信號。邏輯信號用電極122係透過金屬線等接合導線124,與在第一佈線層114上設置的基板電極118a電性連接。
在第二半導體元件130中,設置有用於輸出大電流的電流輸出用電極132。作為自第二半導體元件130輸出的大電流,可以列舉:用於驅動VCM的電流(200~300mA)。電流輸出用電極132係透過金屬線等接合導線134,與在第一佈線層114上設置的基板電極118b電性連接。另外,在第二半導體元件130中,除電流輸出用電極132之外,還設置有用於輸入、輸出與其他的半導體元件之間的信號的晶片電極136。晶片電極136係透過金屬線等接合導線137,與在第一佈線層114上設置的基板電極118c電性連接。此外,由接合導線124、134、137形成的連接線,可以在將第一半導體元件120搭載到佈線基板110上並將第二半導體元件130搭載到第一半導體元件120上之後予以布設。
如第2圖所示,從佈線基板110的主表面S1一側觀察,與第一半導體元件120連接的接合導線124,除了與第二半導體元件130的邊E1相對向的邊F1,係分別橫穿邊F2、F3和F4。另外,邏輯信號用電極122係沿著邊F2、F3和F4而設置。
關於第二半導體元件130,接合導線134橫穿與第一半導體元件120的邊F1相對向的邊E1以外的邊,在本實施方式中,係橫穿與邊E1鄰接的邊E2。另外,電流輸出用電極132係沿著邊E2而設置。
另外,晶片電極136分別沿著邊E1、邊E3和邊E4而設置;接合導線137分別橫穿邊E1、邊E3和邊E4。
另外,第一半導體元件120和第二半導體元件130係被設置在沿第2圖所示的y軸方向錯開的位置上。在本實施方式中,第一半導體元件120的y軸方向的中心位置更靠近佈線基板110的中心位置。由此,與第二半導體元件130的邊E2和佈線基板110的邊G2的距離相比,第二半導體元件130的邊E3和佈線基板110的邊G3的距離比較長。另一方面,第一半導體元件120的邊F2和佈線基板110的邊G2的距離、和第一半導體元件120的邊F3和佈線基板110的邊G3的距離相等。
在第三半導體元件140上,設置有透過接合導線144與第一半導體元件120上設置的電極焊墊125電性連接的外部電極142。據此,第三半導體元件140與第一半導體元件120之間可以傳送接收信號。另外,在第三半導體元件140上,設置有透過接合導線146與第一佈線層114上設置的基板電極118d電性連接的外部電極148。
第四半導體元件170係與設置有電流輸出用電極132和接合導線134的邊E2相反側的邊E3並排搭載。較佳之方式為,第四半導體元件170設置在與第二半導體元件130的電流輸出用電極132和接合導線134相反一側的佈線基板110的角部附近。
根據以上前述的半導體模組100,關於第二半導體元件130,沿著與第一半導體元件120的邊F1相對向或鄰接的邊E1以外的邊來設置電流輸出用電極132,接合導線134橫穿邊E1以外的邊。據此,電流輸出用電極132和接合導線134設置在離開第一半導體元件120的位置上,所以能夠抑制在第一半導體元件120產生因第二半導體元件130輸出的大電流而形成的雜訊。
另外,關於第一半導體元件120,在與輸出大電流的第二半導體元件130的邊E1相對向或鄰接的邊F1上,沒有設置邏輯信號用電極122和接合導線124。據此,能夠抑制在第一半導體元件120產生因第二半導體元件130輸出的大電流而形成的雜訊。
另外,因為第四半導體元件170設置在遠離電流輸出用電極132和接合導線134的位置上,所以能夠抑制在第四半導體元件170產生雜訊。結果,能夠提高第四半導體元件170的動作可靠性,進而可以提高半導體模組100的動作可靠性。
另外,與第二半導體元件130的邊E2和佈線基板110的邊G2的距離相比,第二半導體元件130的邊E3和佈線基板110的邊G3的距離比較長,所以能夠確保設置第四半導體元件170的區域。
第4圖是表示具有上述實施方式中的半導體模組的數位相機的透視立體圖。數位相機具有:陀螺感測器50、透鏡60、霍爾元件70、VCM 80和半導體模組100。半導體模組100,如第2圖和第3圖所示,並排搭載有第一半導體元件120、第二半導體元件130和第四半導體元件170。另外,按照層疊在第一半導體元件120上的方式搭載有第三半導體元件140。另外,在第4圖所示的半導體模組100中,第一半導體元件120、第二半導體元件130、第三半導體元件140和第四半導體元件170以外的構成被簡化並被適當省略。
據此,即使處於第一半導體元件120和第二半導體元件130靠近的狀態,也不會導致動作可靠性減低,從而能夠實現數位相機的更加小型化。
本發明不限定於上述實施方式,根據本領域技術人員的知識,也可以加入各種設計變更等的變形,加入那樣的變形的實施方式也包括在本發明的範圍中。
本發明中的攝像裝置,不限定於上述數位相機,也可以是在攝像機或手機中搭載的照相機、監視照相機等,能與數位相機起到同樣效果。
10...信號放大部
12、14、16...放大電路
20...手抖動修正部
22...ADC
24...陀螺均衡器
26...HPF
28...搖攝/傾斜判定電路
30、36...增益調整電路
32...LPF
34...定中心處理電路
40...霍爾均衡器
42...加法電路
44...伺服電路
46...DAC
50...陀螺感測器
60...透鏡
70...霍爾元件
100...半導體模組
110...佈線基板
112...絕緣樹脂層
114...第一佈線層
116...第二佈線層
117...孔
118a、118b、118c、118d...基板電極
120...第一半導體元件
122...邏輯信號用電極
124、134、137、144、146...接合導線
125...電極焊墊
130...第二半導體元件
132...電流輸出用電極
136...晶片電極
140...第三半導體元件
142、148...外部電極
150...密封樹脂
160...焊錫球
170...第四半導體元件
E1、E2、E3、E4、F1、F2、F3、F4、G1、G2、G3、G4...邊
S1...主表面
第1圖是表示具有實施方式中的半導體模組的攝像裝置的電路構成的方塊圖。
第2圖是表示實施方式中的半導體模組的概略構成的俯視圖。
第3圖是表示實施方式中的半導體模組的概略構成的剖視圖。
第4圖是表示具有實施方式中的半導體模組的數位相機的透視立體圖。
100...半導體模組
110...佈線基板
112...絕緣樹脂層
114...第一佈線層
118a、118b、118c、118d...基板電極
120...第一半導體元件
122...邏輯信號用電極
124、134、137、144、146...接合導線
125...電極焊墊
130...第二半導體元件
132...電流輸出用電極
136...晶片電極
140...第三半導體元件
142、148...外部電極
170...第四半導體元件
E1、E2、E3、E4、F1、F2、F3、F4、G1、G2、G3、G4...邊
S1...主表面

Claims (18)

  1. 一種半導體模組,包括:佈線基板,在一個主表面上設置有基板電極;第一半導體元件,搭載於前述佈線基板,具有用於對邏輯信號進行輸入或輸出的邏輯信號用電極;第二半導體元件,與前述第一半導體元件並排搭載,具有用於輸出大電流的電流輸出用電極;第一接合導線,將前述邏輯信號用電極和與其對應的前述基板電極電性連接;和第二接合導線,將前述電流輸出用電極和與其對應的前述基板電極電性連接;從前述佈線基板的前述主表面一側觀察,前述第一接合導線橫穿前述第一半導體元件的未與前述第二半導體元件的邊相對向的邊,並且不橫穿前述第一半導體元件的與前述第二半導體元件的邊相對向的邊;從前述佈線基板的前述主表面一側觀察,前述第二接合導線橫穿前述第二半導體元件的未與前述第一半導體元件的邊相對向的邊,並且不橫穿前述第二半導體元件的與前述第一半導體元件的邊相對向的邊。
  2. 如申請專利範圍第1項之半導體模組,其特徵在於,前述邏輯信號用電極係沿著前述第一半導體元件的未與前述第二半導體元件的邊相對向的邊設置。
  3. 如申請專利範圍第1項之半導體模組,其特徵在於,前述第一半導體元件係輸出攝像裝置的手抖動修 正用的手抖動修正信號;前述第二半導體元件係輸出供給到驅動單元的大電流,該驅動單元根據前述手抖動修正信號對前述攝像裝置的透鏡進行驅動。
  4. 如申請專利範圍第2項之半導體模組,其特徵在於,前述第一半導體元件係輸出攝像裝置的手抖動修正用的手抖動修正信號;前述第二半導體元件係輸出供給到驅動單元的大電流,該驅動單元根據前述手抖動修正信號對前述攝像裝置的透鏡進行驅動。
  5. 如申請專利範圍第3項之半導體模組,其特徵在於,前述驅動單元是音圈馬達。
  6. 如申請專利範圍第4項之半導體模組,其特徵在於,前述驅動單元是音圈馬達。
  7. 如申請專利範圍第1項之半導體模組,其特徵在於,前述邏輯信號用電極係沿著前述第一半導體元件的與前述第二半導體元件的邊相對向的邊不同的邊設置。
  8. 如申請專利範圍第2項之半導體模組,其特徵在於,前述邏輯信號用電極係沿著前述第一半導體元件的與前述第二半導體元件的邊相對向的邊不同的邊設置。
  9. 如申請專利範圍第3項之半導體模組,其特徵在於,前述邏輯信號用電極係沿著前述第一半導體元件 的與前述第二半導體元件的邊相對向的邊不同的邊設置。
  10. 如申請專利範圍第1項之半導體模組,其特徵在於,前述第二接合導線所橫穿的前述第二半導體元件的邊和與該邊相對向的前述佈線基板的邊之間的距離,比前述第二接合導線所橫穿的前述第二半導體元件的邊的對邊和與該對邊相對向的前述佈線基板的邊之間的距離短。
  11. 如申請專利範圍第2項之半導體模組,其特徵在於,前述第二接合導線所橫穿的前述第二半導體元件的邊和與該邊相對向的前述佈線基板的邊之間的距離,比前述第二接合導線所橫穿的前述第二半導體元件的邊的對邊和與該對邊相對向的前述佈線基板的邊之間的距離短。
  12. 如申請專利範圍第3項之半導體模組,其特徵在於,前述第二接合導線所橫穿的前述第二半導體元件的邊和與該邊相對向的前述佈線基板的邊之間的距離,比前述第二接合導線所橫穿的前述第二半導體元件的邊的對邊和與該對邊相對向的前述佈線基板的邊之間的距離短。
  13. 如申請專利範圍第10項之半導體模組,其特徵在於,在與前述第二接合導線所橫穿的前述第二半導體元件的邊正交的方向上,前述第一半導體元件和前述第二半導體元件相互錯開配置。
  14. 如申請專利範圍第11項之半導體模組,其特徵在於,在與前述第二接合導線所橫穿的前述第二半導體元件的邊正交的方向上,前述第一半導體元件和前述第二半導體元件相互錯開配置。
  15. 如申請專利範圍第12項之半導體模組,其特徵在於,在與前述第二接合導線所橫穿的前述第二半導體元件的邊正交的方向上,前述第一半導體元件和前述第二半導體元件相互錯開配置。
  16. 一種攝像裝置,具備申請專利範圍第1項之半導體模組。
  17. 一種攝像裝置,具備申請專利範圍第2項之半導體模組。
  18. 一種攝像裝置,具備申請專利範圍第3項之半導體模組。
TW097143469A 2007-11-14 2008-11-11 半導體模組及攝像裝置 TWI462242B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007296150A JP5164533B2 (ja) 2007-11-14 2007-11-14 半導体モジュールおよび撮像装置

Publications (2)

Publication Number Publication Date
TW200941663A TW200941663A (en) 2009-10-01
TWI462242B true TWI462242B (zh) 2014-11-21

Family

ID=40622945

Family Applications (1)

Application Number Title Priority Date Filing Date
TW097143469A TWI462242B (zh) 2007-11-14 2008-11-11 半導體模組及攝像裝置

Country Status (5)

Country Link
US (1) US20090121339A1 (zh)
JP (1) JP5164533B2 (zh)
KR (1) KR100984205B1 (zh)
CN (1) CN101436586B (zh)
TW (1) TWI462242B (zh)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5164532B2 (ja) * 2007-11-14 2013-03-21 オンセミコンダクター・トレーディング・リミテッド 半導体モジュールおよび撮像装置
US20090127694A1 (en) * 2007-11-14 2009-05-21 Satoshi Noro Semiconductor module and image pickup apparatus
TWI441515B (zh) 2010-09-15 2014-06-11 Altek Corp 具有光學防手振模組的攝像裝置及具有周邊驅動晶片的光學防手振攝像裝置
CN110572538A (zh) * 2018-06-06 2019-12-13 鸿海精密工业股份有限公司 接合结构及具有该接合结构的相机模块

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI288463B (en) * 2006-04-26 2007-10-11 Siliconware Precision Industries Co Ltd Semiconductor package substrate and semiconductor package having the substrate

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0622997Y2 (ja) * 1987-05-25 1994-06-15 サンケン電気株式会社 絶縁物封止型半導体装置
US5096852A (en) * 1988-06-02 1992-03-17 Burr-Brown Corporation Method of making plastic encapsulated multichip hybrid integrated circuits
JPH0982880A (ja) * 1995-09-13 1997-03-28 Toyota Autom Loom Works Ltd リードフレーム及び半導体装置
JP3316450B2 (ja) 1998-06-11 2002-08-19 三洋電機株式会社 半導体装置
JP3768761B2 (ja) * 2000-01-31 2006-04-19 株式会社日立製作所 半導体装置およびその製造方法
JP2001320009A (ja) * 2000-05-10 2001-11-16 Matsushita Electric Ind Co Ltd 半導体装置
JP2004039689A (ja) * 2002-06-28 2004-02-05 Sony Corp 電子回路装置
JP2004055756A (ja) * 2002-07-18 2004-02-19 Sanyo Electric Co Ltd 混成集積回路装置
JP2005252099A (ja) * 2004-03-05 2005-09-15 Sharp Corp 高周波用半導体装置
JP4244886B2 (ja) * 2004-08-31 2009-03-25 株式会社デンソー センサ回路
JP4327699B2 (ja) * 2004-10-28 2009-09-09 富士通マイクロエレクトロニクス株式会社 マルチチップ・パッケージおよびicチップ
JP4748648B2 (ja) * 2005-03-31 2011-08-17 ルネサスエレクトロニクス株式会社 半導体装置
US7593040B2 (en) * 2006-01-30 2009-09-22 Omnivision Technologies, Inc. Image anti-shake in digital cameras
US20070236577A1 (en) * 2006-03-30 2007-10-11 Chau-Yaun Ke Systems and methods for providing image stabilization
JP2008003182A (ja) * 2006-06-21 2008-01-10 Pentax Corp ブレ量検出装置
JP2008078367A (ja) * 2006-09-21 2008-04-03 Renesas Technology Corp 半導体装置
US7714892B2 (en) * 2006-11-08 2010-05-11 Avago Technologies Ecbu Ip (Singapore) Pte. Ltd. Systems, devices and methods for digital camera image stabilization
JP5164532B2 (ja) * 2007-11-14 2013-03-21 オンセミコンダクター・トレーディング・リミテッド 半導体モジュールおよび撮像装置
US20090127694A1 (en) * 2007-11-14 2009-05-21 Satoshi Noro Semiconductor module and image pickup apparatus

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI288463B (en) * 2006-04-26 2007-10-11 Siliconware Precision Industries Co Ltd Semiconductor package substrate and semiconductor package having the substrate

Also Published As

Publication number Publication date
JP2009123913A (ja) 2009-06-04
KR100984205B1 (ko) 2010-09-28
CN101436586A (zh) 2009-05-20
CN101436586B (zh) 2013-04-17
US20090121339A1 (en) 2009-05-14
KR20090050012A (ko) 2009-05-19
JP5164533B2 (ja) 2013-03-21
TW200941663A (en) 2009-10-01

Similar Documents

Publication Publication Date Title
US9900539B2 (en) Solid-state image pickup element, and image pickup system
US20190237380A1 (en) Imaging unit and imaging apparatus
TWI462242B (zh) 半導體模組及攝像裝置
JP6736318B2 (ja) 固体撮像素子、固体撮像素子の製造方法および撮像システム
JP2005012221A (ja) 固体撮像用半導体装置
KR101003568B1 (ko) 반도체 모듈 및 촬상 장치
KR100970074B1 (ko) 반도체 모듈 및 촬상 장치
JP5086039B2 (ja) 半導体モジュールおよび撮像装置
TWI442544B (zh) 半導體模組及攝像裝置
US20160284754A1 (en) Semiconductor device, solid-state imaging device, and imaging apparatus
JP5073457B2 (ja) 半導体モジュールおよび撮像装置
JP2006251577A (ja) カメラモジュール
JP5094371B2 (ja) 半導体モジュールおよび撮像装置
US11778293B2 (en) Mounting substrate to which image sensor is mounted, sensor package and manufacturing method thereof
JP2009158607A (ja) 半導体モジュールおよび撮像装置
JP2017085315A (ja) 半導体装置および撮像装置
JP2005252140A (ja) 固体撮像装置用パッケージ
JP5161170B2 (ja) カメラモジュール及び電子情報機器
JP2008193359A (ja) 撮像モジュール及び撮像素子パッケージ
WO2020045241A1 (ja) 撮像ユニット及び撮像装置

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees