TWI458042B - 晶圓接地裝置 - Google Patents
晶圓接地裝置 Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
- H01L21/6833—Details of electrostatic chucks
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
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- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y40/00—Manufacture or treatment of nanostructures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/02—Details
- H01J37/20—Means for supporting or positioning the objects or the material; Means for adjusting diaphragms or lenses associated with the support
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/26—Electron or ion microscopes; Electron or ion diffraction tubes
- H01J37/28—Electron or ion microscopes; Electron or ion diffraction tubes with scanning beams
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/30—Electron-beam or ion-beam tubes for localised treatment of objects
- H01J37/317—Electron-beam or ion-beam tubes for localised treatment of objects for changing properties of the objects or for applying thin layers thereon, e.g. for ion implantation
- H01J37/3174—Particle-beam lithography, e.g. electron beam lithography
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
- H01J2237/004—Charge control of objects or beams
- H01J2237/0041—Neutralising arrangements
- H01J2237/0044—Neutralising arrangements of objects being observed or treated
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
- H01J2237/20—Positioning, supporting, modifying or maintaining the physical state of objects being observed or treated
- H01J2237/2007—Holding mechanisms
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
- H01J2237/20—Positioning, supporting, modifying or maintaining the physical state of objects being observed or treated
- H01J2237/2008—Positioning, supporting, modifying or maintaining the physical state of objects being observed or treated specially adapted for studying electrical or magnetical properties of objects
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
- H01J2237/245—Detection characterised by the variable being measured
- H01J2237/24564—Measurements of electric or magnetic variables, e.g. voltage, current, frequency
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- Condensed Matter Physics & Semiconductors (AREA)
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- Testing Or Measuring Of Semiconductors Or The Like (AREA)
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Description
本發明與美國專利申請號12/179560,申請日2008年7月24日,題為”An Apparatus for Increasing Electric Conductivity to a Semiconductor Wafer Substrate when Expose to Electron Beam”,的發明內容相關,其說明書全文併入本文,視為本案說明書的一部分。
本發明係關於一種在電子束照射下,增加晶圓的導電度的裝置與方法,特別是一種在破壞背部絕緣層的同時大幅降低晶圓基板背面損傷的裝置與方法。
在半導體裝置製造過程的一電子束檢驗程序或一電子束微影製程中,基板的表面,亦即,晶圓的表面,會被一電子束所照射。當電子束照射在基板或晶圓上的絕緣層時,如果基板或晶圓的導電接觸不充分(incomplete)時,會有充電現象(charge-up)由於電子累積並儲存在絕緣層與基板或晶圓之間的介面上。在電子束微影製程方面,累積的電荷會造成電子束偏向,使微影製程所產生的圖案變形。在電子束檢驗程序方面,累積的電荷會阻礙晶圓表面信號電子的射出,因此造成檢測時
晶圓表面圖像的變形。
有許多方法可以預防上述電荷的累積。例如,控制照射電子的著陸能量(landing energy);建議在電子束照射的同時時在晶圓表面上噴射稀有氣體分子,Takagi所提美國專利公告號6,734,429;揭露在電子束照射同時,以雷射光照射晶圓表面,Madonado等所提美國專利公告號6,465,795、Matsui等所提美國專利公告號6,753,524;以及最普通的方法,利用導電探針將過量的電子引導離開晶圓,Komori所提美國專利公告號6,068,964。其中,導電探針實體連接到與晶圓背面的導電層(以機械式刺透的方法),或與導電層形間成導電路徑(以電壓擊穿絕緣層的方法),結果可獲得在晶圓導電層上的一穩定電位。
傳統導電探針的設計,不管是藉由機械式的實體穿透或用脈衝電壓擊穿絕緣,都可能在晶圓背面造成巨量的損傷,這些損傷的地方可能會在後續的半導體裝置製程中成為粒子(particle)的污染源之一。
因此,本領域亟需一系統與方法可克服上述缺失,而本發明可提供其所求。
本發明係關於一種在電子束照射下,增加晶圓的導電度的裝置與方法,特別是一種在破壞背部絕緣層的同時大幅降低晶圓基板背面損傷的裝置與方法。
本發明的實施例提供一種裝置與方法,其包含導入一脈衝電壓於導電探針,而該電壓足以擊穿在晶圓背面的絕緣層。本發明實施例結合機械式穿刺與電性的穿刺,由此可大幅減少晶圓背面上的損傷。
12‧‧‧導電探針
14‧‧‧靜電承台
16‧‧‧晶圓
17‧‧‧絕緣層
18‧‧‧導電層
21‧‧‧平台接地
100‧‧‧系統
102‧‧‧套孔
500‧‧‧裝置
501‧‧‧電阻
502a‧‧‧電容
502b‧‧‧電容
506‧‧‧電脈衝供應電源
第一圖顯示一習知靜電承台內的導電探針,於施加靜電力之前;第二圖顯示一習知靜電承台內的導電探針,於施加靜電力之後;第三圖顯示一習知導電探針的上視與側視圖;第四A圖顯示以機械刺穿後晶圓背面絕緣層的毀損痕跡;第四B圖顯示以電壓絕緣破壞後晶圓背面絕緣層的毀損痕跡;第五圖顯示根據本發明一實施例的晶圓導電裝置;以及第六圖顯示在實施本發明實施例的晶圓導電裝置與方法後晶圓背面絕緣層的毀損痕跡。
本發明係關於一種在電子束照射下,增加晶圓導電度的裝置與方法,特別是一種在破壞背部絕緣層的同時大幅減少晶圓基板背面損傷的裝置與方法。以下本文的描述可使本發明所屬領域一般技藝人士根據本案說明書的內容與其需求,製造或使用本發明的技術。而本領域熟悉技藝人士了解本案較佳實施例的各種修正,他們亦懂得本案所揭露的發明概念也許能應用其他實施例上。因此,本發明的範圍不限於實施例所敘述者,而是根據本發明所述概念與特徵所相容的最寬廣範圍。
以下將詳述本案的各實施例,並配合圖式作為例示。除了這些詳細描述之外,本發明還可以廣泛地施行在其他的實施例中,任何所述實施例的輕易替代、修改、等效變化都包含在本案的範圍內,並以
之後的專利範圍為準。在說明書的描述中,為了使讀者對本發明有較完整的了解,提供了許多特定細節;然而,本發明可能在省略部分或全部這些特定細節的前提下,仍可實施。此外,眾所周知的步驟或元件並未描述於細節中,以避免造成本發明不必要之限制。
在半導體工業,半導體裝置傳統上是在一單晶的矽基板表面上製造的。矽在某條件下扮演導體;然而,晶圓基板的背面通常具有一可能在不同的製造程序中產生的絕緣層。例如,典型的電絕緣層成份是二氧化矽。絕緣層的厚度通常大約在700nm至800nm之間;但是,有時絕緣層的厚度可厚達約2000Å(0.2μm)。移除過量電荷的一傳統方法是藉由一或多個導電探針將電荷導引離開晶圓。為了將電荷導引開,導電探針必須穿透絕緣層再碰觸到矽結晶。第一圖顯示一傳統系統100的一靜電承台14之一套孔102內的一導電探針12,在尚未施加靜電吸力之前的情形。本發明所屬領域的一般技藝人士知道雖然圖中的靜電承台14、套孔102、導電探針12的數量僅僅顯示一個,但系統100顯然也包含這些元件是複數個的實施態樣。系統100包含一晶圓16,其隔著一絕緣層17與導電探針12接觸。系統100與導電探針12的接地是耦接到靜電承載平台之接地21而完成。晶圓可經由一機械手臂(未圖示)被放置在靜電承台14的表面,之後靜電承台14施加靜電吸力將晶圓16拉下並固定在其表面上。在此同時,導電探針12以機械穿刺的方式穿過絕緣層,實體接觸到晶圓16背面的導電層18,或者,以絕緣電壓擊穿的方式,使得晶圓16背面的導電層18與導電探針12間產生一導電路徑。無論哪種方式,最後都可以獲得在導電層18上的一穩定電位,如第二圖所示。
第三圖顯示一典型的導電探針。針狀尖銳的導電探針12可
藉由機械力與靜電吸力穿刺絕緣層。導電探針會在晶圓背面的絕緣層上留下一個穿刺孔。第四A圖顯示一典型的機械穿刺造成的毀壞痕跡的放大圖像。與圖中參考尺度(10μm)相較,估計毀壞痕跡的大小約80μm長,其具有一穿刺孔、滑拖的傷痕以及自穿孔內被拉出的絕緣材料。這毀壞痕跡在後續的製程中可能會變成粒子污染源之一。
另一種習知方法是施加高電壓以擊穿晶圓背面的絕緣層。這種電壓擊穿方法通常會使得晶圓背面的絕緣層遭致很大的損壞。第四B圖顯示經由電壓擊穿造成之毀壞痕跡的放大圖像。與圖中參考尺度(10μm)相較,估計被毀壞痕跡的大小約65μm長,其損壞情況類似於遭到隕石碰擊使得絕緣層的絕緣材料四處濺射。某些時候,如果相關的電性參數選擇不當,毀損痕跡的直徑可達200μm。以這種電壓擊穿造成的絕緣層毀損也可能是後續製程的粒子污染源之一。
如第五圖所示,為了解決晶圓背面的損傷問題,本發明,的一實施例提供一電路連接至一大電阻501與一或多個導電探針12。電阻501的歐姆值大約在20Kohms至200Kohms之間。靜電承台14耦接電容502a與電容502b,一電壓脈衝供應電源506可產生單一方向性的(unidirectional)脈衝提供擊穿電壓經由電阻501與一或多個導電探針12送到靜電承台14。此單一方向性的脈衝可以是正電壓脈衝也可以是負電壓脈衝,而本實施例提供一正電壓脈衝作為例示。另外,單一方向性的脈衝可以是一個正或負電壓脈衝或是連續多個正或負的電壓脈衝串聯。第五圖所示的是根據本發明實施例提供的上述電路與導電探針的配置示意圖。如圖所示,電脈衝供應電源506與靜電承台14都耦接至靜電
承載平台之接地21。
上述單方向性的正電壓脈衝可電擊晶圓16一或多次,以擊穿晶圓16背面的絕緣層17並產生較小的毀損痕跡。根據本發明提供的裝置與方法,晶圓背面的毀損痕跡其大小會小於1μm。第六圖顯示根據根據本發明實施例提供的裝置與方法,所造成絕緣層毀損痕跡的放大圖像。
以上所述僅為本發明之較佳實施例而已,並非用以限定本發明之申請專利範圍;凡其他未脫離發明所揭示之精神下所完成之等效改變或修飾,均應包含在下述之申請專利範圍內。
12‧‧‧導電探針
14‧‧‧靜電承台
16‧‧‧晶圓
17‧‧‧絕緣層
21‧‧‧平台接地
102‧‧‧套孔
500‧‧‧裝置
501‧‧‧電阻
502a‧‧‧電容
502b‧‧‧電容
506‧‧‧電脈衝供應電源
Claims (5)
- 一種增加一晶圓導電度的裝置,包含:一靜電承台,用於固定一晶圓,該靜電承台具有一或多個套孔,該靜電承台耦接至一或多個電容;一或多個導電探針,一個該導電探針設置於一個該套孔內,該一或多個導電探針耦接至一或多個電阻;以及一電脈衝供應電源,其中該一或多個導電探針、該靜電承台、該電脈衝供應電源係用來降低晶圓基板背面的毀傷。
- 申請專利範圍第1項的裝置,其中該電脈衝供應電源輸出一單方向性的脈衝電壓。
- 如申請專利範圍第2項的裝置,其中該單方向性的脈衝電壓是一個正脈衝電壓或連續多個正脈衝電壓的串聯。
- 如申請專利範圍第2項的裝置,其中該單方向性的脈衝電壓是一個負脈衝電壓或連續多個負脈衝電壓的串聯。
- 如申請專利範圍第1項的裝置,其中該靜電承台與該電脈衝供應電源與一靜電承載平台之接地構成電性連接。
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US12/259,216 US8094428B2 (en) | 2008-10-27 | 2008-10-27 | Wafer grounding methodology |
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US9232626B2 (en) | 2013-11-04 | 2016-01-05 | Kla-Tencor Corporation | Wafer grounding using localized plasma source |
US9978627B2 (en) * | 2016-01-13 | 2018-05-22 | Applied Materials Israel Ltd | System and method for selective zapping |
US9805964B2 (en) | 2016-03-14 | 2017-10-31 | Applied Materials Israel Ltd. | System and method for multi-location zapping |
WO2018114299A1 (en) | 2016-12-19 | 2018-06-28 | Asml Netherlands B.V. | Charged particle beam inspection of ungrounded samples |
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