TWI437682B - 切割道上之穿通孔 - Google Patents

切割道上之穿通孔 Download PDF

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Publication number
TWI437682B
TWI437682B TW097111951A TW97111951A TWI437682B TW I437682 B TWI437682 B TW I437682B TW 097111951 A TW097111951 A TW 097111951A TW 97111951 A TW97111951 A TW 97111951A TW I437682 B TWI437682 B TW I437682B
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Taiwan
Prior art keywords
die
organic material
wafer
hole
semiconductor die
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TW097111951A
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English (en)
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TW200903764A (en
Inventor
Byung Tai Do
Heap Hoe Kuan
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Stats Chippac Ltd
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Publication of TW200903764A publication Critical patent/TW200903764A/zh
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Publication of TWI437682B publication Critical patent/TWI437682B/zh

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    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49805—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
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Description

切割道上之穿通孔
大致地，本發明有關半導體元件，且更特別地，有關一種貫穿通孔可堆疊之半導體元件。
在成長的趨勢中，半導體製造商已漸增地採用三維(3D)之互連及封裝以供半導體元件用。三維之互連給予優點：諸如於個別的封裝之內的尺寸縮減，減少的互連長度，及元件與不同功能性之整合。
實施3D互連之各式各樣的方式之一涉及使用所謂“穿通孔”技術。穿通孔的位置可座落於半導體晶片，或“晶粒”之內，或晶粒的外部(亦即，沿著所謂“切割道”導引)。
然而，目前的穿通孔技術具有若干限制。座落於半導體晶片內之通孔將限制具有額外的電路於該晶片之內的自由。例如可理解的是，穿通孔的個別位置將喪失該位置處之電路的安置；因而，限制了晶片的功能性，且因此，限制了使用該晶片之元件。
設置於半導體晶片外部(亦即，沿著切割道導引)之通孔需要更寬的切割道，以容納穿通孔的產生。結果，使產能(亦即，每個晶圓之晶數片)降低。
鑑於上述，本發明之目的在於提供一種穿通孔可堆疊之半導體元件，而不具有上述所伴隨之限制的任何限制。
因此，在一實施例中，本發明係一種半導體元件，包括第一晶粒，該第一晶粒具有頂部，底部，及週邊表面；接合墊，係形成於頂部表面之上；有機材料，係連接至第一晶粒且配置圍繞著該週邊表面；通孔，係形成於該有材料之中；金屬跡線，用以連接通孔至接合墊；以及導電性材料，係沈積於通孔之中。
在另一實施例中，本發明係半導體元件的製造方法，包括提供晶圓，該晶圓係以一切割道導引來指示；以一晶粒切割膠帶來縛起晶圓；使該晶圓沿著切割道導引而單粒化成為複數個晶粒，該複數個晶粒具有複數個縫隙於該複數晶粒的各個晶粒之間；將晶粒切割膠帶拉長以擴展該複數個縫隙至一預定的距離；沈積有機材料至該複數個縫隙的各個縫隙之內，其中有機材料的頂部表面與該複數個晶粒之第一晶粒的頂部表面係實質地共平面；形成複數個通孔於該有機材料中；使該複數個通孔的各個通孔圖案化至該複數個晶粒上之複數個接合墊位置的各個接合墊位置；沈積導電性材料於該複數個通孔的各個通孔中；以及使該複數個晶粒的各個晶粒自該晶粒切割膠而單粒化。
在又一實施例中，本發明係一種半導體元件的製造辺法，包括提供晶圓，該晶圓係以一切割道導引來指示；以第一晶粒切割膠帶來縛起該晶圓；使該晶圓沿著該切割道導引而單粒化成為複數個晶粒，該複數個晶粒具有複數個第一縫隙於該複數個晶粒的各個晶粒之間；自該第一晶粒切割膠帶來撿拾該複數個晶粒；安置該複數個晶粒至第一 晶圓支撐系統之上，以獲得預定寬度之複數個第二縫隙於該複數個晶粒的各晶粒之間；沈積有機材料至該複數個縫隙的各縫隙之內，以提供重塗佈之晶圓，其中有機材料的頂部表面與該複數個晶粒之第一晶粒的頂部表面係實質地共平面；轉移重塗佈之晶圓至第二晶圓支撐系統之上；形成複數個通孔於該有機材料中；使該複數個通孔的各個通孔圖案化至該複數個晶粒上之複數個接合墊位置的各個接合墊位置；沈積導電性材料於該複數個通孔的各個通孔中，轉移重塗佈之晶圓至第二晶粒切割膠帶之上；以及使該複數個晶粒的各個晶粒自該第二晶粒切割膠帶而單粒化。
在仍一實施例中，本發明係一種半導體元件的製造方法，包括提供第一晶粒，該第一晶粒具有頂部，底部，及週邊表面；提供接合墊，該接合墊係形成於頂部表面之上；提供有機材料，該有機材料係連接至第一晶粒且配圍繞著該週邊表面；提供通孔，該通孔係形成於該有機材料之中；提供金屬跡線，用以連接通孔至接合墊；以及沈積導電性材料於通孔之中。
現將參照圖式而以一或更多個實施例來敍述本發明於下文說明中，其中相同的符號代表相同或相似的元件。雖然本發明係依據用以達成本發明之目的最佳模式來予以描述，但將由熟習於本項技術之該等人士所理解的是，本發明打算涵蓋選擇例、修正例、及等效例，其可被包含於由 如下文揭示及圖式所支持之附錄申請專利範圍以及它們的等效例所界定之本發明的精神及範疇內。
圖1描繪典型先前技術之晶圓級晶片尺寸封裝的製作方法100。複數個晶片102係切割自晶圓。各個晶片102具有複數個突出的接合墊104，該等接合墊104係座落於晶片102有效表面上。
複數個晶片102係設置於可伸縮之膜106的頂部表面之上，該可伸縮之膜106係由框架108所繫緊。該框架108則由裝置具110所固定，且該可伸縮之膜106可在工作平台112上移位且被拉長至某一距離。
平台112可相對於該裝置具110而向上移動。該晶圓係由切割器來切割成為複數個晶片102，如圖示地，該等晶片已被包囊成為半導體封裝，且接著，由切割器118所鋸開。軸114相對於裝置具110而向上地移動，以昇高該平台110。
本發明改善典型之光前技術的製造方法100，而提供穿通孔之半導體元件，在一些實施例中，穿通孔之半導體元件係堆疊在一起以供特定的應用及實施用。
圖2A及2B分別以俯視圖及側視圖來描繪穿通孔可堆疊之半導體元件200。元件200具有結合的晶粒202。該元件200包含複數個接合墊204，該等接合墊204係沈積於半導體晶粒202的有效側之上。接合墊204可由電鍍法或其他方法來沈積於晶粒202的電極端子上。接合墊204的材料可由諸如鋁(Al)之導電性材料所製成。接合墊204 可由軟焊法而接連至基板。
一連串的金屬跡線206電性地耦接該等接合墊204至通孔208。如圖2B中所示地，通孔208自晶粒202之有效的頂部表面212及周圍材料210垂直延伸至晶粒之底部表面及周圍材料210，而與穿通孔之設計一致。
如圖示地，針對本發明的目的而稱為“有機材料”的周圍材料210係沈積圍繞著晶粒202的週邊表面。如進一步將予以敍述的是，該有機材料210係改良及變更自先前技術之材料。該有機材料可包含諸如苯并環丁烯(BCB)，聚亞醯胺(PI)材料，或其類似物之材料。如圖示地，通孔208係形成於有機材料210中，且依據列而組織。在此實施例200中，通孔208係形成於該有機材料210的各個側(例如側216及218)，以便完全地包圍晶粒202的週邊。複數個接合墊204的各個接合墊係電性地耦接至複數個通孔208的各個通孔。
例如將明瞭的是，穿通孔208可以以各式各樣的組態形成，諸如沿著多重列。進一步地，半切除之通孔(如本圖中所示)或完整的未切除之通孔208可以以各式各式的實施例而形成，以適合特殊的實施。該半導體元件200可在許許多多組態中額外的晶粒202堆疊成耦接。
圖3A及3B分別以如側視圖及俯視圖示地來描繪圖2A及2B中所示的穿通孔可堆疊之半導體元件的第一代表性製造方法中之第一步驟。提供一晶圓300。如圖示地將一連串的接合墊204形成於該晶圓的有效表面之上。該晶圓 係以切割道導引302來指示。
圖4A及4B分別以如側視圖及俯視圖所示地來描繪圖2A及2B中所示的穿通孔可堆疊之半導體元件的第一代表性製造方法中之第二步驟。首先，晶圓300由切割源402來予以單粒化為所繪之個件400。該切割源402可包含鋸，或雷射切割工具。
在單粒化之前，將晶圓300安置在晶粒切割膠帶404之上，以便在該單粒化過程之期間保持不同的分段400於適當位置處。在該單粒化過程之後，如圖示地形成連續的縫隙406於個別的分段400之間。
圖5A及5B分別以如側視圖及俯視圖所示地來描圖2A及2B中所示的穿通孔可堆疊之半導體元件的第一代表性製造方法中第三步驟。在所繪之個別分段中各晶圓300接受擴展過程。該晶粒切割膠帶404可由各式各樣的技術所拉長(例如，藉由使用擴展台)，以提供具有預定距離504之連續縫隙502。所繪之箭頭506指示由該晶圓擴展過程所遭受之不同的擴展方向。
做為下一步驟，圖6A及6B分別以如側視圖及俯視圖所示地來描繪圖2A及2B中所示的穿通孔可堆疊之半導體元件的第一代表性製造方法中之第四步驟。以上述所述之有機材料602來充填圖5A及5B中所示之各式各樣的縫隙502。對應於所充填的分段600之頂部表面的平面604與對應於有機材料602之項部表面的平面606係實質地共平面。
有機材料602之施加可由諸如旋塗法、針滴法、或其類似之施加法的方法所執行。
圖7A及7B分別以如側視圖及俯視圖所示來描繪圖2A及2B中所示的穿通孔可堆疊之半導體元件的第一代表性製造方法中之第五步驟。如圖示地，該等分段700接受一過程以形成複數通孔702於有機材料602中。該等通孔可以以各式各樣的方法所形成，包含雷射通孔鑽孔法或蝕刻法。如所示地，該等通孔之各個通孔係組構於該有機材料602中，以對應於將與該通孔相關聯之個別的隆起墊204。
轉向圖8A及8B，圖8A及8B分別以側視圖及俯視圖所示地來顯示圖2A及2B中所示的穿通孔可堆疊之半導體元件的第一代表性製造方法中之第六步驟。圖8A及8B描繪金屬圖案過程，而自接合墊204來將一連串的金屬跡線206連接至通孔702；再者，此處如圖示地，該等金屬跡線206電性連接該等接合墊至通孔702位置之各個通孔位置。
圖9A及9B描繪圖2A及2B中示的穿通孔可堆疊之半導體元件的第一代表性製造方法中之第七步驟。執行通孔金屬沈積法至組件900。以沈積導電性材料至該等通孔702的各個通孔內，而形成一連串之金屬通孔902。該導電材料可為諸如鋁(Al)、銅(Cu)、鎢(W)，或任何其他導電性金屬之材料，或任一組合之金屬合金。再者，金屬通孔902係形成有機材料602之中。許許多多的方法可予以使用來形成該等金屬通孔，例如電鍍法或封堵法。
圖10A及10B描繪圖2A及2B中所示穿通孔可堆疊之半導體元件的第一代表性製造方法中之第八步驟。再次地，由切割源402來將晶圓組件300，及900單粒化，以形成縫隙904。例如將由熟習於本項技術之人士所瞭解的是，圖10A、10B及上述代表性圖式中所示之各式各樣的晶粒202代表由特殊晶圓300所產生之晶片總數極小部分。因此，隨著該第二單粒化步驟的結論，可與圖2A及2B中所示之實施例相似地提供大多數的晶粒202，其中如上述所示地，其中有機材料210完全包圍晶粒202的週邊表面，且穿通孔902係沿晶粒之各個側表面而以列來組構。
在一實施例中，緊隨著圖10A及10B中所描之單粒化步驟，個別的晶粒202係由晶粒撿拾及安置過程所移開，以便將各個晶粒202自晶粒切割膠帶404移開。
圖11A及11B分別以如俯視圖及側視所示地來描繪結合複數個完整之穿通孔的穿通孔可堆疊之半導體元件906的第二實施例。此處，再次地顯示上文圖式中所示之各式各樣的特徵，包含晶粒202，接合墊204，以及形成於該晶粒202之有效表面212上的金屬跡線。在此實施例906中，取代如上述實施例所示之半切除通孔的是，該等個別的穿通孔908係“完整的”。所描繪之完整的穿通孔908可由切割道導引302之特殊組態所形成，如圖3A及3B中所示。更寬的切割道導引302允許有機材料602如圖示地被切割，而保留完整通孔908。
圖12A及12B分別以如側視圖及俯視圖所示地來描繪 圖2A及2B中所示的穿通孔可堆疊之半導體元件的第二代表性製造方法中之第三步驟。如所述之第二製造方法與如上文所述之第一代表性方法共用首先之兩個步驟(亦即，提供晶圓，以及在晶粒切割膠帶404之上將晶圓單粒化成為個別的分段)。此外，再次顯示各式樣的特徵(亦即，接合墊204)。
做為下一步驟，係將晶圓300之分段550撿拾自第一晶粒切割膠帶404，且如圖示地安置於所謂“晶圓支撐系統”405之上。該晶圓支撐系統可邏輯地包含第二晶粒切割膠帶405。然而，該晶圓支撐系統亦可為諸如玻璃、陶質物、疊層、或矽(Si)基板之暫時晶圓支撐系統。在一實施例中，所切割之晶粒202係使用撿拾及安置機器而撿拾自晶粒切割膠帶及安置於該晶圓支撐系統405之上，該撿拾及安置過程將提供具有預定寬度或距離412之縫隙406於個別的分段550之間。
圖13A及13B分別以如側視圖及俯視圖所示地來描繪圖2A及2B中所示的穿通孔可堆疊之半導體元件的第二代表性製造方法中之第四步驟。再以相似於上述所述之旋塗法，針滴法，或其他方式來施加有機材料602至分段650，分段650之平面642與有機材料602之平面654係實質地共平面。
轉向圖14A及14B，圖14A及14B顯示圖2A及2B中所示的穿通孔可堆疊之半導體元件的第二代表性製造方法中之第五步驟。將重塗佈之晶圓300轉移至第二晶圓支 撐系統408之上，該第二晶圓支撐系統可再次地包含玻璃、矽(Si)基板材料、陶質物、及疊層材料。
圖15A及15B分別以如側視圖及俯視圖所示地來描繪圖2A及2B中所示的穿通孔可堆疊之半導體元件的第二代表性製造方法中之第六步驟。在與圖7A及7B中所示之步驟相似的步驟750中，將複數個通孔702形成於有機材料602中，以與接合墊204一致。
圖16A及16B分別以如側視圖及俯視圖所示地來描繪圖2A及2B中所示的穿通孔可堆疊之半導體元件的第二代表性製造方法中之第七步驟850。步驟850再次地相似於圖8A及8B中所示之金屬跡線的金屬圖案化步驟，而將接合墊204之位置電性連接至通孔702之位置。
圖17A及17B分別以如側視圖及俯視圖所示地來描繪圖第2A及2B中所示的穿通孔可堆疊之半導體元件的第二代表性製造方法中之第八步驟905。以導電性材料來封堵，電鍍，或其它方法沈積該等通孔702，以充填通孔702及提供金屬通孔902，如圖所示。
緊隨著該金屬通孔902之形成過程，如描繪第九步驟所說明，如圖18A及18B中所示將通孔晶圓906轉移至另外的晶粒切割膠帶410。
圖19A及19B描繪圖2A及2B中所示的穿通孔可堆疊之半導體元件的第二代表性製造方法中之第十步驟。再使用切割源402以使該通孔晶圓906單粒化成為所繪之該等分段970，而產生縫隙904。做為最後的步驟，緊隨在 該第二單粒化過程之後，可用晶粒撿拾及安置機器而再一次地自晶粒切割膠帶410來移除各個元件200。
圖20係以側視圖來描繪使用晶粒對晶粒之堆疊組態所示的穿通孔可堆疊之半導體元件的第三代表性實施例。一連串之元件200可如圖示地予以堆疊910，以適合特殊的應用，該等金屬通孔902的各個通孔可使用直接孔洞金屬接合法來加以耦接912。如熟習於本項技術之人士將期盼的是，可如圖示地將任何數目之元件200堆疊以實現所企望的實施。
圖21係再以側視圖來描繪使用結合一軟焊糊916的晶粒對晶粒之堆疊組態所示的穿通孔可堆疊之半導體元件的第四代表性實施例。軟焊糊916包含小的焊料粒子與助熔劑之混合物。可結合各式各樣之不同材料的軟焊糊。該軟焊糊916可使用回流軟焊法予以施加，以產生強大的冶金接合於所堆疊之元件914的各個元件之間。
穿通孔可堆疊之半導體元件918的第五代表性實施例係顯示於圖22中。如俯視圖中所示地。本實施例包含多列的接合墊204和多列的通孔902，而適合與金屬跡線206連接。如圖示地，該等通孔902的各個通孔係設置於有機材料602之內。可實施任何數目之具有多列的接合墊204和多列的通孔902之晶粒202的組態。除了此實施例918之外，可實現另一實施例，其中連接所繪的半切除之外邊通孔902至並未座落於晶粒202之有效表面上而是在另外表面上的接合墊204，例如在另外的晶粒202或別處之表 面上以做為特定的實施需求。
穿通孔可堆疊之半導體元件920的第六代表性實施例係顯示於圖23之中。元件920描繪設置在晶粒202之相對側上的接合墊204，跡線206，及一連串半切除之通孔902的另外組態。此處，再次地，該等通孔902係形成於如圖示地設置於晶粒202之各個週邊側的有機材料602中。在所繪實施例920的變化例之中，組態可包含完整的通孔。
穿通孔可堆疊之半導體元件922的第七代表性實施例係描繪於圖24之中。元件922包含一連串之所謂的“仿真”通孔924，該等仿真通孔924係如圖示地設置於晶粒202的相對側。通孔920則如圖示地設置於左手側及右手側。仿真通孔924可透過該元件922來提供電性連接以供特定應用之用。該等仿真通孔924可利用導線接合法而使用來連接額外的元件922或封裝。此外，該等孔924可扮演以做為接地或做為用於輸入/輸出(I/O)信號之線管。
在許許多多的實施例中，可將仿真通孔924組態成為與通孔902在一起。例如可實施多列的，或完整的或半切除的孔924。圖25描繪此一實施例之元件926，該元件926包含在晶粒202左側之一列半切除的仿真通924，及在晶粒202右側之一列穿通孔902，而且再次均設置於有機材料602之中。
圖26描繪穿通孔可堆疊之半導體元件928的第九代表性實施例，繪出使用如圖24及25中所示之仿真通孔902以導線接合法來連接頂部晶粒203的兩個堆疊之晶粒202 及203。一連串之接合墊205係設置於晶粒203的有效表面之上。接合線207連接該等接合墊205至通孔902。介電質的，絕緣的，或接合的材料209係設置於該等晶粒202及203之間，以提供用於該元件/封裝928之結構性支撐。
諸如結合一連串之穿通孔208或902的元件200之半導體元件可在各式各樣的應用中提供許許多多的功能性及可撓性。有機材料210之使用可允許通孔208安置於晶粒202外面，其准許額外的電路於該晶粒202之內且可增強元件200的功能。此外，藉由使用有機材料210來取代晶圓300材料，將增加每個晶圓之個別的產能。在許多的應用中，可視需要地將有機材料組構為變厚，以適應各式各樣的通孔208。
雖然已詳盡地描繪本發明之一或更多個實施例，但熟習於本項技術人士將理解的是，針對該等實施例之修正及變化可予以完成，而不會背離如下文之申請專利範圍中所陳述之本發明的範疇。
100‧‧‧先前技術之方法
102‧‧‧晶片
104‧‧‧接合墊
106‧‧‧可伸縮之膜
108‧‧‧框架
110‧‧‧元件具
112‧‧‧平台
114‧‧‧軸
118‧‧‧切割器
200‧‧‧穿通孔可堆疊之半導體元件
202,203‧‧‧晶粒
204‧‧‧接合墊，隆起墊
206‧‧‧金屬跡線
208‧‧‧通孔
210‧‧‧周圍材料
212‧‧‧頂部表面(有效表面)
216,218‧‧‧側
300‧‧‧晶圓
302‧‧‧切割道導引
400‧‧‧個件
402‧‧‧切割源
404,410‧‧‧晶粒切割膠帶
406,502,904‧‧‧縫隙
504‧‧‧預定之距離
506‧‧‧箭頭
600,700,550,650,970‧‧‧分段
602‧‧‧有機材料
604,606,654,642‧‧‧平面
702‧‧‧通孔
900‧‧‧晶圓組件
902‧‧‧金屬通孔
908‧‧‧完整的通孔
405‧‧‧晶圓支撐系統
408‧‧‧第二晶圓支撐系統
750,850,950‧‧‧步驟
906,910,918,920,922,928‧‧‧穿通孔可堆疊之半導體元件
960‧‧‧通孔晶圓
916‧‧‧軟焊糊
914‧‧‧堆疊之元件
924‧‧‧仿真通孔
205‧‧‧接合墊
207‧‧‧導線接合
圖1描繪典型先前技術之晶圓級晶片尺寸封裝的製作方法；圖2A及2B分別以俯視圖及側視圖來描繪穿通孔可堆疊之半導體元件的一第一實施例；圖3A及3B分別以如側視圖及俯視圖中所示地來描繪圖2A及2B中所示的穿通孔可堆疊之半導體元件的第一代表性製造方法中之一第一步驟； 圖4A及4B分別以如側視圖及俯視圖所示地來描繪圖2A及2B中所示的穿通孔可堆疊之半導體元件的第一代表性製造方法中之一第二步驟；圖5A及5B分別以如側視圖及俯視圖所示地來描繪圖2A及2B中所示的穿通孔可堆疊之半導體元件的第一代表性製造方法中之一第三步驟；圖6A及6B分別以如側視圖及俯視圖所示地來描繪圖2A及2B中所示的穿通孔可堆疊之半導體元件的第一代表性製造方法中之一第四步驟；圖7A及7B分別以如側視圖及俯視圖所示地來描繪圖2A及2B中所示的穿通孔可堆疊之半導體元件的第一代表性製造方法中之一第五步驟；圖8A及8B分別以如側視圖及俯視圖所示地來描繪圖2A及2B中所示的穿通孔可堆疊之半導體元件的第一代表性製造方法中之一第六步驟；圖9A及9B分別以如側視圖及俯視圖所示地來描繪圖2A及2B中所示的穿通孔可堆疊之半導體元件的第一代表性製造方法中之一第七步驟；圖10A及10B分別以如側視圖及俯視圖所示地來描繪圖2A及2B中所示的穿通孔可堆疊之半導體元件的第一代表性製造方法中之一第八步驟；圖11A及11B分別以如俯視圖及側視圖中所示地來描繪結合複數個完整之穿通孔的穿通孔可堆疊之半導體元件的一第二實施例； 圖12A及12B分別以如側視圖及俯視圖所示地來描繪圖2A及2B中所示的穿通孔可堆疊之半導體元件的第二代表性製造方法中之一第三步驟；圖13A及13B分別以如側視圖及俯視圖所示地來描繪圖2A及2B中所示的穿通孔可堆疊之半導體元件的第二代表性製造方法中之一第四步驟；圖14A及14B分別以如側視圖及俯視圖所示地來描繪圖2A及2B中所示的穿通孔可堆疊之半導體元件的第二代表性製造方法中之一第五步驟；圖15A及15B分別以如側視圖及俯視圖所示地來描繪圖2A及2B中所示的穿通孔可堆疊之半導體元件的第二代表性製造方法中之一第六步驟；圖16A及16B分別以如側視圖及俯視圖所示地來描繪圖2A及2B中所示的穿通孔可堆疊之半導體元件的第二代表性製造方法中之一第七步驟；圖17A及17B分別以如側視圖及俯視圖所示地來描繪圖2A及2B中所示的穿通孔可堆疊之半導體元件的第二代表性製造方法中之一第八步驟；圖18A及18B分別以如側視圖及俯視圖所示地來描繪圖2A及2B中所示的穿通孔可堆疊之半導體元件的第二代表性製造方法中之一第九步驟；圖19A及19B分別以如側視圖及俯視圖所示地來描繪圖2A及2B中所示的穿通孔可堆疊之半導體元件的第二代表性製造方法中之一第十步驟； 圖20係以側視圖來描繪使用晶粒對晶粒之堆疊組態所示的穿通孔可堆疊之半導體元件的一第三代表性實施例；圖21係以側視圖來描繪使用結合軟焊糊的晶粒對晶粒之堆疊組態所示的穿通孔可堆疊之半導體元件的一第四代表性實施例；圖22係以如俯視圖所示地來描繪具有多列之接合墊及多列之穿通孔可堆疊之半導體元件的一第五代表性實施例；圖23係以如俯視圖所示地來描繪具有耦接至晶粒之相對側的一列接合墊之一列半切除通孔的穿通孔可堆疊之半導體元件的一第六代表性實施例；圖24係以如俯視圖所示地來描繪結合仿真通孔於相對側的穿通孔可堆疊之半導體元件的一第七代表性實施例；圖25以如俯視圖所示地來描繪結合仿真通孔於單一側的穿通孔可堆疊之半導體元件的一第八代表性實施例；圖26係描繪穿通孔可堆疊之半導體元件的一第九代表性實施例，以用說明使用如圖24及25中所示之仿真通孔而以導線接合法來連接頂部晶粒的兩個堆疊之晶粒。
200‧‧‧穿通孔可堆疊之半導體元件
204‧‧‧接合墊，隆起墊
206‧‧‧金屬跡線
300‧‧‧晶圓
402‧‧‧切割源
404‧‧‧晶粒切割膠帶
602‧‧‧有機材料
900‧‧‧晶圓組件
902‧‧‧金屬(穿)通孔
904‧‧‧縫隙

Claims (17)

  1. 一種製造一半導體元件的方法，該方法包括：提供一晶圓，該晶圓係以一切割道導引來指示；以一第一晶粒切割膠帶來縛起該晶圓；將該晶圓沿著該切割道導引而單粒化成為複數個晶粒，該複數個晶粒具有複數個第一縫隙於該複數晶粒的各個晶粒之間；將晶粒切割膠帶拉長以擴展該複數個縫隙至一預定的距離；自該第一晶粒切割膠帶來撿拾該複數個晶粒；安置該複數個晶粒至一第一晶圓支撐系統之上，以獲得一預定寬度之複數個第二縫隙於該複數個晶粒的各晶粒之間；沈積一有機材料至該複數個縫隙的各個縫隙之內，以提供一重塗佈之晶圓，其中該有機材料的一頂部表面與該複數個晶粒之一第一晶粒的一頂部表面係實質地共平面；轉移該重塗佈之晶圓至一第二晶圓支撐系統之上；形成複數個通孔於該有機材料中；將該複數個通孔的各個通孔圖案化至該複數個晶粒上之複數個接合墊位置的各個接合墊位置；沈積一導電性材料於該複數個通孔的各個通孔中；轉移該重塗佈之晶圓至一第二晶粒切割膠帶之上；以及將該複數個晶粒的各個晶粒單粒化自該晶粒切割膠。
  2. 如申請專利範圍第1項之方法，其中該第一晶圓支撐系統包含一第三晶粒切割膠帶。
  3. 如申請專利範圍第1項之方法，其中該第一或第二晶圓支撐系統包含一玻璃、矽或陶瓷基板。
  4. 如申請專利範圍第1項之方法，其中該有機材料包含一苯并環丁烯(BCB)，聚亞醯胺(PI)，或丙烯酸樹脂材料。
  5. 如申請專利範圍第1項之方法，其中該有機材料係使用一旋塗法或針滴法所施加。
  6. 如申請專利範圍第1項之方法，其中該複數個通孔係使用一雷射孔洞鑽孔法或蝕刻法而形成於該有機材料中。
  7. 如申請專利範圍第1項之方法，進一步包含自該第二晶粒切割膠帶來撿拾該複數個晶粒的各個晶粒。
  8. 一種製造一半導體元件之方法，該方法包括：提供一第一半導體晶粒，其含有形成在該第一半導體晶粒之一第一表面上的一接合墊；沈積一有機材料圍繞該第一半導體晶粒之一週邊表面，其中該有機材料的一表面係實質上與該第一半導體晶粒之該第一表面共平面；形成一通孔於該有材料之中；形成一金屬跡線，用以連接該通孔至該接合墊；以及沈積一導電性材料於該通孔之中。
  9. 如申請專利範圍第8項之方法，其進一步包含使用一旋塗法或針滴法來沈積該有機材料。
  10. 如申請專利範圍第8項之方法，其進一步包含使用 一雷射孔洞鑽孔法或蝕刻法來形成該通孔於該有機材料中。
  11. 如申請專利範圍第8項之方法，進一步包含堆疊一第二半導晶粒於該第一半導體晶粒之上。
  12. 如申請專利範圍第11項之方法，其進一步包含使用一直接孔洞金屬接合法或一軟焊糊來耦合該第二半導體晶粒至該第一半導體晶粒。
  13. 一種半導體裝置，其包含：一第一半導體晶粒，其含有形成在該第一半導體晶粒之一第一表面上的一接合墊；一有機材料，其圍繞圍繞該第一半導體晶粒之一週邊表面；一金屬通孔，其形成於該有材料之中；以及一金屬跡線，其沈積於連接該金屬通孔和接合墊的該第一半導體晶粒之該第一表面之上。
  14. 如申請專利範圍第13項之半導體裝置，其中該有機材料的一表面係實質上與該第一半導體晶粒之該第一表面共平面。
  15. 如申請專利範圍第13項之半導體裝置，其進一步包含安置在該第一半導體晶粒之上並且電性連接至該金屬通孔的一第二半導體晶粒。
  16. 如申請專利範圍第13項之半導體裝置，其進一步包含安置在該有機材料之中並且與該接合墊電性絕緣的一仿真通孔。
  17. 如申請專利範圍第13項之半導體裝置，其中該金屬通孔在單粒化的過程中被切穿。
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