TWI435507B - 多晶片模組、電氣組體及系統、以及形成多晶片模組之方法 - Google Patents

多晶片模組、電氣組體及系統、以及形成多晶片模組之方法 Download PDF

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TWI435507B
TWI435507B TW96105092A TW96105092A TWI435507B TW I435507 B TWI435507 B TW I435507B TW 96105092 A TW96105092 A TW 96105092A TW 96105092 A TW96105092 A TW 96105092A TW I435507 B TWI435507 B TW I435507B
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Taiwan
Prior art keywords
wafer
lead
module
chip
power transistor
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TW96105092A
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English (en)
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TW200737640A (en
Inventor
Jeongil Lee
Myoungho Lee
Bigildis Dosdos
Charles Suico
Man Fai Edwin Lee
David Chong Sook Lim
Adriano Vilas-Boas
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Fairchild Semiconductor
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Publication of TW200737640A publication Critical patent/TW200737640A/zh
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Description

多晶片模組、電氣組體及系統、以及形成多晶片模組之方法 相關申請案之相互參照
本申請案係2006年2月13日提交之美國臨時專利申請案第60/773,034號之正式專利申請案，以及係主張其優先權，其整體而言係藉由參照其全文使合併進此說明書內。
本發明係有關於用於電池電力控制之多晶片模組。
 發明背景
鋰離子電池係有各種保護機構存在。若一個鋰離子電池充電過度，其中便可能會有強烈之放熱反應，以及造成火災的潛在性將會增加。
為防止一個鋰離子電池充電過度，係有一個電池保護電路被使用。此種電池保護電路之一個範例，係顯示在第1圖中，其姑且不論其他，經常係包含有兩個FET(場效電晶體)交換器122、124和一個控制IC(積體電路)120。一個FET可防止電流流進該電池內，而另一個則可防止電流自該電池流出，除非該控制IC使其致能。
有一些內含控制IC和MOSFET之多晶片模組存在。然而，有許多改進可被完成。舉例而言，某些傳統式多晶片模組，在該等封裝之所有四側上面，係包含有引線。此將會造成一些較大之模組，此係屬不利。因為此種模組係被使用在一些類似行動電話等小型電子裝置中。該等多晶片模組之尺寸係可使縮小，但此將會降低該等可被使用在此種封裝內之晶片的電流承載容量。
因此，多晶片模組係需要被改進。
本發明之實施例，係個別地及集體地處理以上諸問題和其他問題。
 發明概要
本發明之實施例，係針對多晶片模組、多晶片模組之製作方法、加上一個用以合併此等多晶片模組之系統和組體。
本發明之一個實施例，係針對一種多晶片模組，其係包含有至少一個積體電路(IC)晶片、至少一個電力裝置晶片、和一個包含有引線之金屬引線框架結構。該金屬引線框架結構，係包含有至少兩個在電氣上彼此隔離之獨立式晶粒安裝墊片。該等至少兩個獨立式晶粒安裝墊片，係包含有一個用以安裝至少一個IC晶片之第一墊片，和一個用以安裝至少一個電力裝置晶片之第二墊片。該多晶片模組，亦可能包含有一些具有超過一種直徑之焊接線，彼等可使該等至少之一個IC晶片和至少之一個電力裝置晶片，連接至該等引線。
本發明之另一個實施例，係針對一種電池保護模組，其係包含有一個積體電路晶片和至少之一個電力裝置晶片，其係裝接在一個單一框架內，而可用以調節一個電池之充電和放電。該框架可能係由一種模製材料來形成。該等積體電路晶片和至少之一個電力裝置晶片，係形成一個電路之至少一部分。該電路所需要之外部配線，係受限於四條引線。
本發明之另一個實施例，係針對一種多晶片模組，其係包含有：一個積體電路(IC)晶片、一個第一電力電晶體、一個第二電力電晶體、一個以電氣方式使該積體電路晶片耦合至第一電力電晶體之第一配線結構、一個以電氣方式使該積體電路晶片耦合至第二電力電晶體之第二配線結構、和一個引線框架結構。該引線框架結構係包含有：一條第一引線、一條第二引線、一條第三引線、和一條第四引線，其中，該等積體電路晶片、第一電力電晶體、和第二電力電晶體，係安裝在該引線框架結構上面。有一種模製材料，覆蓋住至少部份之積體電路晶片、第一電力電晶體、第二電力電晶體、第一配線結構、和第二配線結構。該第一引線可對第一電力電晶體提供電氣配線，以及該第二引線可對第二電力電晶體提供電氣配線。該等第一和第二引線，係在上述多晶片模組之第一端部處，以及該等第三和第四引線，係在上述多晶片模組之第二端部處。至少有一個晶粒安裝墊片，沿此墊片之之兩片相對側部，均未具有外部引線、安裝墊片、或其他之晶粒安裝墊片。
本發明之其他實施例，係針對一些可用以形成上文所說明之多晶片模組、加上一些使用此種模組之組體和系統的方法。
本發明之其他實施例，可參照諸圖和下文之詳細說明來加以說明。
圖式簡單說明
第1圖係顯示一個傳統式電池保護電路圖；第2圖係顯示一個依據本發明之一個實施例的多晶片模組之透視圖。所顯示亦有該多晶片模組之內部組件；第3圖係顯示第2圖中所顯示之模組的側視圖；第4(a)－4(e)圖係顯示上述多晶片組件內之組件的透視圖。第4(a)－4(e)圖係例示一種用以製造第2圖中所顯示之多晶片模組的處理流程；第5圖係顯示一個合併有第2圖中所顯示之多晶片模組的電池保護電路圖；第6圖係顯示第2圖中所顯示之多晶片模組有關的電路圖；第7圖係顯示一個多晶片模組之底視圖；第8圖係顯示一個包含有一個電路基體和安裝在此電路基體上面而顯示在第2圖中之多晶片模組的電氣組體；第9圖係顯示一個包含有一個耦合至第8圖中所顯示之電氣組體的鋰離子電池之系統；第10(a)圖係顯示另一種模組實施例之底視平面圖；第10(b)圖係顯示第10(a)圖內之模組中所使用的引線框架結構和晶粒之頂視圖；而第10(c)圖則係顯示第10(b)圖中所顯示之引線框架結構的頂視圖。
 較佳實施例之詳細說明
所揭示係一種用以調節一個類似行動電話電池等電池之充電的電力半導體交換器和控制IC的積體化。在本發明之實施例中，有一個小外觀尺寸之多晶片模組揭示出，以及其可被安裝在一個小型電路板上面。該小型電路板，可使連接至一個電池匣的一個端部。該多晶片模組可能形成一個電池保護電路的一部分。
誠如上文注意到的，第1圖係顯示一個傳統式電池保護電路。有某些係使用分立式組件，來建立第1圖中所顯示之電路。當許多分立式組件被用來形成第一圖中所顯示之電路時，上述形成之保護電路，最後可能會佔用相當大量之空間。舉例而言，該電路板上面單就該等分立式IC和電力MOSFET而言，可能最少需要八個焊墊。
本發明之實施例，係著重於使上述包封在一個多晶片模組之袖珍型(例如，2 mm x 5 mm)殼架內部的晶片面積為最大。上述多晶片模組內之外部接腳的數目，和該等內在信號路由選擇特徵，在該殼架內係使為極小。
許多不同之特徵，可導致此一類型之袖珍型多晶片模組。首先，上述引線框架結構有關電力MOSFET之晶粒安裝墊片，可自上述多晶片模組之一個側緣，完全延伸至另一個側緣。此將可容許上述晶粒安裝墊片之電力晶片的尺寸為最大，藉以使上述電力MOSFET之電流額定值為最大。其次，自該等電力晶片或IC晶片，並無至上述引線框架結構之“底焊”(down bonds)。第三，該等IC與電力MOSFET之間的配線，係藉由晶片對晶片互連(例如，電接線互連)來製成。第四，彼等外部接腳的數目，和一些與該MOSFET晶粒安裝墊片毗連之信號路由選擇元件係使為最少。藉由使該等外部引線為最少，以及消除“底焊”，上述封裝內之面積可使最大化，而容許有較大之電力MOSFET。上述電力MOSFET之加增尺寸，可使啟通電阻值降低，此可使電力損失為極小，以及可使加熱降低。此最終可使該電池之有用能量增加。
該等依據本發明之實施例的多晶片模組，亦可具有一個特定之診斷測試模態。為避免電流過衝，該MOSFET之交換時間，可藉由該驅動器IC而使減緩。正常運作模態有效性測試，在本發明之實施例中，係需要1200ms之測試時間。上述多晶片模組在正常運作中未被使用之一條引線，係使連接至上述IC上面之一個墊片，其使得該IC能令交換時間縮放10倍之因素，因而容許該有效性測試時間，被降低至120ms。此被降低之測試時間，可增加上述有效性測試運作之產能，以及可降低其產品之製造成本。在本發明之實施例中，上述多晶片模組內旁接IC安裝墊片之一個選擇性第五引線，可專門作用來將該IC設定為上述特定之診斷測試模態。
第2圖係顯示一個依據本發明之一個實施例的多晶片模組200。誠如第2圖中所示，該多晶片模組200，係包含有一個伸長之形狀，以及係包含有一個第一縱向端部200(a)和一個第二對立縱向端部200(b)。該多晶片模組200，在本發明之實施例中，可具有一個大於1之長寬比。誠如下文進一步之細節中所解釋，此一特定之外觀尺寸，在被使用在一個配合一個可充電之電池一起使用的電氣組體內時，將可使空間為最小。
該多晶片模組200，係包含有一個引線框架結構210。此範例中之引線框架結構210，係包含有一個第一晶粒安裝墊片210(a)－1和一個第二晶粒安裝墊片210(a)－2，彼等係藉由一個間隙214使彼此分隔。該間隙214在電氣上，可使該等第一和第二晶粒安裝墊片210(a)－1、210(a)－2相隔離，而使任何在該等墊片上面之晶片，在電氣上不會透過該引線框架結構210直接連接在一起。
在其他之實施例中，該間隙214並不需要存在。舉例而言，其中有可能的是具有一個單一安裝墊片，接著是任何安裝在此單一安裝墊片上面之晶片的一個或兩者之下方，使具有一片介電質層。此介電質層則將可使該等晶片之底部表面，在電氣上彼此相隔離。
該引線框架結構210，亦包含有一些繫桿224。(參考數字224指向一些範例性繫桿；在此一特定範例中，在該封裝之一側上面，係具有6條繫桿，以及該封裝之繫桿的總數為12)。該等繫桿224係使側向延伸，而離開該等第一和第二晶粒安裝墊片210(a)－1、210(a)－2。該等繫桿224可在處理期間，被用來使許多引線框架結構，一起連接在一個引線框架結構陣列中。
誠如第2圖中所示，該引線框架結構210，在此引線框架結構210之一個縱向端部處，以及在該模組200之一個縱向端部處，亦包含有兩條引線210(b)－1、210(b)－2(舉例而言，第一和第二引線)，該引線框架結構210，在該等引線框架結構210和模組200之另一個縱向端部處，亦包含有兩條引線210(b)－3、210(b)－4(舉例而言第三和第四引線)有一個選擇性測試引線210(c)，係相對於該第二安裝墊片210(a)－2而側向佈置。誠如第2圖中所示，在該模組200中，係僅有四個必需之引線210(b)－1、210(b)－2、210(b)－3、210(b)－4。
在此範例中，該等引線210(b)－1、210(b)－2、210(b)－3、210(b)－4，係使與該等第一和第二晶粒安裝墊片210(a)－1、210(a)－2相隔離，但倘若該模組200被使用在一個不同類型之電路中，前者係可使連接至後者(例如，與後者積體化)。
該引線框架結構210，係由任何內含銅和其合金等適當材料來構成。在某些實施例中，該引線框架結構210，可預先鍍以NiPdAu或鍍以可焊接式材料(例如，Sn)。
該半導體晶片204，係包含有電力電晶體，以及係使安裝在該第一安裝墊片210(a)－1上面。有一個控制IC晶片215，係使安裝在該第二晶粒安裝墊片210(a)－2上面。
在此實施例中，上述包含有電力電晶體之半導體晶片204，係包含有一個第一MOSFET 204(m)－1，其係包含有在晶片204之第一表面處的一個第一源極區域204(s)－1和一個第一閘極區域204(g)－1，和在晶片204之第二表面處的一個汲極區域204(d)。該第一MOSFET，在此範例中，將為一個垂直MOSFET，因為該等源極區域204(s)－1和汲極區域204(d)，係在該晶片204之相對側部處。在此範例中，該晶片204之第二表面，係緊接該引線框架結構210。
雖然電力MOSFET已詳細加以說明，在本發明之實施例中，係可使用任何適當之垂直電力電晶體。彼等垂直電力電晶體，係包含有VDMOS電晶體和垂直雙極性電晶體。一個VDMOS電晶體，係一個具有兩個或更多以擴散作用形成之半導體區域的MOSFET。其係具有一個源極區域、一個汲極區域、和一個閘極。該裝置係呈垂直狀，其中，該等源極區域和汲極區域，係在上述半導體晶粒之相對表面處。該閘極可能係一種溝道狀閘極結構或平面形閘極結構，以及係與源極區域形成在同一表面處。溝道狀閘極結構係屬較佳，因為溝道狀閘極結構係較狹窄，以及係比平面形閘極結構佔用較少之空間。在運作期間，一個VDMOS裝置中自源極區域流至汲極區域之電流，大體上係與該晶粒表面相垂直。
該半導體晶片204，亦包含有一個第二MOSFET 204(m)－2，其係包含有在晶片204之第一表面處的一個第二源極區域204(s)－2和一個第二閘極區域204(g)－2。該第二MOSFET 204(m)－2，亦包含有一個在晶片204之第二表面處的一個汲極區域204(d)。在此範例中，該等第一和第二MOSFET 204(m)－1、204(m)－2，係共用一個共用基體，其係一個共用汲極。(在第2圖中，該等界定一些類似晶片204中之源極區域等區域的擴散區域並未例示出)。該等第一和第二MOSFET 204(m)－1、204(m)－2之汲極區域204(d)，在電氣上係可使耦合至該安裝墊片210(a)－1。
在第2圖內所顯示之特定範例中，在一個單一晶片中，係存在有兩個MOSFET。然而，在其他之實施例中，在該晶片204內，可能僅有一個MOSFET，或者在該第一晶粒安裝墊片210(a)上面，可能係安裝兩個分開之晶片。此外，雖然所顯示係兩個MOSFET，但是在其他之實施例中，倘若其目標應用係不同於第1圖中所顯示之電池保護電路，其便有可能僅使用一個MOSFET。
有許多配線結構，可被使用來使該等晶片以電氣方式相耦合，以及/或者在電氣上使該等晶片與引線相耦合。一些配線結構之範例，係包括電接線或電導性夾扣。此類配線結構，可能係由任何包括金等貴金屬或銅或彼等之合金等金屬之適當材料所構成。在第2圖中所顯示之多晶片模組200中，該等配線結構係呈電接線之形式。
參照第2圖，有多數屬第一直徑之電接線206(a)－1、206(a)－2，可使該等MOSFET之源極區域204(s)－1、204(s)－2，在電氣上耦合至該等引線210(b)－1、210(b)－2。有一些屬第二直徑之電接線220、222，可使該IC晶片215，在電氣上耦合至該等引線210(b)－3、210(b)－4。該等連接至源極區域204(s)－1、204(s)－2之電接線206(a)－1、206(a)－2，係具有比起該等連接至IC晶片215之電接線220、222者更大之直徑，因為前者比起後者係承載更多之電流。
一些可能存在於上述多晶片模組200內之附加電接線，係包括電接線218(g)－1、218(g)－2，彼等可使該IC晶片215連接至該等閘極區域204(g)－1、204(g)－2。另一條電接線208(s)－1，可使該IC晶片215，在電氣上耦合至上述晶片204內之一個MOSFET的源極區域204(s)－1。尚有之另一條電接線212，可使該測試引線210(c)，在電氣上耦合至該IC晶片215。
上述之模製材料202，可覆蓋至少部份之引線框架結構210、電力電晶體晶片204、和IC晶片215。該模製材料202，可能係由環氧基樹脂材料或任何其他適當之材料來構成。誠如第2圖中所示，引線210(b)－1、210(b)－2、210(b)－3、210(b)－4之終端，並未延伸過上述模製材料202之側表面。第2圖中所顯示之多晶片模組200，係可被特性化為一種MLP(微引線封裝)類型之封裝。
在第2圖內之多晶片模組200中，並無“底焊”或至上述安裝墊片210(a)－1下方之絲焊。舉例而言，有一條電接線208(s)－1，被用來使該IC晶片215，經由該等晶片204、215之頂表面，連接至該晶片204內之第一MOSFET 204(m)－1的源極區域204(s)－1。由於該多晶片模組200內並無“底焊”存在，該底焊否則將要使用之空間，便可被該晶片204佔用，因而可極大化上述多晶片模組200之邊界內的晶片204之尺寸。
該多晶片模組200，亦可能包含有一個可選擇之專屬性測試引線210(c)。使用該測試引線210(c)，可更快速地測試該封裝。使用該測試引線210(c)，上述之IC晶片215可重新加以程式規劃，以致測試可更快速地被執行。誠如上文所解釋，在此項特徵之下，比起無該專屬性測試引線210(c)，測試之發生係可使更快10倍。
第3圖係顯示第2圖中所顯示之模組的側視圖。第3圖中之組件，係參照第2圖來加以說明，以及相似之數字係指明相似之元件。第3圖係另外顯示上述引線框架結構210之部份蝕刻區域210(d)(舉例而言，半蝕刻區域)。該模製材料202，係充填至該等半蝕刻區域210(d)和模製材料202所形成之空間，可將該引線框架結構210鎖進位置內。濕式蝕刻程序，可如本技藝中所常見，被用來形成該等部份蝕刻區域210(d)。
第3圖亦顯示出，上述引線框架結構210之底部外部表面，大體上可能係與上述模製材料202之外部表面共平面。該多晶片模組200，可使直接安裝至一片電路板等物，以及上述引線框架結構210之暴露表面，可被用來自該電力晶片204，使熱量轉移至一片電路板(未示出)上面之下層墊片。
一個用以形成上述模組200之方法，係參照第4(a)－4(e)圖來加以說明。
第4(a)－4(e)圖係顯示一個內含一個第一晶粒安裝墊片210(a)－1和第二晶粒安裝墊片210(a)－2的引線框架結構210。該引線框架結構210，可以任何包括蝕刻、壓印等適當之方法來得到。
誠如第4(b)圖中所示，一種類似載銀環氧基樹脂或焊接劑材料(含鉛或不含鉛)等電導性材料230(a)－1、230(a)－2，接著係分別施加至該等第一和第二晶粒安裝墊片210(a)－1、210(a)－2。該電導性黏合劑230(a)－1、230(a)－2，可藉由一種塗敷程序或點膠程序，使施加至該等第一和第二晶粒安裝墊片210(a)－1、210(a)－2。該黏合劑在其他之實施例中，亦可能屬非導電性。
誠如第4(c)圖中所示，該等晶片204、215，接著係使裝接至該等第一和第二晶粒安裝墊片210(a)－1、210(a)－2。任何包括撿選暨安置程序等適當程序，可被用來將該等晶片204、215，安裝在該等安裝墊片210(a)－1、210(a)－2上面。
誠如第4(d)圖中所示，先前所說明之電接線(例如，包括電接線206(a)－1、206(a)－2)，如先前所說明，係使接合至該等晶片204、215，加上至上述引線框架結構210中之引線。一些適當之絲焊程序(例如，超聲波接合)，係為本技藝之一般從業人員所習見。
誠如第4(e)圖中所示，有一種模製材料202，接著係使用一種傳統式模製程序，使形成在至少部份之引線框架結構210、晶片204、215、和各種電接線(例如，206(a)－1、206(a)－2)四周。
第5圖係顯示一個合併先前所說明之多晶片模組200的電路圖。參照第2和5圖兩者，B－係對應於引線210(b)－1，P－係對應於引線210(b)－2，Vdd係對應於引線210(b)－3，以及VM係對應於引線210(b)－4。第5圖中之多晶片模組200，有利的是合併第1圖中之簡圖內的許多電子組件。該多晶片模組200，可使上述電池保護電路之形成更加容易，因為上述電路之許多組件，係存在於一個單一小型外觀尺寸模組。
第6圖係顯示上述模組200之組件的內部電路圖。在第6圖中，係有一個IC晶片215和兩個MOSFET 204(m)－1、204(m)－2，彼等係受到上述IC晶片215之控制。參照第2和6圖，IC晶片端子Vss，可能係連接至電接線208(s)－1，端子DO可能係連接至電接線218(g)－1，端子VM可能係連接至電接線222，以及端子CO可能係連接至電接線218(g)－2。將該模組200安裝至一個電路板，亦比將許多分立式組件安裝至一個電路板來的更容易。
第7圖係顯示上述模組200之底視圖。在此圖中，先前所說明之測試引線係未示出。誠如第7圖中所示，該模組200之底部表面，係包括該等晶粒安裝墊片210(a)－1、210(a)－2之暴露表面，加上該等引線210(b)－1、210(b)－2、210(b)－3、210(b)－4之暴露表面。誠如所顯示，上述模製材料202之外部表面，大體上係與該等引線210(b)－1、210(b)－2、210(b)－3、210(b)－4和晶粒安裝墊片210(a)－1、,210(a)－2之暴露外部表面共平面。誠如所顯示，在長度上，一個尺度可能約為2.0 mm，以及另一個縱向尺度可能約為5.0 mm。此範例中之模組，係具有一個大於2之長寬比。
第8圖係顯示一個包含有一個電路板302和此電路板上面所安裝之模組200的電氣組體300。其他之電氣組件304，亦可使安裝至該電路板302。
第9圖係顯示一個包含有先前所說明連接至一個鋰離子電池400之電氣組體300的系統。誠如第8和9圖中所示，上述模組200之特定外觀尺寸。可容許與鋰離子電池400一起使用之電池保護電路較為輕巧。
第10(a)圖係顯示另一種模組實施例之底視平面圖。第10(b)圖係顯示第10(a)圖內之模組中所使用的引線框架結構和晶粒之頂視圖。第10(c)圖係顯示第10(b)圖中所顯示之引線框架結構的頂視圖。在第10(a)－10(c)圖中，許多參考數字早已在上文說明過。
第10(a)圖中之實施例，可與上文第2－4圖所說明之實施例相類似。然而，在此實施例中，該模組係具有一個測試引線210(c)，其係在該模組之端部處，而非在該模組之側部(舉例而言，如同在第2圖中)。在此範例中，該測試引線210(c)，係在引線210(b)－3與210(b)－4之間。而且，誠如第10(b)和10(c)圖中所示，該引線框架結構210，比起上文參照第2－4圖所說明之引線框架結構210，係可具有較少之繫桿224(舉例而言，每邊3條繫桿，而非每邊6條繫桿)。此等改變可有助於降低鋸割期間之機械應力(相較於參照第2－4圖所說明之實施例)。而且，藉由在該模組之端部處，設置上述之測試引線210(c)，上述之第二安裝墊片210(a)－2係可使較寬，以及可容納一個較大之IC晶片。
此外，該等引線210(b)－1、210(b)－2、210(b)－3、210(b)－4，與第2－4圖內之引線框架結構210相較，在第10(b)－10(c)圖內之引線框架結構210中係略長。藉由使用較長之引線，該等模組與電路板之間的焊點之尺寸可使增加。
該等依據本發明之實施例的多晶片模組，可被使用在各種系統中，諸如無線電話系統、膝上型電腦、伺服器電腦、電源供應器、等等。
"a"、"an"、或"the"之任何陳述，係意指"one or more"(一個或多個)，除非另有明確的指示。
上文之說明內容係屬例示性，而非有限制意。本發明之許多變更形式，將可在檢閱此專利申請說明書下，為本技藝之專業人員所明瞭，本發明之界定範圍，因而在決定上並非參照上文之說明，而是應由此申請中之專利請求項連同彼等之全部界定範圍或等效體來決定。
120．．．控制IC(積體電路)
122,124．．．FET(場效電晶體)交換器
200．．．多晶片模組
200(a)．．．第一縱向端部
200(b)．．．第二縱向端部
202．．．模製材料
204．．．半導體晶片
204(d)．．．汲極區域
204(g)－1．．．第一閘極區域
204(g)－2．．．第二閘極區域
204(m)－1．．．第一MOSFET
204(m)－2．．．第二MOSFET
204(s)－1．．．第一源極區域
204(s)－2．．．第二源極區域
206(a)－1,206(a)－2．．．電接線
208(s)－1．．．電接線
210．．．引線框架結構
210(a)－1．．．第一晶粒安裝墊片
210(a)－2．．．第二晶粒安裝墊片
210(b)－1,210(b)－2,210(b)－3,210(b)－4．．．引線
210(c)．．．選擇性測試引線
210(d)．．．部份蝕刻區域
212．．．電接線
214．．．間隙
215．．．控制IC晶片
218(g)－1,218(g)－2．．．電接線
220,222．．．電接線
224．．．繫桿
230(a)－1,230(a)－2．．．電導性材料
300．．．電氣組體
302．．．電路板
304．．．電氣組件
400．．．鋰離子電池
第1圖係顯示一個傳統式電池保護電路圖；第2圖係顯示一個依據本發明之一個實施例的多晶片模組之透視圖。所顯示亦有該多晶片模組之內部組件；第3圖係顯示第2圖中所顯示之模組的側視圖；第4(a)－4(e)圖係顯示上述多晶片組件內之組件的透視圖。第4(a)－4(e)圖係例示一種用以製造第2圖中所顯示之多晶片模組的處理流程；第5圖係顯示一個合併有第2圖中所顯示之多晶片模組的電池保護電路圖；第6圖係顯示第2圖中所顯示之多晶片模組有關的電路圖；第7圖係顯示一個多晶片模組之底視圖；第8圖係顯示一個包含有一個電路基體和安裝在此電路基體上面而顯示在第2圖中之多晶片模組的電氣組體；第9圖係顯示一個包含有一個耦合至第8圖中所顯示之電氣組體的鋰離子電池之系統；第10(a)圖係顯示另一種模組實施例之底視平面圖；第10(b)圖係顯示第10(a)圖內之模組中所使用的引線框架結構和晶粒之頂視圖；而第10(c)圖則係顯示第10(b)圖中所顯示之引線框架結構的頂視圖。
200．．．多晶片模組
200(a)．．．第一縱向端部
200(b)．．．第二縱向端部
202．．．模製材料
204．．．半導體晶片
204(d)．．．汲極區域
204(g)－1．．．第一閘極區域
204(g)－2．．．第二閘極區域
204(m)－1．．．第一MOSFET
204(m)－2．．．第二MOSFET
206(a)－1,206(a)－2．．．電接線
208(s)－1．．．電接線
210．．．引線框架結構
210(a)－1．．．第一晶粒安裝墊片
210(a)－2．．．第二晶粒安裝墊片
210(b)－1,210(b)－2,210(b)－3,210(b)－4．．．引線
210(c)．．．選擇性測試引線
212．．．電接線
214．．．間隙
215．．．控制IC晶片
218(g)－1,218(g)－2．．．電接線
220,222．．．電接線
224．．．繫桿

Claims (20)

  1. 一種多晶片模組，其係包含有：至少一個積體電路(IC)晶片；至少一個電力裝置晶片；一個包含有引線且包括至少兩個在電氣上彼此隔離之獨立式晶粒安裝墊之金屬引線框架結構，該等至少兩個獨立式晶粒安裝墊係包含有一個用以安裝至少一個IC晶片之第一墊，和一個用以安裝至少一個電力裝置晶片之第二墊；和一些具有超過一種直徑之接合線，其連接該至少一個IC晶片和該至少一個電力裝置晶片至該等引線。
  2. 如申請專利範圍第1項之模組，其中係包含有自一個晶片至另一個晶片之一線接合配線。
  3. 如申請專利範圍第1項之模組，其中該等安裝墊係暴露在該模組之背側上，以及其中該多晶片模組係包含有一種環氧樹脂模製材料。
  4. 如申請專利範圍第1項之模組，其中該引線框架結構係包含有一條專屬性測試引線。
  5. 如申請專利範圍第1項之模組，其中該等接合線係連接至與該等晶粒安裝墊分離之該引線框架的引線。。
  6. 一種多晶片模組，其係電池保護多晶片模組，包含有：一個積體電路晶片；一個電力裝置晶片，其係裝接在一個單一殼架內，用以調節一個在該多晶片模組之外部的電池之充電和 放電，該積體電路晶片和該至少一個電力裝置晶片係形成一個電路之至少一部分，以及其中連接至該電路所需要之外部配線係受限於四條引線。
  7. 一種多晶片模組，其係包含有：一個積體電路晶片；一個第一電力電晶體；一個第二電力電晶體；一個以電氣方式使該積體電路晶片耦合至該第一電力電晶體之第一配線結構；一個以電氣方式使該積體電路晶片耦合至第二電力電晶體之第二配線結構；和一個引線框架結構，其係包含有一條第一引線、一條第二引線、一條第三引線、和一條第四引線，其中該積體電路晶片、該第一電力電晶體、和該第二電力電晶體係安裝在該引線框架結構上；以及一種模製材料，其覆蓋住該積體電路晶片、該第一電力電晶體、該第二電力電晶體、該第一配線結構、和該第二配線結構之至少部分，其中該引線框架結構之外部係實質上與該模製材料之外部共平面，其中該第一引線對該第一電力電晶體提供電氣配線，以及該第二引線對該第二電力電晶體提供電氣配線，以及其中該等第一和第二引線係在該多晶片模組之一第一端部處，以及該等第三和第四引線係在該多晶片 模組之一第二端部處。
  8. 如申請專利範圍第7項之多晶片模組，其中該引線框架進一步係包含有一個測試引線和一個接合結構，該接合結構以電氣方式使該測試引線與該積體電路晶片相耦合，以及其中該引線框架結構中之引線係僅包含有該測試引線、和該等第一、第二、第三、和第四引線。
  9. 如申請專利範圍第7項之多晶片模組，其中該多晶片模組係具有一種伸長之形狀和大於1之長寬比。
  10. 如申請專利範圍第7項之多晶片模組，其中該等第一電力電晶體和第二電力電晶體係在一個單一電力晶片內，以及該等第一電力電晶體和第二電力電晶體係屬垂直電力MOSFET。
  11. 如申請專利範圍第7項之多晶片模組，其中該等第一和第二接合結構係屬接線，以及其中該引線框架結構係包含有一個第一晶粒安裝墊和一個第二晶粒安裝墊，該積體電路晶片係安裝在該第一晶粒安裝墊上，以及該等第一和第二電力電晶體係存在於一個或多個晶片內，該等一個或多個晶片係安裝在該第二晶粒安裝墊上。
  12. 如申請專利範圍第11項之多晶片模組，其中該引線框架結構進一步係包含有一個測試引線，其係以電氣方式耦合該積體電路晶片。
  13. 如申請專利範圍第11項之多晶片模組，其中該引線框架結構之外部表面係透過該模製材料暴露出。
  14. 一種電氣組體，其係包含有：一個電路板；和上述如專 利請求項第7項之多晶片模組，其係安裝在該電路板上。
  15. 一種電氣系統，其係包含有：上述如專利請求項第14項之電氣組體；和一個以電氣方式耦合至該電氣組體之可充電式電池。
  16. 一種形成一多晶片模組之方法，其包含之步驟有：得到一個引線框架結構，其係包含有一條第一引線、一條第二引線、一條第三引線、和一條第四引線；將一個積體電路晶片安裝至該引線框架結構；將至少一個包含有一個第一電力電晶體和一個第二電力電晶體之半導體晶片安裝至該引線框架結構上；將一個第一配線結構附接至該積體電路晶片，以及附接至該第一電力電晶體；將一個第二配線結構附接至該積體電路晶片，以及附接至該第二電力電晶體；以及將一種材料模製在該積體電路晶片、該第一電力電晶體、該第二電力電晶體、該第一配線結構、和該第二配線結構之至少部分的周圍，藉以形成該多晶片模組，其中該引線框架結構之外部係實質上與該模製材料之外部共平面，其中該第一引線提供一個電氣配線給該第一電力電晶體，以及該第二引線提供一個電氣配線給該第二電力電晶體，以及其中該等第一和第二引線係在該多晶片模組之第一端部處，以及該等第三和第四引線係在該多晶片模組 之第二端部處。
  17. 如申請專利範圍第16項之方法，其中該引線框架結構進一步係包含有一個測試引線、以及其中該方法進一步包含之步驟有：將一個第三配線結構附接至該積體電路晶片，以及附接至該測試引線。
  18. 如申請專利範圍第16項之方法，進一步包含之步驟有：將該多晶片模組附接至一個電路板。
  19. 一種形成一多晶片模組之方法，其包含之步驟有：得到一個金屬引線框架結構，其係包含有一些引線及包括在電氣上彼此相隔離之至少兩個獨立式晶粒安裝墊，該等至少兩個獨立式晶粒安裝墊係包含有：一個用以安裝至少一個IC晶片之第一墊，和一個用以安裝至少一個電力裝置晶片之第二墊；將該等至少一個IC晶片安裝至該第一墊；將該等至少一個電力裝置晶片安裝至該第二墊；以及將一些具有超過一種直徑的接合線附接至該等至少一個IC晶片，以及將該等至少一個電力裝置晶片附接至該等引線。
  20. 如申請專利範圍第19項之方法，其中進一步包含之步驟有：將一種模製材料模製在該金屬引線框架結構、該等至少一個IC晶片、該等至少一個電力晶片、和該等接合線之至少一部分之周圍。
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KR200412109Y1 (ko) 2006-01-13 2006-03-22 주식회사 아이티엠반도체 배터리 보호기능을 구비한 패키징 아이씨

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WO2007095468A3 (en) 2008-05-15
CN101443979B (zh) 2013-05-22
TW200737640A (en) 2007-10-01
DE112007000352T5 (de) 2009-04-02
US8003447B2 (en) 2011-08-23
CN102354690A (zh) 2012-02-15
US20070187807A1 (en) 2007-08-16
MY144406A (en) 2011-09-15
KR101399481B1 (ko) 2014-05-27
CN101443979A (zh) 2009-05-27
US7868432B2 (en) 2011-01-11
KR20080105077A (ko) 2008-12-03
WO2007095468A2 (en) 2007-08-23
JP2009527109A (ja) 2009-07-23
US20110078899A1 (en) 2011-04-07

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