TWI413167B - 於淺溝槽隔離轉角處加入植入物之方法 - Google Patents

於淺溝槽隔離轉角處加入植入物之方法 Download PDF

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TWI413167B
TWI413167B TW096132663A TW96132663A TWI413167B TW I413167 B TWI413167 B TW I413167B TW 096132663 A TW096132663 A TW 096132663A TW 96132663 A TW96132663 A TW 96132663A TW I413167 B TWI413167 B TW I413167B
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Hung Q Doan
Eric G Stevens
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Omnivision Tech Inc
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    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
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Description

於淺溝槽隔離轉角處加入植入物之方法
本發明大體係關於在半導體設備中製造積體電路的方法。更特定言之，本發明係關於在影像感應器之淺溝槽隔離轉角處製造植入物以抑制表面暗電流。
通常，金屬或晶格缺陷、表面狀態，及晶格壓力在影像感應器中產生暗電流。暗電流是一種經產生於半導體基板中並由檢光器集中之不良訊號。在檢光器有光照與無光照時皆會產生暗電流。暗電流加入雜訊，其縮小影像感應器之動態範圍並降低其訊雜比。
淺溝槽隔離可在物理上隔離像素以使得在任何給定像素中所集中之訊號不會溢出至相鄰之像素或像素組上。不幸地，因為各種STI特徵會產生額外之表面狀態及局部化之高壓區，所以其很可能產生表面暗電流。具有STI區之影像感應器(諸如互補金氧半導體(CMOS)影像感應器)在STI溝槽之側壁及底部處遭受高表面暗電流。通常，在STI之側部及底部執行高角度植入物以減少表面暗電流。此外，轉角植入物進一步抑制表面暗電流。
圖1 根據先前技術展示具有淺溝槽隔離區之半導體基板的剖視圖。基板10 包括具有一具有轉角植入物13 及側壁植入物14 之溝槽的STI。一種用於製造轉角植入物13 之習知之方法需要形成並圖案化設備上之光阻遮罩12 且需要將摻雜物(由箭頭代表)植入淺溝槽之轉角中。不幸地，光阻遮罩12 之形成及圖案化在半導體設備之製造中產生一額外之處理步驟。
形成轉角植入物13 之另一方法為自半導體基板之淺溝槽區之側壁及轉角移除硬式遮罩(未圖示)並接著同時植入側壁及轉角兩者。不幸地，在製造過程期間經執行之後續蝕刻可能在STI之轉角植入物處產生不良之矽凹坑。
因此，需要一種影像感應器以減少側壁植入物中之表面暗電流。
此外，需要提供一種用於形成一自對準之淺溝槽隔離之方法。
此外，需要形成在影像感應器之後續處理期間不會在STI轉角中產生矽凹坑之轉角植入物。
本發明旨在克服上文所闡述之問題之一或多者。本發明係關於一種用於製造在淺溝槽隔離區中具有轉角植入物之影像感應器的方法。該方法包括在半導體基板上形成一於蝕刻終止層上之第一硬式遮罩層並在該硬式遮罩層上提供一光阻遮罩的步驟。光阻遮罩經圖案化以產生一開口，且第一硬式遮罩層之經暴露於開口中之部分經向下蝕刻至蝕刻終止層。接著將第一摻雜物穿過經暴露之蝕刻終止層植入半導體基板中。移除光阻遮罩，且在剩餘之結構上形成第二硬式遮罩層並將其蝕刻以沿著該第一硬式遮罩層之側邊形成側壁間隔物。經定位於側壁間隔物之間之蝕刻終止層及半導體基板接著經蝕刻以形成溝槽及經植入於溝槽之側壁及底壁中之第二摻雜物。接著通常以介電材料填充溝槽以在半導體基板中產生淺溝槽隔離區。
本發明藉由形成不會導致矽凹坑之具有自對準之淺溝槽隔離的轉角植入物而具有減少表面暗電流的優點。
本發明包括一種用於在積體電路之STI區中形成轉角植入物之方法。植入物自對準於STI轉角而無需額外之光阻遮罩或暴露STI轉角(其可能導致矽凹坑)。本發明參看展示本發明之示範性實施例之隨附圖示而描述。然而，本發明可以許多不同之形式來體現，且不應被理解為限於本文所闡述之實施例；而是，提供此等實施例以向熟習此項技術者充分地傳達本發明之概念。圖示不按比例且為了清晰性誇示了許多部分。
參看圖2 ，展示一根據本發明之實施例中之半導體基板及第一硬式遮罩層之剖視圖。在一根據本發明之實施例中，半導體基板20 為矽、碳化矽、絕緣體上矽、矽－鍺、氮化鎵，或砷化鎵。此外，半導體基板20 可為n型、p型或未經摻雜之基板。另外，半導體基板20 可視需要具有傳導類型與半導體基板20 之傳導類型相同或相反之磊晶層(未圖示)。半導體基板20 亦可含有經植入於彼處之傳導類型與磊晶層或半導體基板20 之傳導類型相同或相反之井。
蝕刻終止層21 經形成於半導體基板20 之表面上。在根據本發明之一實施例中，蝕刻終止層21 經形成為二氧化矽或多晶矽之薄層。二氧化矽蝕刻終止層經成長於通常在800－1200℃之氧或蒸汽中之基板上。替代地，可由氧化物化學氣相沈積來將蝕刻終止層21 直接沈積於半導體基板20 之表面上。氧化物化學氣相沈積由低壓低溫沈積或電漿增強化學氣相沈積來完成。
第一硬式遮罩層22 經由諸如低壓化學氣相沈積(LPCVD)或電漿增強化學氣相沈積(PECVD)之傳統方法而經沈積於蝕刻終止層21 上。第一硬式遮罩層22 經組態為經沈積或經成長於該設備上之任何遮罩層。硬式遮罩層之實例包括(但並不限於)氮化矽、多晶矽及金屬薄膜。
圖3 展示一根據本發明之實施例中之具有經蝕刻之第一硬式遮罩層之半導體基板的剖視圖。光阻遮罩23 經包覆於第一硬式遮罩層22 上並經圖案化以形成開口18 。接著執行一各向異性蝕刻以移除第一硬式遮罩層22 之經暴露於開口18 中之部分。第一硬式遮罩層22 中之開口19 之寬度寬於將經形成於半導體基板20 上之淺溝槽之寬度。
參看圖4 ，展示一根據本發明之實施例中之具有淺植入物之半導體基板的剖視圖。在一根據本發明之實施例中，通常將淺植入物24 植入至一100與500A之間之深度。光阻遮罩23 及第一硬式遮罩層22 充當用於半導體基板之中間不形成淺植入物之區的保護性遮罩。淺植入物24 為一具有與影像感應器中之檢光器(未圖示)之傳導類型相反之傳導類型之摻雜物。在一根據本發明之實施例中，摻雜物為n型摻雜物，諸如磷、砷，或銻。在根據本發明之另一實施例中，摻雜物為p型摻雜物，諸如硼、鋁、鎵或銦。
植入物能量視所使用之特定摻雜物而定，且用於植入物深度通常在100與500A之間之植入物能量通常為5－200 KeV。植入物輪廓分布之約束條件為植入物摻雜物保持在基板20 之表面附近。若熱處理發生於植入之後，則該摻雜物將傳播出初始植入物區。在選擇初始植入物之深度及基本摻雜物之濃度時計算此傳播。
接著由氧化物灰化處理、經混合有過氧化物之濕法硫酸，或溶劑化學法將光阻遮罩23 移除。在一根據本發明之實施例中若為第一硬式遮罩層22 使用適當之厚度，則將光阻遮罩23 移除且第一硬式遮罩層為用於植入物之保護性遮罩。根據本發明之另一實施例中，在各向異性地蝕刻第一硬式遮罩層22 之前，基板20 上形成淺植入物24 。
圖5 展示一根據本發明之實施例中之具有第二硬式遮罩層之半導體基板的剖視圖。第二硬式遮罩層25 經沈積於第一硬式遮罩層22 及蝕刻終止層21 之經暴露之部分上。第二硬式遮罩層25 可為與第一硬式遮罩層22 相同或不同之材料。在一根據本發明之實施例中，第二硬式遮罩層25 為一種在STI各向異性蝕刻期間移除率較矽之移除率低之材料。
參看圖6 ，展示一根據本發明之實施例中之具有經蝕刻之第二硬式遮罩層之半導體基板的剖視圖。各向異性蝕刻(諸如電漿蝕刻)被用於形成沿著第一硬式遮罩層22 之側部之側壁間隔物26 。將側壁間隔物26 定位於淺植入物24 之周邊部分上。在一根據本發明之實施例中，各側壁間隔物26 之寬度通常為0.05及0.2 μm之間。側壁間隔物26 之寬度主要受控於第二硬式遮罩層25 (見圖5)之厚度。
圖7 展示一根據本發明之實施例中之具有淺溝槽之半導體基板的剖視圖。淺溝槽40 藉由各向異性地蝕刻穿過淺植入物24 並進入半導體基板20 中而形成。淺溝槽40 經形成於半導體基板20 中之側壁間隔物26 之間的區域中。轉角植入物27 為淺植入物24 之唯一保持於基板20 中之部分。藉由蝕刻穿過第二硬式遮罩層25 中之開口19 ，轉角植入物27 之內邊緣自對準於第二硬式遮罩層25 之內邊緣。
在一根據本發明之實施例中，淺溝槽40 之深度通常在0.3與0.5 μm之間且其寬度通常在0.15與0.6 μm之間。淺溝槽40 之寬度可盡可能地小以使得用於STI區之半導體基板量最小。最小化STI區之大小有利地增大了用於影像感應器中之檢光器之可用基板量。
參看圖8 ，淺溝槽40 之側壁及底部經植入有植入物摻雜物28 。在一根據本發明之實施例中，通常將植入物摻雜物28 植入距基板20 之經暴露之表面0與100A之間之深度且植入物摻雜物28 之濃度通常在1012 －1013 atoms/cm2 之間。此植入物通常經製造為傾斜的且四方的(意即，在晶圓以九十度間隔分別旋轉四次之情況下來製造)以將植入物摻雜物28 植入至淺溝槽40 之所有四側及底部。
植入物摻雜物28 具有與轉角植入物27 之傳導類型相同之傳導類型。在一根據本發明之實施例中，植入物摻雜物28 亦為與淺植入物24 摻雜物相同之摻雜物。植入物摻雜物28 可為n型摻雜物，諸如磷、砷，或銻，或為p型摻雜物，諸如硼、鋁、鎵或銦。
介電層29 通常藉由低壓化學氣相沈積、常壓化學氣相沈積，電漿增強化學氣相沈積或高密度電漿沈積而形成於矽之經植入有摻雜物28 之矽區域中。可用於介電層29 之介電材料之實例包括(但並不限於)襯底氧化物或氮化物。介電層29 可先於或後於植入物摻雜物28 之植入而經成長或經沈積。接著以介電材料(未圖示)填充隔離溝槽40 。
參看圖9A ，展示根據本發明之實施例中之在具有側壁植入物之二淺溝槽隔離之間含有設備之半導體基板的第一剖視圖。STI區42 、43 經展示而各自鄰近檢光器30 、31 。檢光器30 、31 之傳導類型與植入物摻雜物28 及轉角植入物27 之傳導類型相反。在轉移閘32 經脈衝時，電荷自一檢光器(例如，檢光器30 )轉移至經包含於井34 中亦稱作感應節的浮動傳播33 。該訊號接著由像素放大器(未圖示)感應並流入像素陣列外之下游電路(未圖示)中。浮動傳播33 之傳導類型與植入物摻雜物28 及轉角植入物27 之傳導類型相反。
圖9B 展示根據本發明之實施例中之在具有側壁植入物之二淺溝槽隔離之間含有設備之半導體基板的第二剖視圖。轉角植入物27 、植入物摻雜物28 、檢光器30 ,31 、浮動傳播33 、井34 ，及牽制層35 ,36 關於圖9A 中所示之傳導類型而逆轉。
圖9A 及9B 中所展示的結構中已移除第一硬式遮罩層及第二硬式遮罩層。然而，當然此等層可替代性地保留於最終之結構中。儘管圖9A 及9B 中展示了具有二共用檢光器之影像感應器，但是當然可使用任何數量之檢光器。通常可由轉移閘來將一、二或四個檢光器連接至一單一浮動傳播。所形成之檢光器之深度通常小於淺溝槽之深度。
10．．．半導體基板
11．．．氧化物薄膜層
12．．．光阻遮罩
13．．．轉角植入物
14．．．側壁植入物
18．．．光阻遮罩中之開口
19．．．第一硬式遮罩層中之開口
20．．．半導體基板
21．．．蝕刻終止層
22．．．第一硬式遮罩層
23．．．光阻遮罩
24．．．淺植入物
25．．．第二硬式遮罩層
26．．．側壁間隔物
27．．．轉角植入物
28．．．植入物摻雜物
29．．．介電層
30．．．檢光器
31．．．檢光器
32．．．轉移閘
33．．．浮動傳播
34．．．井
35．．．牽制層
36．．．牽制層
40．．．淺溝槽
42．．．淺溝槽隔離
43．．．淺溝槽隔離
圖1 根據先前技術展示具有淺溝槽隔離區之半導體基板之剖視圖；圖2 展示一根據本發明之實施例中之半導體基板及第一硬式遮罩層之剖視圖；圖3 展示一根據本發明之實施例中之具有經蝕刻之第一硬式遮罩層之半導體基板之剖視圖；圖4 展示一根據本發明之實施例中之具有淺溝槽植入物之半導體基板之剖視圖；圖5 展示一根據本發明之實施例中之具有第二硬式遮罩層之半導體基板之剖視圖；圖6 展示一根據本發明之實施例中之具有經蝕刻之第二硬式遮罩層之半導體基板之剖視圖；圖7 展示一根據本發明之實施例中之具有淺溝槽之半導體基板之剖視圖；圖8 根據本發明展示一實施例中之具有淺溝槽隔離及側壁植入物之半導體基板之剖視圖；圖9A 展示一根據本發明之實施例中之在具有側壁植入物之二淺溝槽隔離之間含有設備之半導體基板之第一剖視圖；及圖9B 展示根據本發明之實施例中之在具有側壁植入物之二淺溝槽隔離之間含有設備之半導體基板之第二剖視圖。
20．．．半導體基板
21．．．蝕刻終止層
22．．．第一硬式遮罩層
26．．．側壁間隔物
27．．．轉角植入物
28．．．植入物摻雜物
29．．．介電層

Claims (7)

  1. 一種用於在一半導體基板中形成一隔離區以隔離該基板中所形成之設備的方法，其依序包含以下步驟：a)藉由透過第一硬式遮罩層(22)中之一開口(19)植入第一摻雜物而在該半導體基板(20)之一部分中形成一淺植入物(24)；b)在該半導體基板(20)之該部分及該第一硬式遮罩層(22)上形成第二硬式遮罩層(25)；c)蝕刻該第二硬式遮罩層(25)以沿著該第一硬式遮罩層(22)之諸側形成側壁間隔物(26)，其中各側壁間隔物(26)覆蓋該半導體基板(20)中之該淺植入物(24)之一部分；及d)蝕刻至該等側壁間隔物(26)之間之該半導體基板(20)中，以形成一間隔溝槽(40)及轉角植入物(27)。
  2. 如請求項1之方法，其進一步包含：在該半導體基板表面上形成一蝕刻終止層(21)；在該蝕刻終止層(21)上形成該第一硬式遮罩層(22)；在該第一硬式遮罩層(22)上提供一光阻遮罩層(23)；圖案化該光阻遮罩層(23)以在該光阻遮罩層(23)中形成一開口(18)；及透過該光阻遮罩層(23)中之該開口(18)蝕刻該第一硬式遮罩層(22)，以在該第一硬式遮罩層(22)中形成該開口(19)。
  3. 如請求項1之方法，其進一步包含： 將第二摻雜物(28)植入該隔離溝槽(40)之側壁及底壁中。
  4. 如請求項3之方法，其進一步包含在該隔離溝槽(40)之側壁及底壁上形成一等形絕緣層(29)。
  5. 如請求項3之方法，其中該第二摻雜物(28)具有與該第一摻雜物相同之傳導類型。
  6. 如請求項2之方法，其進一步包含在該半導體基板(20)中形成一檢光器(30,31)以用於捕獲光並將其轉化為電荷的步驟，其中該檢光器(30,31)橫向地鄰近於該隔離溝槽(40)。
  7. 如請求項2之方法，其中蝕刻該等側壁間隔物(26)之間之該半導體基板(20)以形成一隔離溝槽(40)及轉角植入物(27)之步驟，使各轉角植入物(27)之內邊緣自對準於個別側壁間隔物(26)之內邊緣。
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