TWI390642B - 穩定之金凸塊焊料連接 - Google Patents
穩定之金凸塊焊料連接 Download PDFInfo
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- TWI390642B TWI390642B TW097121811A TW97121811A TWI390642B TW I390642 B TWI390642 B TW I390642B TW 097121811 A TW097121811 A TW 097121811A TW 97121811 A TW97121811 A TW 97121811A TW I390642 B TWI390642 B TW I390642B
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- H—ELECTRICITY
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K1/00—Soldering, e.g. brazing, or unsoldering
- B23K1/0008—Soldering, e.g. brazing, or unsoldering specially adapted for particular articles or work
- B23K1/0016—Brazing of electronic components
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- B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
- B23K35/001—Interlayers, transition pieces for metallurgical bonding of workpieces
- B23K35/007—Interlayers, transition pieces for metallurgical bonding of workpieces at least one of the workpieces being of copper or another noble metal
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- B23K35/262—Sn as the principal constituent
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Description
本發明大體而言係關於應用於電子系統及半導體裝置之冶金系統之領域,且更具體言之係關於穩定之金凸塊焊料連接。
在矽積體電路(IC)裝置之製造流程中之覆晶組裝的增長之風行度係由若干因素驅動。首先,當與習知線結合互連技術相關之寄生電感降低時,半導體裝置之電效能可得到改良。第二,覆晶組裝比線結合提供更高的晶片與封裝之間的互連密度。第三,覆晶組裝比線結合消耗更少的矽「物料(real estate)」,且因此有助於節省矽區並降低裝置成本。且第四,當採用同時集團結合(gang-bonding)技術而非連續的個別結合步驟時,可降低製造成本。
為了減小凸塊大小及凸塊間距,曾努力用金凸塊替換早期基於焊料之互連球,特別是藉由以經修改之線球技術形成金凸塊的努力。通常,在半導體晶片之接觸襯墊之鋁層上形成金凸塊。隨後,使用焊料將晶片附著至基板。
雖然鉛/錫合金之習知焊料已在電子裝置製造過程中使用了多年,但與環境有關之問題近來提倡努力自焊料合金消除鉛且使用純錫、錫合金或另一無鉛焊料。通常,將基於錫之合金沈積在基板接觸襯墊上。
當藉由使已沈積在襯墊上之焊料回焊來將金凸塊接合至基板襯墊上時,形成許多金/錫金屬間化合物。因為金在
熔融焊料中之高溶解速率,具金凸塊之焊接點在一次回焊後具有大的金屬間化合物體積分數,其中以AuSn4
為主相,此將極大地使焊接點增加脆性。在組裝堆疊式封裝產品通常所需的兩次或兩次以上回焊之後,金凸塊可完全消耗並轉化為金/錫金屬間化合物。因為此等化合物之脆性及金屬間化合物與晶片側上之鋁襯墊之直接接觸,所以焊接點常因凸塊/晶片界面處之破裂而不能通過可靠性測試(諸如,機械墜落測試)。
對於金凸塊定位於鋁層上之晶片,額外問題將在金凸塊耗盡後顯現:在連續的回焊操作中(對於許多裝置,需要另外三次回焊),鋁/金金屬間化合物亦可能損耗,使得鋁襯墊完全喪失其可焊接性。經驗表示,此等現象會因通常用作基板之觸點的銅襯墊而大大加劇。
申請人結合二相及三相圖進行觸點結構之冶金及統計研究。觸點之研究發現,擴散至焊料中之銅替換二元金/錫金屬間化合物中之一些金以形成三元化合物,因此降低熔融溫度,進而使二元金/錫金屬間化合物逐漸溶解,且使凸塊之更多金溶解。
在焊料觸點之分析中,申請人進一步發現,在建構鎳層以覆蓋銅觸點且幾乎消除至焊料中之銅擴散之後,金/錫金屬間化合物可穩定化為個別區域。該等區域形成圍繞金凸塊之「塗佈」層,進而減少後續回焊過程期間之額外金溶解。該等區域因此將剩餘金凸塊保持為柔軟、應力減緩
之材料以通過機械測試。另外,組裝過程後所保持之金應足夠大以便承受延長的高溫儲存或野外應用期間的至焊料中之金固態溶解。由於較少金溶解至焊料中,因此焊料中之金/錫金屬間化合物之體積分數較小,且因此焊接點較不易碎。
本發明之一實施例為一種用於連接一金凸塊及一銅襯墊之金屬互連結構。一第一二元AuSn2
金屬間化合物區域與金凸塊接觸。一二元AuSn4
金屬間化合物區域與該第一AuSn2
區域接觸。接著,一二元金-錫固溶體區域與該AuSn4
區域接觸,且一第二二元AuSn2
金屬間化合物區域與該固溶體區域接觸。該第二AuSn2
區域與一覆蓋該銅襯墊之鎳層(厚度宜為約0.08 μm)接觸。該鎳層確保金/錫金屬間化合物及溶體大體上無銅且因此維持二元。在特定實施例中,金凸塊與第一AuSn2
區域之間存在二元AuSn區域。
本發明之另一實施例為一種裝置,其包括:一半導體晶片,其具有具金凸塊之接觸襯墊;及一介電基板,晶片組裝在該基板上。該基板具有用於外部連接之觸點,該等觸點包括一銅觸點區及一覆蓋該觸點區之鎳層(厚度介於約0.04與2.0 μm之間)。互連金凸塊及鎳層的是金屬結構,其包括:一與金凸塊接觸的第一二元AuSn2
金屬間化合物區域;一與該第一AuSn2
區域接觸的二元AuSn4
金屬間化合物區域;一與該AuSn4
區域接觸的二元金-錫固溶體區域;及一與該固溶體區域接觸且與該鎳層接觸的第二二元AuSn2
金屬間化合物區域。
本發明之另一實施例為一種用於製造一裝置之方法,該裝置具有:一半導體晶片,其具有金凸塊接觸襯墊;及一介電基板,其具有用於外部連接之銅觸點區。將一鎳層沈積在該銅觸點區之上;宜為0.08 μm之層厚度抑制任何銅擴散。在鎳表面仍濕潤時,將一基於錫之焊料本體沈積在該鎳層上。較佳之沈積方法為電解電鍍或無電電鍍。較佳的焊料回焊溫度介於217℃與280℃之間。
接著,朝著基板倒裝晶片,使得金凸塊面向焊料本體,且個別金凸塊可與焊料本體對準。使已對準之金凸塊與個別焊料本體接觸,將溫度升高至略微高於回焊溫度,且在一段時間(宜少於10 s)內保持峰值溫度恆定。回焊焊料本體且形成金/錫金屬間化合物及溶體。最後,再將溫度降低至環境溫度,進而將金屬間化合物及溶體固化成區域。
即使重複焊料回焊循環另外若干次(例如,五次或五次以上),此等區域及其順序結構仍保持完整。因為大體上沒有銅可擴散通過鎳層,以將該等區域之二元特性轉化為較低熔點之三元化合物,所以該等區域充當阻止金凸塊之進一步溶解之障壁,且因此使剩餘金凸塊穩定。
本發明之一實例實施例為一用於連接一金凸塊及一銅襯墊之金屬互連結構。圖1A及圖1B展示在形成該互連結構之前的金凸塊及銅襯墊。在圖1A中,半導體晶片101之一部分具有一絕緣外塗層102(例如,氮化矽或氮氧化矽)及該外塗層中之一窗口103。該窗口暴露晶片金屬化層104之一
部分,其較佳為表面可結合至金的鋁或鋁合金。或者,金屬化層104可由銅製成;此外,襯墊104之表面必須可結合至金。舉例而言,襯墊104之表面可具有一薄的金或鈀層。窗口103中之暴露之金屬充當用於電接觸至晶片101及機械接觸至晶片101之襯墊。
附著至接觸襯墊104的是柱塊或凸塊105,其較佳由金製成。歸因於製造方法,凸塊105可具有變形球體之形狀。位於金與鋁之間的界面處的是一金/鋁金屬間化合物層106(對於銅凸塊,層106包括銅/鋁金屬間化合物)。用於製造凸塊105之較佳方法為經修改之球結合技術。選擇一具有毛細管之線接合器,其適合於直徑範圍介於15 μm與33 μm之間、較佳介於20 μm與25 μm之間的圓形金線。為了後續結合鋁襯墊及控制球形成過程中的熱影響區,線可包括少量的鈹、銅、鈀、鐵、銀、鈣或鎂。由自毛細管突出的金線之長度,使用火焰或火花技術形成無空氣球(free air ball)。球具有一較佳直徑為約1.2至1.6倍於線直徑的大小(例如,介於約20 μm與30 μm之間)。
為了將金結合至鋁,將半導體晶片定位在一加熱至介於150與300℃之間的溫度之加熱基座上。將無空氣球置放在襯墊104上並壓靠在該襯墊之金屬化層上。對於鋁襯墊,壓縮力與超音波能之組合引起金-鋁金屬間化合物及強冶金結合之形成。壓縮力介於約17 g與75 g之間;超音波時間介於約10 ms與20 ms之間,超音波功率介於約20 mW與50 mW之間。結合時,溫度範圍通常為150℃至270℃。所
擠壓之金凸塊105看上去像變形球體。
提昇毛細管,且線自熱影響之機械弱區中之所擠壓之球體斷開。可壓印在所擠壓之球中剩餘的線殘餘部分以使其變平。視毛細管口之形狀而定,凸塊105可具有一具有平坦頂部的額外截頭圓錐(如圖1A及圖1B中所示),或附有一小的額外線長度。
圖1A進一步展示用於組裝晶片101之介電基板110之一部分。基板110具有用於外部連接之觸點,且可與導電跡線一起層壓(圖1A中未圖示)。該觸點包括一銅主體111(在其他實施例中為觸點區)、一鎳層112(其在所有側面上覆蓋觸點本體(或區)),及一焊料層113。鎳層112相對薄(介於約0.04與2.0 μm之間,較佳為0.08 μm)且用來防止銅自觸點本體擴散至焊料中。焊料為錫或基於錫,大體上無銅,且相對厚(2至10 μm)。可藉由包括電鍍之各種方法完成焊料的沈積;沈積可進一步包括一或多個回焊步驟。
圖1B描繪鎳層112之上具有一額外層114之本發明之一實施例。層114係由金製成,或替代地由鈀製成,以促進焊料113之附著;厚度範圍宜為約0.05至0.1 μm。
圖2說明金屬互連結構(大體表示為200)之一實例實施例,在該互連結構形成之後,其位於一金凸塊與一銅襯墊之間。在圖2中,半導體晶片201之一部分具有一絕緣外塗層202(例如,氮化矽或氮氧化矽)及該外塗層中之一窗口203。該窗口界定襯墊204(晶片金屬化層之暴露之部分),其宜為表面可結合至金之鋁或鋁合金。或者,該晶片金屬
化層可由銅製成;此外,襯墊204之表面必須可結合至金。舉例而言,襯墊204之表面可具有一薄的金或鈀層。窗口203中暴露之金屬充當一用於電接觸至晶片201且機械接觸至晶片201之襯墊。
附著至接觸襯墊204的是柱塊或凸塊205,其宜由金製成。位於金與鋁之間之界面處的是一金/鋁金屬間化合物層206。用於製造凸塊205之較佳方法如下。選擇一具有毛細管之線接合器,其適合於直徑範圍介於15 μm與33 μm之間、較佳為介於20 μm與25 μm之間的圓形金線。由自毛細管突出之金線的長度,使用火焰或火花技術形成無空氣球。球具有一較佳直徑為約1.2至1.6倍於線直徑的大小(例如,介於約20 μm與30 μm之間)。
為了將金結合至鋁,將半導體晶片定位在一加熱至一介於150℃與300℃之間之溫度的加熱基座上。將無空氣球置放在襯墊204上,並壓靠在該襯墊之金屬化層上。對於鋁襯墊,壓縮力與超音波能之組合引起金-鋁金屬間化合物及強冶金結合之形成。
鄰近於金凸塊205的是一第一二元AuSn2
金屬間化合物區域207。區域207形成於將金凸塊附著至錫焊料之過程中;該區域在重複的回焊循環中穩定,且與金凸塊205及錫焊料平衡。鄰近於區域207的是二元AuSn4
金屬間化合物區域208。此區域亦形成於將金凸塊附著至錫焊料之過程中。該區域在重複的回焊循環中穩定,且其脆性由回焊循環後剩餘之金凸塊的柔軟性補償。因此,在機械測試中,脆性
金/錫金屬間化合物之出現對晶片-基板互連之可靠性無不利影響。
鄰近於區域208的是具有高金含量之塊狀錫焊料區域209。區域209具有二元金/錫固溶體之特性。接著,作為金凸塊與鎳層之間的互連之最後成份,層210為一第二二元AuSn2
金屬間化合物區域;該區域鄰近於固溶體區域209及上覆於銅襯墊212上之鎳層213兩者。
如上所述,金/錫金屬間化合物之所有區域(207、208、210)及固溶體(209)大體上無銅且因此被稱為二元的。其在甚至多次回焊循環之後仍大體上保持穩定,其中「多次」指五次或五次以上。因此,在多次回焊循環之後,大體上保留金凸塊205。
銅襯墊212為用於介電基板211之外部連接之接觸襯墊,晶片201係組裝至該基板上。基板211可具有一塑膠或陶瓷基底材料(包括膠帶)及分布式或層壓式導電跡線(圖2中未圖示)。銅襯墊212由鎳層213覆蓋,鎳層213具有約0.08 μm之較佳厚度,該厚度足以抑制並防止銅自襯墊212擴散至錫焊料中。
圖3展示根據一用於連接一金凸塊及一銅襯墊之金屬互連結構(大體表示為300)的顯微照片(放大率2000x)而形成的圖,其說明金/錫金屬間化合物區域之順序。將接觸襯墊之鋁層表示為304,將結合至鋁之金凸塊表示為305,且將金/鋁金屬間化合物區域表示為306。窄的第一AuSn2
金屬間化合物區域307鄰近於金凸塊306且鄰近於相對窄的
AuSn4
金屬間化合物區域308。寬的區域309係錫/金固溶體,且區域310係第二AuSn2
金屬間化合物區域,其亦相對窄且具有齒形邊緣。將基板之銅觸點區表示為312,且用虛線313表示極薄的鎳層(0.08 μm)。
圖3之綜述醒目顯示軟金凸塊及軟錫/金固溶體之體積對易碎金屬間化合物層之體積有顯著影響的事實。因此,圖3之互連能夠通過機械應力測試。諸如圖3中所示的所需互連結構能夠維持5次或5次以上的回焊循環,因為鎳層313防止銅自襯墊312擴散至二元金/錫化合物中。
另一方面,在不具有鎳層之裝置中,一具有金屬間化合物區域之互連結構僅可藉由第一且快速(少於1秒)的回焊過程達成。在重複的回焊循環之後,銅將迅速擴散至二元區域中且使二元化合物轉變為較低熔融溫度之三元化合物[諸如(Au,Cu)Sn2
]。因為金至焊料中的高溶解速率,來自凸塊305之較多金將接著快速地溶解以朝基板側擴散,直至凸塊305完全由擴散過程消耗,通常是在第三次回焊過程之後。此外,熔融焊料中之銅之存在減小金之飽和溶解度(參看圖5),使得圖3之區域型金屬間化合物不可形成於金凸塊305上。實情為,AuSn4
小片跨越與分布式AuSn區域互混之互連結構而形成。
圖5中描繪金之飽和溶解度因熔融焊料中之銅之存在而減小(其又基於260℃下的金與錫之分布,如圖4中之二元相圖所示)。圖4描繪二元金/錫相圖,其中線性橫座標展示錫的原子%,非線性橫座標展示錫的重量%,且縱座標展
示以℃為單位之溫度。選擇260℃之溫度作為錫熔融技術之操作溫度,箭頭401指向在研究中的固相線-液相線狀態,其指示錫的86原子%。使用此組合物,申請人藉由將銅包括在金/錫圖中來建構圖5之三元相圖。該三元相圖展現液體相之存在(在圖5中標記為「液體」),且箭頭501指向溶解度線金/錫,其中金在銅存在之情況下面對液體錫。其為此液體相(其使更多金溶解),直至金凸塊(在圖2中表示為205)完全被消耗。
圖6說明本發明之另一實施例的堆疊式封裝裝置(大體表示為600),圖7中放大該裝置之一部分。第一封裝半導體裝置601包括晶片之一堆疊且在第二半導體裝置602上組裝有焊球611,第二半導體裝置亦含有晶片之一堆疊。此等晶片621中之一者及基板631的一些細節係展示於圖7之放大圖中。晶片621之每一接觸襯墊包括一金凸塊622。介電基板631(晶片621組裝在上面)具有用於外部連接之觸點,其中每一觸點包括一銅觸點區632及一覆蓋觸點區632之鎳層633。
互連金凸塊622及鎳層633之金屬結構640具有一如圖2中所描繪之結構:一鄰近於金凸塊622的第一二元AuSn2
金屬間化合物區域;一鄰近於該第一AuSn2
區域的二元AuSn4
金屬間化合物區域;一與該AuSn4
區域接觸的二元金/錫固溶體區域;及一與該固溶體區域接觸且與鎳層633接觸的第二二元AuSn2
金屬間化合物區域。由金凸塊622及金屬結構640確定之晶片621與基板631之間的間隙可用一可聚合之
聚合物前驅體(通常被稱為側填充材料)填充。
本發明之另一實施例係一種用於製造一具有穩定之金凸塊焊料連接之裝置之方法。該方法始於提供一具有接觸襯墊之半導體晶片,藉此每一襯墊包括一金凸塊。接著,提供一介電基板,其具有用於外部連接之觸點;此等觸點中之每一者包括一銅觸點區,其上沈積厚度介於約0.04 μm與2.0 μm之間的鎳層以覆蓋銅。視情況,可在該鎳層之上沈積一金層。在未沈積金層且鎳表面仍濕潤的狀況下,(藉由電解或無電電鍍)而將一基於錫之焊料本體沈積在該鎳層上。該基於錫之焊料無銅。
朝著基板倒裝晶片,使得金凸塊面向焊料本體;接著,對準個別金凸塊與焊料本體,且使已對準之金凸塊與個別焊料本體接觸。將溫度升高至約217℃至280℃,且在少於10秒的一段時間內保持峰值溫度恆定以使焊料本體回焊且形成金/錫金屬間化合物及溶體。最後,將溫度降低至環境溫度。
因為該鎳層防止銅進入溶體中,所以當藉由重複升高及降低溫度之步驟添加重複焊料回焊循環之其他步驟時,不同二元錫/金金屬間化合物及溶體之結構將大體上不改變。
該等實例實施例在半導體裝置及具有接觸襯墊之任何其他裝置中有效,該等裝置必須組裝在基板或印刷電路板上,有時繼之以側填充裝置與基板之間的間隙。作為另一實例,半導體裝置可包括製造中所採用的基於矽、矽鍺、
砷化鎵及其他半導體材料之產品。作為另一實例,本發明之概念對許多半導體裝置技術節點係有效的,且不限於特定的半導體裝置技術節點。
熟習本發明所屬技術者應瞭解,所描述之實施例僅為代表性實例,且許多其他變體及實施例在所主張之發明之範疇內係可能的。
101‧‧‧半導體晶片
102‧‧‧絕緣外塗層
103‧‧‧窗口
104‧‧‧金屬化層
105‧‧‧金凸塊
106‧‧‧金/鋁金屬間化合物層
110‧‧‧介電基板
111‧‧‧銅主體
112‧‧‧鎳層
113‧‧‧焊料層
114‧‧‧額外層
200‧‧‧金屬互連結構
201‧‧‧半導體晶片
202‧‧‧絕緣外塗層
203‧‧‧窗口
204‧‧‧接觸襯墊
205‧‧‧柱塊或凸塊
206‧‧‧金/鋁金屬間化合物層
207‧‧‧第一二元AuSn2
金屬間化合物區域
208‧‧‧二元AuSn4
金屬間化合物區域
209‧‧‧塊狀錫焊料區域/固體溶液區域
210‧‧‧第二二元AuSn2
金屬間化合物區域
211‧‧‧介電基板
212‧‧‧銅襯墊
213‧‧‧鎳層
300‧‧‧金屬互連結構
304‧‧‧接觸襯墊之鋁層
305‧‧‧金凸塊
306‧‧‧金/鋁金屬間化合物區域
307‧‧‧第一AuSn2
金屬間化合物區域
308‧‧‧AuSn4
金屬間化合物區域
309‧‧‧區域
310‧‧‧第二AuSn2
金屬間化合物區域
312‧‧‧銅觸點區/襯墊
313‧‧‧鎳層
401‧‧‧箭頭
501‧‧‧箭頭
600‧‧‧堆疊式封裝裝置
601‧‧‧第一封裝半導體裝置
602‧‧‧第二半導體裝置
611‧‧‧焊球
621‧‧‧晶片
622‧‧‧金凸塊
631‧‧‧介電基板
632‧‧‧銅觸點區
633‧‧‧鎳層
640‧‧‧金屬基板
圖1A展示根據本發明之一實施例的具有金凸塊之半導體晶片接觸襯墊及由鎳層覆蓋之基板銅接觸襯墊的示意性橫截面。
圖1B展示根據本發明之一實施例的具有金凸塊之半導體晶片接觸襯墊及由鎳層及金層覆蓋之基板銅接觸襯墊的示意性橫截面。
圖2為根據本發明之金屬互連結構之示意性橫截面,該金屬互連結構互連金凸塊及銅襯墊。
圖3說明金凸塊與銅襯墊之間的互連結構之橫截面的顯微相片之圖,其描繪各種組份的金屬間金/錫區域。
圖4為二元金/錫相圖。線性橫座標展示錫的原子%;縱座標為溫度軸(以℃為單位)。
圖5展示所估計的260℃下之金/錫/銅三相圖。
圖6為根據本發明之覆晶組裝的堆疊式封裝裝置之示意性橫截面。
圖7為圖6中之封裝之一部分的示意性橫截面,其說明本發明所使用之金屬互連結構的放大圖。
200‧‧‧金屬互連結構
201‧‧‧半導體晶片
202‧‧‧絕緣外塗層
203‧‧‧窗口
204‧‧‧接觸襯墊
205‧‧‧柱塊或凸塊
206‧‧‧金/鋁金屬間化合物層
207‧‧‧第一二元AuSn2
金屬間化合物區域
208‧‧‧二元AuSn4
金屬間化合物區域
209‧‧‧塊狀錫焊料區域/固體溶液區域
210‧‧‧第二二元AuSn2
金屬間化合物區域
211‧‧‧介電基板
212‧‧‧銅襯墊
213‧‧‧鎳層
Claims (12)
- 一種用於連接一金凸塊及一銅襯墊之金屬互連結構,其包含:一金凸塊;一鄰近於該金凸塊的第一二元AuSn2 金屬間化合物區域;一鄰近於該第一AuSn2 區域的二元AuSn4 金屬間化合物區域;一鄰近於該AuSn4 區域的二元金/錫固溶體區域;一鄰近於該固溶體區域的第二二元AuSn2 金屬間化合物區域;及一由一鎳層遮蔽的銅襯墊,該鎳層鄰近於該第二AuSn2 區域。
- 如請求項1之結構,其中該鎳層具有一0.08 μm之厚度。
- 一種半導體裝置,其包含:一半導體晶片,其具有接觸襯墊,每一襯墊包括一金凸塊;一介電基板,該晶片組裝在上面,該介電基板具有用於外部連接之觸點,每一觸點包括:一銅觸點區;一遮蔽該觸點區之鎳層;及一互連該金凸塊及該鎳層之金屬結構,該結構包括:一鄰近於該金凸塊的第一二元AuSn2 金屬間化合 物區域;一鄰近於該第一AuSn2 區域的二元AuSn4 金屬間化合物區域;一鄰近於該AuSn4 區域的二元金/錫固溶體區域;及一鄰近於該固溶體區域且鄰近於該鎳層的第二二元AuSn2 金屬間化合物區域。
- 如請求項3之裝置,其中該鎳層具有一介於0.04 μm與2.0 μm之間的厚度。
- 一種用於製造一半導體裝置之方法,其包含以下步驟:提供一具有接觸襯墊之半導體晶片,每一襯墊包括一金凸塊;提供一具有用於外部連接之觸點之介電基板,每一觸點包括一銅觸點區;沈積一鎳層以遮蔽該觸點區;將一基於錫之焊料本體沈積在該鎳層上,該焊料無銅;對準個別金凸塊及焊料本體;使該等對準之金凸塊與該等個別焊料本體接觸;升高溫度且在一段時間內保持峰值溫度恆定,以使該等焊料本體回焊且自該金凸塊開始以下列順序形成金/錫金屬間化合物及溶體:一鄰近於該金凸塊的第一二元AuSn2 金屬間化合物區域;一鄰近於該第一AuSn2 區域的二元AuSn4 金屬間化合 物區域;一鄰近於該AuSn4 區域的二元金/錫固溶體區域;一鄰近於該固溶體區域且與該遮蔽該銅觸點之鎳層接觸的第二二元AuSn2 金屬間化合物區域;及將該溫度降低至環境溫度。
- 如請求項5之方法,其中該沈積一鎳層之步驟及該沈積一焊料本體之步驟係選自一組包括電解電鍍及無電電鍍之技術。
- 如請求項5之方法,其中該基於錫之焊料係在鎳表面仍濕潤時沈積在該鎳層上。
- 如請求項5之方法,其中該焊料回焊溫度介於217℃與280℃之間。
- 如請求項5之方法,其中處於該峰值回焊溫度下的該時間少於10秒。
- 如請求項5之方法,進一步包括藉由該等升高及降低該溫度之步驟而重複該等焊料回焊循環之步驟。
- 一種用於製造一半導體裝置之方法,其包含以下步驟:提供一具有接觸襯墊之半導體晶片,每一襯墊包括一金凸塊;提供一具有用於外部連接之觸點之介電基板,每一觸點包括一銅觸點區;沈積一鎳層以遮蔽該觸點區;在該鎳層之上沈積一金層;將一基於錫之焊料本體沈積在該金層上,該焊料無 銅;對準個別金凸塊及焊料本體;使該等對準之金凸塊與該等個別焊料本體接觸;升高溫度且在一段時間內保持峰值溫度恆定,以使該等焊料本體回焊且自該金凸塊開始以下列順序形成金/錫金屬間化合物及溶體:一鄰近於該金凸塊的第一二元AuSn2 金屬間化合物區域;一鄰近於該第一AuSn2 區域的二元AuSn4 金屬間化合物區域;一鄰近於該AuSn4 區域的二元金/錫固溶體區域;一鄰近於該固溶體區域且與該在該遮蔽該銅觸點之鎳層之上之金層接觸的第二二元AuSn2 金屬間化合物區域;及將該溫度降低至環境溫度。
- 如請求項11之方法,其中該金層具有一介於0.05 μm與0.1 μm之間的厚度。
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US11/867,051 US7939939B1 (en) | 2007-06-11 | 2007-10-04 | Stable gold bump solder connections |
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Families Citing this family (46)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101388538B1 (ko) * | 2007-09-28 | 2014-04-23 | 테세라, 인코포레이티드 | 이중 포스트를 사용하여 플립칩 상호연결한 마이크로전자 어셈블리 |
US8247267B2 (en) | 2008-03-11 | 2012-08-21 | Taiwan Semiconductor Manufacturing Company, Ltd. | Wafer level IC assembly method |
US20090246911A1 (en) * | 2008-03-27 | 2009-10-01 | Ibiden, Co., Ltd. | Substrate for mounting electronic components and its method of manufacture |
US20100044860A1 (en) * | 2008-08-21 | 2010-02-25 | Tessera Interconnect Materials, Inc. | Microelectronic substrate or element having conductive pads and metal posts joined thereto using bond layer |
JP5438114B2 (ja) * | 2008-09-18 | 2014-03-12 | アイメック | 材料ボンディングのための方法およびシステム |
TWI469288B (zh) * | 2009-06-11 | 2015-01-11 | Chipbond Technology Corp | 凸塊化晶片結構及其應用之半導體覆晶裝置 |
TWI502706B (zh) * | 2009-10-29 | 2015-10-01 | Taiwan Semiconductor Mfg Co Ltd | 積體電路結構 |
US8847387B2 (en) * | 2009-10-29 | 2014-09-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Robust joint structure for flip-chip bonding |
US9607936B2 (en) * | 2009-10-29 | 2017-03-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Copper bump joint structures with improved crack resistance |
US9142533B2 (en) | 2010-05-20 | 2015-09-22 | Taiwan Semiconductor Manufacturing Company, Ltd. | Substrate interconnections having different sizes |
US8580607B2 (en) | 2010-07-27 | 2013-11-12 | Tessera, Inc. | Microelectronic packages with nanoparticle joining |
WO2012053178A1 (ja) * | 2010-10-22 | 2012-04-26 | パナソニック株式会社 | 半導体接合構造体および半導体接合構造体の製造方法 |
US8853558B2 (en) | 2010-12-10 | 2014-10-07 | Tessera, Inc. | Interconnect structure |
US20120175772A1 (en) * | 2011-01-07 | 2012-07-12 | Leung Andrew K | Alternative surface finishes for flip-chip ball grid arrays |
US8564030B2 (en) | 2011-06-10 | 2013-10-22 | Advanced Micro Devices | Self-aligned trench contact and local interconnect with replacement gate process |
JP5281122B2 (ja) * | 2011-06-16 | 2013-09-04 | 株式会社フジクラ | 接合方法、及び、製造方法 |
US8240545B1 (en) | 2011-08-11 | 2012-08-14 | Western Digital (Fremont), Llc | Methods for minimizing component shift during soldering |
US8716124B2 (en) | 2011-11-14 | 2014-05-06 | Advanced Micro Devices | Trench silicide and gate open with local interconnect with replacement gate process |
TWI467718B (zh) * | 2011-12-30 | 2015-01-01 | Ind Tech Res Inst | 凸塊結構以及電子封裝接點結構及其製造方法 |
US9425136B2 (en) | 2012-04-17 | 2016-08-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Conical-shaped or tier-shaped pillar connections |
US9646923B2 (en) | 2012-04-17 | 2017-05-09 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor devices, methods of manufacture thereof, and packaged semiconductor devices |
US9299674B2 (en) | 2012-04-18 | 2016-03-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bump-on-trace interconnect |
US9177899B2 (en) | 2012-07-31 | 2015-11-03 | Mediatek Inc. | Semiconductor package and method for fabricating base for semiconductor package |
TWI562295B (en) * | 2012-07-31 | 2016-12-11 | Mediatek Inc | Semiconductor package and method for fabricating base for semiconductor package |
US10991669B2 (en) | 2012-07-31 | 2021-04-27 | Mediatek Inc. | Semiconductor package using flip-chip technology |
US9111817B2 (en) | 2012-09-18 | 2015-08-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bump structure and method of forming same |
JP5874683B2 (ja) * | 2013-05-16 | 2016-03-02 | ソニー株式会社 | 実装基板の製造方法、および電子機器の製造方法 |
US9070387B1 (en) | 2013-08-23 | 2015-06-30 | Western Digital Technologies, Inc. | Integrated heat-assisted magnetic recording head/laser assembly |
US9042048B1 (en) | 2014-09-30 | 2015-05-26 | Western Digital (Fremont), Llc | Laser-ignited reactive HAMR bonding |
US9257138B1 (en) | 2014-10-28 | 2016-02-09 | Western Digital (Fremont), Llc | Slider assembly and method of manufacturing same |
US9601673B2 (en) * | 2014-11-21 | 2017-03-21 | Cree, Inc. | Light emitting diode (LED) components including LED dies that are directly attached to lead frames |
US20160339538A1 (en) * | 2015-05-18 | 2016-11-24 | Toyota Motor Engineering & Manufacturing North America, Inc. | High temperature bonding processes incorporating traces |
US10011478B2 (en) * | 2015-05-18 | 2018-07-03 | Innovative Micro Technology | Thermocompression bonding with raised feature |
US9633971B2 (en) | 2015-07-10 | 2017-04-25 | Invensas Corporation | Structures and methods for low temperature bonding using nanoparticles |
US10886250B2 (en) | 2015-07-10 | 2021-01-05 | Invensas Corporation | Structures and methods for low temperature bonding using nanoparticles |
US11000915B2 (en) * | 2016-03-31 | 2021-05-11 | Texas Instruments Incorporated | Stabilized transient liquid phase metal bonding material for hermetic wafer level packaging of MEMS devices |
TWI606563B (zh) * | 2016-04-01 | 2017-11-21 | 力成科技股份有限公司 | 薄型晶片堆疊封裝構造及其製造方法 |
US20170287870A1 (en) * | 2016-04-01 | 2017-10-05 | Powertech Technology Inc. | Stacked chip package structure and manufacturing method thereof |
US10130302B2 (en) * | 2016-06-29 | 2018-11-20 | International Business Machines Corporation | Via and trench filling using injection molded soldering |
TWI822659B (zh) | 2016-10-27 | 2023-11-21 | 美商艾德亞半導體科技有限責任公司 | 用於低溫接合的結構和方法 |
US20230041747A1 (en) * | 2019-11-26 | 2023-02-09 | James Rathburn | Stud bumped printed circuit assembly |
WO2021155537A1 (en) | 2020-02-06 | 2021-08-12 | Texas Instruments Incorporated | Copper wire bond on gold bump on semiconductor die bond pad |
US12040292B2 (en) * | 2020-07-02 | 2024-07-16 | Changxin Memory Technologies, Inc. | Method for forming conductive layer, and conductive structure and forming method therefor |
KR20220011006A (ko) * | 2020-07-20 | 2022-01-27 | 삼성전자주식회사 | 반도체 패키지 |
WO2023039786A1 (zh) * | 2021-09-16 | 2023-03-23 | 京东方科技集团股份有限公司 | 阵列基板及其检测方法、发光装置 |
US20230091379A1 (en) * | 2021-09-22 | 2023-03-23 | Intel Corporation | First level interconnect under bump metallizations for fine pitch heterogeneous applications |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6347480B1 (en) * | 1997-07-07 | 2002-02-19 | Southpac Trust International, Inc. | Method for wrapping a floral grouping with a sheet of material constructed of paper and having printed and embossed patterns thereon |
JP2002289768A (ja) * | 2000-07-17 | 2002-10-04 | Rohm Co Ltd | 半導体装置およびその製法 |
JP2002151551A (ja) * | 2000-11-10 | 2002-05-24 | Hitachi Ltd | フリップチップ実装構造、その実装構造を有する半導体装置及び実装方法 |
TW508987B (en) * | 2001-07-27 | 2002-11-01 | Phoenix Prec Technology Corp | Method of forming electroplated solder on organic printed circuit board |
TW558821B (en) * | 2002-05-29 | 2003-10-21 | Via Tech Inc | Under bump buffer metallurgy structure |
KR100539235B1 (ko) * | 2003-06-12 | 2005-12-27 | 삼성전자주식회사 | 금 도금된 리드와 금 범프 간의 본딩을 가지는 패키지 제조 방법 |
KR101025844B1 (ko) * | 2003-10-01 | 2011-03-30 | 삼성전자주식회사 | SnAgAu 솔더범프, 이의 제조 방법 및 이 방법을이용한 발광소자 본딩 방법 |
TWI230989B (en) * | 2004-05-05 | 2005-04-11 | Megic Corp | Chip bonding method |
KR100719905B1 (ko) * | 2005-12-29 | 2007-05-18 | 삼성전자주식회사 | Sn-Bi계 솔더 합금 및 이를 이용한 반도체 소자 |
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- 2007-10-04 US US11/867,051 patent/US7939939B1/en active Active
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- 2008-06-09 WO PCT/US2008/066260 patent/WO2008154471A2/en active Application Filing
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US20110177686A1 (en) | 2011-07-21 |
WO2008154471A3 (en) | 2009-02-19 |
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WO2008154471A2 (en) | 2008-12-18 |
US7939939B1 (en) | 2011-05-10 |
US20110108980A9 (en) | 2011-05-12 |
US20090091024A1 (en) | 2009-04-09 |
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