TWI385733B - 互補金氧半導體製程之金屬閘極電晶體及其製造方法 - Google Patents
互補金氧半導體製程之金屬閘極電晶體及其製造方法 Download PDFInfo
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- 229910052751 metal Inorganic materials 0.000 title claims description 55
- 239000002184 metal Substances 0.000 title claims description 55
- 238000000034 method Methods 0.000 title claims description 49
- 230000008569 process Effects 0.000 title description 21
- 150000004706 metal oxides Chemical class 0.000 claims description 54
- 229910044991 metal oxide Inorganic materials 0.000 claims description 52
- 230000004888 barrier function Effects 0.000 claims description 46
- 239000004065 semiconductor Substances 0.000 claims description 41
- 239000000758 substrate Substances 0.000 claims description 30
- 125000006850 spacer group Chemical group 0.000 claims description 23
- 239000000463 material Substances 0.000 claims description 20
- 230000003647 oxidation Effects 0.000 claims description 18
- 238000007254 oxidation reaction Methods 0.000 claims description 18
- 239000004020 conductor Substances 0.000 claims description 8
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 8
- 229920005591 polysilicon Polymers 0.000 claims description 8
- 238000000137 annealing Methods 0.000 claims description 7
- 239000010936 titanium Substances 0.000 claims description 7
- 229910052707 ruthenium Inorganic materials 0.000 claims description 6
- 229910052719 titanium Inorganic materials 0.000 claims description 6
- 229910052759 nickel Inorganic materials 0.000 claims description 5
- 238000000059 patterning Methods 0.000 claims description 5
- 230000003064 anti-oxidating effect Effects 0.000 claims description 4
- 229910052741 iridium Inorganic materials 0.000 claims description 4
- 229910052750 molybdenum Inorganic materials 0.000 claims description 4
- 229910052702 rhenium Inorganic materials 0.000 claims description 4
- 229910052721 tungsten Inorganic materials 0.000 claims description 4
- 229910052720 vanadium Inorganic materials 0.000 claims description 4
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 2
- 239000002019 doping agent Substances 0.000 claims description 2
- 239000007772 electrode material Substances 0.000 claims description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims 2
- 229910004200 TaSiN Inorganic materials 0.000 claims 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims 2
- 239000003963 antioxidant agent Substances 0.000 claims 1
- 230000003078 antioxidant effect Effects 0.000 claims 1
- 238000005253 cladding Methods 0.000 claims 1
- 229910052757 nitrogen Inorganic materials 0.000 claims 1
- 230000001590 oxidative effect Effects 0.000 claims 1
- 239000010410 layer Substances 0.000 description 98
- 229910052732 germanium Inorganic materials 0.000 description 29
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 29
- 239000006117 anti-reflective coating Substances 0.000 description 13
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 10
- 230000008901 benefit Effects 0.000 description 10
- 229910052760 oxygen Inorganic materials 0.000 description 10
- 239000001301 oxygen Substances 0.000 description 10
- 230000015572 biosynthetic process Effects 0.000 description 8
- 238000005530 etching Methods 0.000 description 8
- 238000002955 isolation Methods 0.000 description 7
- 238000000151 deposition Methods 0.000 description 6
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 6
- 239000007943 implant Substances 0.000 description 5
- 229920002120 photoresistant polymer Polymers 0.000 description 5
- RUDFQVOCFDJEEF-UHFFFAOYSA-N yttrium(III) oxide Inorganic materials [O-2].[O-2].[O-2].[Y+3].[Y+3] RUDFQVOCFDJEEF-UHFFFAOYSA-N 0.000 description 5
- 238000000231 atomic layer deposition Methods 0.000 description 4
- 230000008859 change Effects 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 238000004140 cleaning Methods 0.000 description 4
- 239000003989 dielectric material Substances 0.000 description 4
- 150000002739 metals Chemical class 0.000 description 4
- 230000002411 adverse Effects 0.000 description 3
- 229910000420 cerium oxide Inorganic materials 0.000 description 3
- 230000009977 dual effect Effects 0.000 description 3
- 229910000449 hafnium oxide Inorganic materials 0.000 description 3
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 3
- 238000002513 implantation Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 3
- 150000004767 nitrides Chemical class 0.000 description 3
- BMMGVYCKOGBVEV-UHFFFAOYSA-N oxo(oxoceriooxy)cerium Chemical compound [Ce]=O.O=[Ce]=O BMMGVYCKOGBVEV-UHFFFAOYSA-N 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- 241000252506 Characiformes Species 0.000 description 2
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 description 2
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 2
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 2
- MCMNRKCIXSYSNV-UHFFFAOYSA-N Zirconium dioxide Chemical compound O=[Zr]=O MCMNRKCIXSYSNV-UHFFFAOYSA-N 0.000 description 2
- 230000000295 complement effect Effects 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 230000001627 detrimental effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000036961 partial effect Effects 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 229910052723 transition metal Inorganic materials 0.000 description 2
- 150000003624 transition metals Chemical class 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 229910052684 Cerium Inorganic materials 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- SIOXCQVDGDVRSM-UHFFFAOYSA-B [Hf+4].[Hf+4].[Hf+4].OC(CC([O-])=O)(CC([O-])=O)C([O-])=O.OC(CC([O-])=O)(CC([O-])=O)C([O-])=O.OC(CC([O-])=O)(CC([O-])=O)C([O-])=O.OC(CC([O-])=O)(CC([O-])=O)C([O-])=O Chemical compound [Hf+4].[Hf+4].[Hf+4].OC(CC([O-])=O)(CC([O-])=O)C([O-])=O.OC(CC([O-])=O)(CC([O-])=O)C([O-])=O.OC(CC([O-])=O)(CC([O-])=O)C([O-])=O.OC(CC([O-])=O)(CC([O-])=O)C([O-])=O SIOXCQVDGDVRSM-UHFFFAOYSA-B 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 150000004645 aluminates Chemical class 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- JRPBQTZRNDNNOP-UHFFFAOYSA-N barium titanate Chemical compound [Ba+2].[Ba+2].[O-][Ti]([O-])([O-])[O-] JRPBQTZRNDNNOP-UHFFFAOYSA-N 0.000 description 1
- 229910002113 barium titanate Inorganic materials 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- GWXLDORMOJMVQZ-UHFFFAOYSA-N cerium Chemical compound [Ce] GWXLDORMOJMVQZ-UHFFFAOYSA-N 0.000 description 1
- 229910017052 cobalt Inorganic materials 0.000 description 1
- 239000010941 cobalt Substances 0.000 description 1
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 229910052735 hafnium Inorganic materials 0.000 description 1
- -1 hafnium aluminate Chemical class 0.000 description 1
- 125000001475 halogen functional group Chemical group 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 230000000670 limiting effect Effects 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 229910052758 niobium Inorganic materials 0.000 description 1
- 239000010955 niobium Substances 0.000 description 1
- GUCVJGMIXFAOAE-UHFFFAOYSA-N niobium atom Chemical compound [Nb] GUCVJGMIXFAOAE-UHFFFAOYSA-N 0.000 description 1
- 239000000615 nonconductor Substances 0.000 description 1
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 229910001404 rare earth metal oxide Inorganic materials 0.000 description 1
- 230000002829 reductive effect Effects 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical group [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 229910001936 tantalum oxide Inorganic materials 0.000 description 1
- 229910000314 transition metal oxide Inorganic materials 0.000 description 1
- 238000007704 wet chemistry method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823864—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate sidewall spacers, e.g. double spacers, particular spacer material or shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823828—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
- H01L21/823835—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes silicided or salicided gate conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823828—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
- H01L21/823842—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Description
本發明係有關於半導體製造領域,及更特定言之,係有關於NMOS(n通道金氧半導體)及PMOS(p通道金氧半導體)裝置之閘極金屬。
在CMOS(互補金氧半導體)製造的範疇中,已考慮使用含有一金屬及一氧化物二者的閘極。在一雙金屬閘極製程中,一第一金屬係用以形成PMOS裝置的閘極電極,而一第二不同金屬係用以形成NMOS裝置的各閘極電極。使用這些不同金屬的原因在於,其可使得用於各裝置類型的工作函數最佳化。工作函數的變化會影響臨界電壓(VT
)。對於PMOS裝置,需求該工作函數接近5.2 eV的矽價能帶邊緣,而對於NMOS裝置,需求該工作函數接近4.1 eV的矽導電帶邊緣。
使用一導電金屬氧化物作為一閘極材料有一問題係,該金屬氧化物在高溫退火,即高於攝氏450度的期間會失去氧。氧的不欲損失會造成該閘極的工作函數改變,因此改變該裝置的VT
。
因此,高度需求一種其中具有可形成雙金屬閘極的製程,其在一退火製造步驟中可改變其電阻。
一般來說,本發明藉由包含一在導電閘極氧化物上的抗氧化阻障層而克服了前述閘極電極在高溫退火期間失去氧的問題。將一多晶矽覆蓋層沉積在該抗氧化阻障層上,使得可用一習知的方法形成閘極矽化製程。
只要閱讀下文的詳細說明並配合附圖將會更容易地瞭解此等利益及優勢。應注意,為了本發明的說明性目的,該些附圖並未按照精確比例繪製。此外,亦未特地明確說明本發明範疇內之其他具體實施例。
圖1-7說明根據本發明之一半導體製程其一具體實施例之各種階段的橫截面圖。圖1說明一部份完成半導體裝置100。圖1說明的半導體裝置100包括一半導體基板102,其中形成有一第一井104及一第二井106。半導體基板102一般包括一輕度摻雜n型或p型的單晶矽,但是亦可使用其他如矽、鍺及絕緣體上矽(SOI)的半導體材料。所述的半導體裝置100具體實施例係以雙重井製程所製造的,其中第一井104係選擇性地植入基板102之一第一導電率類型的裝置將形成的部分中,而第二井106係選擇性地植入基板102之一第二不同且相反導電率類型的電晶體將形成的區域中。在該雙重井製程的一具體實施例中,該第一井104本身可封入一管(未描述)中,其中第一井104的導電率類型與該管係相反的。在另一具體實施例中,基板102可包括一形成於一重度摻雜塊之上的輕度摻雜磊晶層。在一具體實施例中,例如,基板102所描述的部分係一形成在一p+塊狀物上的p-磊晶層,且第一井104係摻雜n型而第二井106係摻雜p型。N型導電率之結構可藉由以一適合的n型雜質,如磷或砷,植入半導體基板102而形成,p型結構可藉由植入一適合的p型雜質,如硼而形成。如圖1所述之第一井104及第二井106係以一溝渠隔離結構112彼此互相隔開。溝渠隔離結構112可包括一適合的絕緣體,如一介電材料。溝渠隔離結構112可包括一氧化物、氮化物、或其他適合的電絕緣體材料。在一較佳具體實施例中,溝渠隔離結構112包括二氧化矽。
一閘極介電質108係形成在基板102之第一井104及第二井106上。在一具體實施例中,閘極介電質108包括一習知、熱形成的二氧化矽或氮氧化矽,其厚度較佳少於10奈米。在另一具體實施例中,閘極介電質108可包括一替代性閘極材料,如一第一或第二過渡金屬氧化物或稀土金屬氧化物材料。此種替代性閘極介電材料適用於其高介電常數(K),其能夠使用一較厚的閘極介電層而不會不利地影響膜的電性及電容特性。一種較佳的高K閘極介電質係氮化鉿(HfO2
)。對於此種替代性閘極介電質,可使用選自氧化鋯、氧化鉿、氧化鋁、氧化鑭、氧化鍶、氧化鉭、氧化鈦、氧化矽或其組合組成的複合物之適合的過渡金屬氧化物。過渡金屬矽酸鹽及鋁酸鹽亦可用於該閘極介電質,如矽酸鉿(Hfx
Siy
Oz
)、鋁酸鉿(Hfx
Aly
Oz
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Tiy
Oz
)。
如圖1所進一步描述,第一金屬類型的一導電金屬氧化物110係沉積在閘極介電質108上。會自其中製造有一導電率類型的電晶體之半導體基板102的部分選擇性地移除導電金屬氧化物110,以致導電金屬氧化物110僅存在於另一導電率類型的電晶體所在之處,以下將更詳盡討論。較佳地
係,以化學汽相沉積(CVD)、原子層沉積(ALD)、分子束沉積(MBD)方法沉積導電金屬氧化物,以保護閘極介電質108的完整性。在一替代性具體實施例中,導電金屬氧化物110可以一濺鍍製程而物理汽相沉積。在導電金屬氧化物110最終將會留在p型電晶體(即,當一PMOS裝置欲形成在如圖1所示之裝置100的左半邊時)上的具體實施例中,當基板102係矽時需求該第一金屬類型具有的工作函數接近矽的價能帶(即,約為5.1 eV的工作函數)。導電導電金屬氧化物110包括一選自由Ir、Mo、Ru、W、Os、Nb、Ti、V、Ni及Re組成的群組中選出的元素。
導電金屬氧化物110之後,藉由物理汽相沉積(PVD)、化學汽相沉積(CVD)及原子層沉積(ALD),將一抗氧化阻障層111係沉積在導電金屬氧化物110上。阻障層111的厚度可在1奈米(nm)至50 nm之間。阻障層111應要抵抗形成一連續絕緣氧化層,其中氧來源係該導電氧化物閘極電極。在升高溫度處,導電氧化物閘極電極對周圍的膜失去氧。該升高溫度可能因,例如,一高溫退火、沉積或其他製程步驟所造成。若閘極電極材料失去太多的氧,則閘極電極的工作函數會因而改變。另外,若該導電金屬氧化物對一隨後形成的層,如多晶矽,失去氧,則一絕緣介電層可形成在該阻障層111及該多晶矽之間。該絕緣層可導致一不欲電容形成在該閘極材料及該多晶矽覆蓋層之間。該抗氧化阻障層111在該導電金屬氧化物及在該阻障層111上的層之間形成一阻障。該抗氧化阻障層111阻擋氧自該導電金屬氧化物
110擴散出來,且亦抵抗由該阻障層111及該導電金屬氧化物110之間接觸所產生的氧化作用。
注意在所述的具體實施例中,阻障層111係用在一PMOS裝置的形成作業中。然而熟知本技術者亦可認知一相似於阻障層111的阻障層亦可包含在一NMOS裝置的形成作業中。
現參考圖2,使用一濕式或乾式蝕刻,選擇性地移除導電金屬氧化物110及抗氧化阻障層111的一部分。在所述的具體實施例中,該等選擇性移除的層110及111係使用用於形成第二井106的井遮罩以一遮罩及蝕刻製程達成。在此具體實施例中,導電金屬氧化物110及抗氧化阻障層111係自第二井106(在最終將製造第二導電率類型的電晶體上)上移除。因此,在電晶體的形成已完成後,導電金屬氧化物110及阻障層111將會保留在一第一導電率類型之電晶體的結構內,同時導電金屬氧化物110及阻障層111將不會出現在該第二導電率類型之電晶體中。關鍵尺寸(CD)容差遮罩的使用定義了導電金屬氧化物110及阻障層111選擇性移除的部分,其不需如圖2所示,因為該遮罩的未對準將不會對後續處理造成不利影響。
在一較佳具體實施例,一氧化矽或氮化矽硬遮罩(未示出)係用於導電金屬氧化物110及阻障層111,因為許多適合的金屬蝕刻用於自第二導電率類型的區域中(即自第二井106上)移除層110及111將亦會蝕刻或退化一光阻遮罩。因此,需要一可充分地扺擋金屬蝕刻的遮罩。可使用與用於形成第二井106相同的遮罩圖案化硬遮罩。亦可移除層110及111而無需損壞底層的閘極介電質108,其可藉由適當的濕式、電漿或氣體蝕刻達成。
現參考圖3,在半導體基板102的第一井104及第二井106上形成一金屬114,藉此覆蓋阻障層111及閘極介電質108的曝露部分。金屬114係其工作函數不同於用於導電金屬氧化物110之金屬類型的一金屬類型。在用於導電金屬氧化物110之金屬類型具有的工作函數接近基板材料(例如,矽)的價能帶之具體實施例中,用於金屬114之金屬類型具有的工作函數接近基板材料之導電帶。相反地,在用於導電金屬氧化物110之金屬類型具有的工作函數接近基板材料之導電帶之具體實施例中,用於金屬114之金屬類型具有的工作函數接近基板材料之價能帶。
亦參考圖3所述,一含矽層116,其沉積作為一導電材料或係隨後製成為導電,係沉積在金屬114上。在一較佳具體實施例中,含矽層116係一多晶矽層或一多晶矽-鍺層,其原地摻雜或隨後摻雜成對於,例如,一閘極電極應用為足夠導電。含矽層116亦可摻雜或未摻雜非晶矽或矽鍺層。
金屬114較佳係沉積成約與導電金屬氧化物110相同的厚度,各金屬層約在10至1000埃(1至100奈米)厚的範圍內。含矽層116較佳係沉積為厚度在100至1500埃(10至150奈米)的範圍內。該含矽層的厚度並非關鍵,只要其比一後續間隔物形成製程中的更多容限厚即可,將討論如下。含矽層之厚度可為閘極堆疊的可變厚度層。換言之,若一特定閘極結構應限制為或目標為一特定的總厚度,則該含矽層可為厚度可變以達成該特定厚度的的層。
一抗反射塗層(ARC)118係沉積在含矽層116上。ARC 118較佳係一富矽的氮化矽層、一有機ARC、一氮氧化矽或任一可充當特定微影蝕刻製程之ARC功能的ARC材料。在一較佳具體實施例中,該ARC係以習知技術沉積在約1nm及20 nm厚之間。
現參考圖4,描述半導體裝置100在已執行一閘極遮罩及蝕刻製程以圖案化導電金屬氧化物110、阻障層111、金屬114及含矽層116之後,導致一第一閘極120形成在第一井104上且一第二閘極122形成在第二井106上。第一閘極120包括一在閘極介電質108上的導電金屬氧化物110、一在層110上的阻障層111及一在阻障層111上的第二金屬114。相反地,第二閘極122包括與閘極介電質108接觸的第二金屬114。第一閘極120和第二閘極122兩者皆具有一由含矽層116形成的覆蓋頂層。在閘極堆疊蝕刻期間ARC層118一開始亦被圖案化,但其可在閘極蝕刻後完全移除,及因此未顯示在圖4中。因為含矽層116在後續蝕刻及清洗期間保護該金屬閘極,其不需要將一ARC層保持在該等閘極的頂部上。此對於ARC稍後不需要在一接觸蝕刻製程中被個別蝕刻反而係被濕蝕刻以形成對閘極的接點而言具有優點。另外,ARC的完全移除會使閘極頂部上的矽化製程更為強健。
閘極120及122同時以光阻圖案化,並接著蝕刻。因為閘極具有不同高度,閘極蝕刻化學作用應選擇成將閘極向下蝕刻到該閘極介電質108,如圖4所示。在所述的具體實施例中,該閘極蝕刻不會移除該閘極介電質108。
繼續參考圖4,在圖案化第一閘極120及第二閘極122後,第一間隔物124係沿著該等閘極的側邊形成。在一較佳具體實施例中,第一間隔物124係藉由沉積一氧化矽薄層(100至300埃或10至30奈米)並接著各向異性地蝕刻該晶圓而形成,使得該氮化矽僅沿著該等閘極之側壁留下。該蝕刻的結果係,所得的間隔物將會具有漸縮的外形,如圖4所示,各閘極接近底部所具有的最大厚度或寬度約為50至200埃(5至20奈米)。在所述的具體實施例中,第一間隔物124用於保護該金屬閘極在一植入遮罩之後續移除過程中免受蝕刻的傷害。如前述,可用於剝離光阻遮罩之習知的混合液(piranha)及SC-1清洗處理亦會侵蝕用於金屬閘極的許多金屬。在另一具體實施例中,也可消除該等間隔物124。
如圖4所述,第一間隔物124之高度會相對於閘極的總高度或厚度而改變。例如,與第一閘極120相比,第一間隔物124沿著第二閘極122的側壁而變的更高。此不成一問題,因為含矽層116的存在對金屬閘極在後續蝕刻期間提供了足夠的保護,這是因為含矽層116可抵抗該等蝕刻的侵蝕。因此,該製程在佈局中因含矽層116的存在具有一用於變化及閘極堆疊高度的大處理餘裕。只要該間隔物覆蓋所有在含矽層116之下的底層金屬的側壁,該閘極堆疊將會被適當地保護。
在第一間隔物124形成後,若該介電質係高K介電質(例如,K大於3.9),則移除閘極介電質108的未受保護部分(例如,除了第一閘極120、第二閘極122及第一間隔物124下面之外的部分)。對於低K值,例如在二氧化矽的情況中,會保留該閘極介電質。藉由使用乾式或濕式化學方法,或藉由退火以將材料轉換成揮發性物質,根據所用之特定介電材料來實現閘極介電質之移除。
接下來,分別形成延伸區域126及130以自對準第一閘極120及第二閘極122,亦顯示在圖4中。在MOS電晶體結構中形成延伸區域,作為源極至汲極區的延伸以避免短通道效應。因為延伸區域126及130將會為二種不同的導電率類型(延伸區域126為第一導電率類型而延伸區域130為第二導電率類型),需要一遮罩在每一植入步驟的過程中遮蔽裝置的一部分。例如,在延伸區域126的形成期間會遮蔽該裝置與第二井106相關的部分,及在延伸區域130的形成期間會遮蔽該裝置與第一井104相關的部分。該等在植入步驟期間使用的遮罩可為習知的光阻遮罩。如前述,在習知雙金屬閘極製程中此階段光阻遮罩的移除係有害的,因為該等清洗溶液可能會侵蝕該閘極金屬。然而,根據本發明,第一間隔物124和合矽層116的組合會將該植入遮罩輕易地以習知清洗化學方法移除,如不會對金屬閘極本身造成有害影響的piranha及SC-1方法。
雖然未說明,但是亦可在此根據習知的實踐方法執行環形植入(halo implant)。再次地,必須使用植入遮罩而且這些遮罩之移除可容易地實踐本發明而不會傷害金屬閘極材料。
參考圖5,在延伸區域126及130形成後,一氧化襯墊134係沉積在該裝置上,包括第一閘極120及第二閘極122以及第一間隔物124上。一層136係形成在氧化襯墊134上。氧化襯墊134通常約為50至250埃(5至25奈米)厚,而層136通常為100至1000埃(10至100奈米)厚。氧化襯墊134較佳係由二氧化矽形成而層136較佳係由氮化矽形成,但也可為另一材料,其可足夠地選擇性蝕刻氧化襯墊134而且不會與矽化形成金屬(若該等電晶體之該等閘極或源極/汲極區將被矽化)反應。
如圖6所述,層136被各向異性地蝕刻以形成第二間隔物138而無需完全地移除氧化襯墊134。此可藉二氧化矽及氮化矽的一組合及使用CF4
、HBr及Ar之習知乾式蝕刻化學方法來達成。該氧化襯墊134可在間隔物138的形成期間變得更薄,但其並非關鍵,只要底層的基板材料(例如,矽)不要在製程中之此時曝露即可。
亦參考圖6所示,在間隔物138透過該薄化的氧化襯墊134形成後,源極/汲極區係以一自對準方法藉由植入形成在裝置100中。源極/汲極區140係形成為該電晶體(其包含第一閘極120)的部分,而源極/汲極區142係形成為該電晶體(其包含第二閘極122)的部分。源極/汲極區係使用習知的植入技術形成。
現參考圖7,接下來執行一退火以擴散該延伸及源極/汲極區成為所想要的輪廓,並且活化該摻雜劑。再次地,此係使用習知的實踐方式完成。之後,使用一習知濕式蝕刻自該裝置的未受保護區(例如,該等源極/汲極區、該等閘極及該等隔離區上面)移除氧化襯墊134之保留部分。被曝露的源極/汲極區及閘極接著使用一自對準製程藉由,例如沉積一毯覆式鈦、鈷或鎳層而且以相鄰的矽區域熱反應此金屬而被矽化,以形成如圖7所示的矽化區144。因此,使用覆蓋於第一閘極120及第二閘極122的含矽層對於電阻的觀點僅有一些有害效應,這是因為用於矽化該源極/汲極區的該矽化製程為了滿足電阻位準而同時用於矽化該閘極。電阻可以進一步藉由完整地矽化在閘極堆疊中的含矽層116而減少,其提供該等源極/汲極區之上的矽化區且該等源極/汲極區若需要本身可調整。
圖8所示為根據本發明另一具體實施例之半導體裝置200的橫截面圖;半導體裝置200類似於半導體裝置100,除了在半導體裝置200中,在沉積用於該PMOS電晶體之該等金屬層之前先沉積用於該NMOS電晶體之該等金屬層。元件參考符號相同於及製程步驟類似於上述之圖1-7。
此時,雙金屬閘極裝置實質上係完整的。熟知本技術基本原理其一者可認知及瞭解到,各種層間介電質及金屬互連係接續形成以根據本裝置設計來設計各種電晶體。接著可添加焊墊及鈍化層並可為了最終分布測試、單切(singulated)及封裝個別的積體電路。
現應瞭解提供一用於互補金氧半導體製程之雙金屬閘極結構,其克服了前述的問題。明確言之,本發明提供一種使用自一導電金屬氧化物形成的閘極電極,用於形成一雙閘極金屬結構之可靠方法。藉由在該導電金屬氧化物上形成一抗氧化阻障層避免自該導電金屬氧化物至一隨後層的氧遷移。此外,避免在該導電金屬氧化物及該隨後層之間形成一額外絕緣層。亦要避免該導電金屬氧化物閘極電極之工作函數的改變,因為該阻障層防止氧自該導電金屬氧化物閘極電極中流失。
在以上說明書中,已參考特定具體實施例而說明本發明。然而,熟習此項技術者應瞭解可進行各種修改而不脫離如以下申請專利範圍所提出的本發明之範疇。儘管已就特定導電類型或電位極性來說明本發明,但熟習此項技術者會明白導電類型及電位極性可反轉。另外,可擴伸本發明以不同的金屬閘極材料來形成三或多個閘極堆疊。例如,除了包含以一含矽層覆蓋一金屬的一閘極堆疊之外,也可包含以一含矽層覆蓋二金屬的一閘極堆疊,也可能有包含以一含矽層覆蓋三金屬的第三閘極堆疊。該第三閘極堆疊對於形成一裝置的輸入/輸出電晶體具有優勢,該輸入/輸出電晶體通常比邏輯電晶體具有較高的臨界電壓要求。該第三閘極堆疊可藉由沉積並圖案化該第一金屬層而達成,如圖2所示,接著沉積一第二金屬層並其將圖案化在類似於第二閘極堆疊的區域上。接下來,沉積該第三金屬層及該含矽覆蓋層,如圖3所示。此進一步可同樣地擴伸以形成一第四閘極堆疊、一第五閘極堆疊等等。因此,說明書中之規格及圖示均係參考絕非限制,且所有修改均包含於本發明之範疇內。
關於特定具體實施例的優勢、其他優點及問題解決方案已參照具體實施例如上所述。但是,優勢、優點、問題解決方案及產生或彰顯任何優勢、優點或解決方案的任何元件,均不應視為任何或所有申請專利範圍的關鍵、必要項或基本功能或元件。本文中所使用的術語「包括」、「包含」或其任何其他變化,都是用來涵蓋非專有內含項,使得包括元件清單的程序、方法、物品或裝置,不僅包括這些元件,而且還包括未明確列出或此類程序、方法、物品或裝置原有的其他元件。
100‧‧‧半導體裝置
102‧‧‧半導體基板
104‧‧‧井
106‧‧‧井
108‧‧‧閘極介電質
110‧‧‧導電金屬氧化物
111‧‧‧阻障層
112‧‧‧溝渠隔離結構
114‧‧‧金屬
116‧‧‧含矽層
118‧‧‧ARC層
120‧‧‧閘極
122‧‧‧閘極
124‧‧‧間隔物
126‧‧‧延伸區域
130‧‧‧延伸區域
134‧‧‧氧化襯墊
136‧‧‧層
138‧‧‧間隔物
140‧‧‧汲極區
142‧‧‧汲極區
144‧‧‧矽化區域
200‧‧‧半導體裝置
經由附圖中的範例而非限制來解說本發明,其中相同參考指示相似元件,並且其中:圖1係根據本發明一具體實施例之部份完成半導體裝置之部份橫截面圖;圖2係繼圖1之後的製程步驟,其中一導電金屬氧化物及阻障層係選擇性地自該半導體裝置的部分中移除;圖3係繼圖2之後的部份橫截面圖,其中一第二閘極金屬、一多晶矽覆蓋層及一ARC係沉積在該第一閘極金屬上;圖4係繼圖3之後的製程步驟,其中該等沉積金屬係圖案化在閘極結構內及第一間隔物係形成在該閘極結構旁邊;圖5係繼圖4之後的製程步驟,其中一氧化層及一氮化層係沉積在基板上,包括在該閘極結構及第一間隔物上;圖6係繼圖5之後的製程步驟,其中自該氮化層形成第二間隔物同時薄化該氧化層,且隨後形成源極/汲極區;圖7係繼圖6之後的製程步驟,其中移除在該等閘極及源極/汲極區上的薄氧化層,且隨後矽化這些區域以形成一實質上完整的裝置。
圖8所示為根據本發明另一具體實施例之半導體裝置的橫截面圖。
熟習此項技術者可以瞭解,為了簡化及清楚起見,圖中的元件不一定按比例繪製。例如,為了有助於改進對本發明之具體實施例的瞭解,圖式中的元件之某些可相對於其他元件而加以誇大。
100‧‧‧半導體裝置
104‧‧‧井
106‧‧‧井
108‧‧‧閘極介電質
110‧‧‧導電金屬氧化物
111‧‧‧阻障層
112‧‧‧溝渠隔離結構
114‧‧‧金屬
116‧‧‧含矽層
120‧‧‧閘極
122‧‧‧閘極
124‧‧‧間隔物
126‧‧‧延伸區域
130‧‧‧延伸區域
135‧‧‧文中未說明
138‧‧‧間隔物
140‧‧‧汲極區
142‧‧‧汲極區
144‧‧‧矽化區域
Claims (18)
- 一種用於形成半導體裝置的方法,其包括:提供一半導體基板,其中該半導體基板具有一第一區域;在該第一區域上形成一閘極介電質;在該閘極介電質上形成一導電金屬氧化物;在該導電金屬氧化物上形成一抗氧化阻障層;在該抗氧化阻障層上形成一覆蓋層;圖形化該導電金屬氧化物、該抗氧化阻障層、與該覆蓋層以形成具有一側面之一閘極,該側面從該半導體基板延伸出去;以及在該側面上形成一間隔,該間隔延伸跨越經圖形化之該導電金屬氧化物、經圖形化之該抗氧化阻障層、與經圖形化之該覆蓋層中每一者之一邊緣。
- 如請求項1之方法,其中該第一區域係摻雜n型。
- 如請求項2之方法,其中該導電金屬氧化物形成一PMOS閘極電極之至少一部分。
- 如請求項2之方法,其中:該半導體基板包括一第二區域;該第二區域係摻雜p型;以及該形成該半導體裝置進一步包括在該抗氧化阻障層上及在該覆蓋層下形成一NMOS閘極電極材料。
- 如請求項4之方法,其中形成該NMOS閘極電極進一步包括形成一選自由TaC及TaSiN組成的群組中選出的材料。
- 如請求項1之方法,其中形成該導電金屬氧化物進一步包括形成該導電金屬氧化物,其包含一選自由Ir、Mo、Ru、W、Os、Nb、Ti、V、Ni及Re組成的群組中選出的元素。
- 如請求項6之方法,其中形成該抗氧化阻障層進一步包括形成TiN。
- 如請求項1之方法,其中形成該覆蓋層進一步包括形成一多晶矽層,
- 如請求項1之方法,其中形成該抗氧化阻障層係發生在退火該半導體基板之前。
- 一種用於形成半導體裝置的方法,其包括:提供一半導體基板,其中該半導體基板具有一第一區域及一第二區域,且該第一區域具有的摻雜劑不同於該第二區域;在該第一區域及該第二區域上形成一閘極介電質;在該第一區域內之該閘極介電質上形成一導電金屬氧化物;在該第一區域內之該導電金屬氧化物上形成一抗氧化阻障層;在該第二區域內之該閘極介電質上形成一導電材料,及在該第一區域內之該抗氧化阻障層形成該導電材料;在該導電材料上形成一覆蓋層;圖形化該第一區域內之該導電金屬氧化物、該抗氧化阻障層、該導電材料、與該覆蓋層以形成具有一側面之一閘極,該側面從該半導體基板延伸出去;以及 在該側面上形成一間隔,該間隔延伸跨越經圖形化之該導電金屬氧化物、經圖形化之該抗氧化阻障層、經圖形化之該導電材料、與經圖形化之該覆蓋層中每一者之一邊緣。
- 如請求項10之方法,其中該第一區域係摻雜n型而該第二區域係摻雜p型。
- 如請求項10之方法,其中該導電金屬氧化物形成一P-MOS閘極電極之至少一部分,且該導電材料形成一N-MOS閘極電極之至少一部分。
- 如請求項10之方法,其中形成該導電材料進一步包括形成一選自由TaC及TaSiN組成的群組中選出的材料。
- 如請求項10之方法,其中形成該導電金屬氧化物進一步包括形成該導電金屬氧化物,其包含一選自由Ir、Mo、Ru、W、Os、Nb、Ti、V、Ni及Re組成的群組中選出的元素。
- 如請求項10之方法,其中該形成抗氧化阻障層進一步包括形成TiN。
- 如請求項10之方法,其中形成該抗氧化阻障層係發生在退火該半導體基板之前。
- 一種半導體裝置,其包括:一半導體基板,其中該半導體基板具有一第一區域;一閘極介電質,其在該第一區域上;一經圖形化之導電金屬氧化物,其在該閘極介電質上; 一經圖形化之抗氧化阻障層,其在該導電金屬氧化物上;一經圖形化之覆蓋層,其在該經圖形化之抗氧化阻障層上,其中該經圖形化之導電金屬氧化物、該經圖形化之抗氧化阻障層、與該經圖形化之覆蓋層形成具有從該半導體基板延伸出去之一側面的一閘極;以及一間隔,其在該側面上。
- 如請求項17之半導體裝置,其中該導電金屬氧化物包含一選自由Ir、Mo、Ru、W、Os、Nb、Ti、V、Ni及Re組成的群組中選出的元素;以及該抗氧化阻障層包含鈦及氮。
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TW200636875A (en) | 2006-10-16 |
JP2008529274A (ja) | 2008-07-31 |
JP4685882B2 (ja) | 2011-05-18 |
CN100483687C (zh) | 2009-04-29 |
WO2006081003A3 (en) | 2007-04-26 |
US20060166424A1 (en) | 2006-07-27 |
CN101091244A (zh) | 2007-12-19 |
KR20070094807A (ko) | 2007-09-21 |
WO2006081003A2 (en) | 2006-08-03 |
US7109079B2 (en) | 2006-09-19 |
KR101185685B1 (ko) | 2012-09-24 |
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