TWI384522B - 半導體間隙壁結構、用於將一半導體間隙壁晶粒黏著於一支撐表面之方法及用於組合一多晶片半導體封裝之方法 - Google Patents

半導體間隙壁結構、用於將一半導體間隙壁晶粒黏著於一支撐表面之方法及用於組合一多晶片半導體封裝之方法 Download PDF

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Publication number
TWI384522B
TWI384522B TW094110510A TW94110510A TWI384522B TW I384522 B TWI384522 B TW I384522B TW 094110510 A TW094110510 A TW 094110510A TW 94110510 A TW94110510 A TW 94110510A TW I384522 B TWI384522 B TW I384522B
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Taiwan
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spacer
layer
wafer
semiconductor
bonding layer
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TW094110510A
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TW200605146A (en
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Seung Wook Park
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Chippac Inc
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Priority claimed from US10/959,659 external-priority patent/US20050224919A1/en
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
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Description

半導體間隙壁結構、用於將一半導體間隙壁晶粒黏著於一支撐表面之方法及用於組合一多晶片半導體封裝之方法
本發明關於用在多晶片模組製造上之半導體間隙壁結構，及此封裝之製造方法。
 相關申請案之交叉參考
本申請案為2004年10月6日提出之第10/959,659號美國專利申請案之一接續部分，該申請案則主張2004年4月1日提出之第60/558,670號美國臨時專利申請案之優先權，此二案名稱皆為"間隙壁晶粒結構及黏著方法"。
為了從最小封裝取得最大功能及效率，目前已研發出多種增大密度之封裝。在諸類封裝之中為俗稱之多晶片模組、多晶片封裝或堆疊式晶片封裝。一多晶片模組包括一或多積體電路半導體晶片，通常稱之為電路晶粒，其相互堆疊以提供質輕、高密度、及增強電力性能等優點。多晶片封裝可包含所有電路晶粒或電路晶粒與間隙壁晶粒之一混合物，間隙壁晶粒典型上被用於將電路晶粒分隔。
半導體晶片封裝製程典型上由晶圓切割開始，亦即，鋸切一半導體晶圓以將晶圓分隔成個別半導體裝置或晶片。在鋸切之前，一晶圓安裝帶典型上被黏著於晶圓之背側。該晶圓安裝帶可在鋸切後使該等晶片聚在一起。
半導體晶片典型上利用一漿(典型上為一環氧樹脂漿狀黏膠)或一膜狀黏膠，以黏著於一預先安裝之晶片或基板。大體上，漿狀黏膠係比膜狀黏膠較常被使用。惟，有些多晶片模組可以利用膜狀黏膠而較成功地製造，因為黏膠膜之厚度均勻，使得半導體晶片有最小之傾斜或甚至無傾斜，且無環繞於半導體晶片之黏膠接縫。再者，無樹脂流出，因此其適用於具有緊密設計間隙或較薄晶片之多晶片堆疊與封裝。
在一使用膜狀黏膠以製造一多晶片模組之方法中，一黏膠膜係直接疊合於半導體晶圓之背側，且晶圓隨後由一般晶圓切割設備切成個別半導體晶片。為了堆疊該等半導體晶片，各晶片係由一晶片接合工具揚起，該工具通常安裝於一拾取與放置裝置之一端處，晶片被安裝至基板上或一預先安裝之半導體晶片上。此方法需要特殊之膜疊合設備。惟，其可縮短製造時間及降低成本，因為不需要漿之施配過程。
在晶片安裝製程之後，晶片之接合墊塊係在一配線接合期間利用金或鋁線連接於該基板之接合墊塊，以產生一半導體晶片裝置陣列。最後，半導體晶片及連接於該基板之其相關聯配線皆予以囊封，其典型上使用一環氧樹脂模塑化合物，以產生一囊封狀半導體裝置陣列。模塑化合物使該半導體裝置免於外部環境之影響，例如實體之衝擊與濕度。囊封之後，該囊封裝置典型上利用一雷射鋸而分隔成個別之半導體晶片封裝。
本發明之一第一觀點係指一種半導體間隙壁結構，其包含一可去除層，其隨後為一間隙壁黏接層，其隨後為一半導體間隙壁層，其隨後為一切割帶層。該可去除層例如可包含一背面磨削膠帶層或一保護性覆蓋層。該半導體間隙壁結構亦可包含一設於該半導體間隙壁層與該切割帶層之間之第二間隙壁黏接層。該半導體間隙壁結構尚可包含一設於該可去除層與該間隙壁黏接層之間之一介面處之釋放黏膠，以利於該可去除層自該間隙壁黏接層去除。
本發明之一第二觀點係指一種用於將一半導體間隙壁晶粒黏著於一支撐表面之方法。取得一第一次組件，其包含一間隙壁晶圓，具有第一及第二側、一背面磨削膠帶層及一設於該第一側與該背面磨削膠帶層之間之間隙壁黏接層。該間隙壁晶圓之第二側係進行背面磨削，以產生一第二次組件。該第二次組件固接於一切割帶，且令該背面磨削膠帶層曝露。該背面磨削膠帶係自該間隙壁黏接層去除。一槽道陣列係形成自該間隙壁黏接層延伸到至少該切割帶層，以產生間隙壁/黏膠晶粒結構。該等間隙壁/黏膠晶粒結構包含間隙壁晶粒及黏膠。一間隙壁/黏膠晶粒結構固接於一支撐表面，且令該間隙壁黏接層曝露。在該背面磨削步驟之後且在該第一固接步驟之前，一第二間隙壁黏接層黏接於該間隙壁晶圓之第二側，使該第二間隙壁黏接層可用於將該間隙壁/黏膠晶粒結構固接於該支撐表面。該第二間隙壁黏接層可經選擇，以利適應於一半導體基板之一凹凸不平支撐表面。
本發明之一第三觀點係指一種用於組合一多晶片半導體封裝之方法。取得一第一次組件，其包含一半導體間隙壁晶圓，具有第一及第二側、一背面磨削膠帶層及一設於該第一側與該背面磨削膠帶層之間之間隙壁黏接層。該間隙壁晶圓之第二側係進行背面磨削，以產生一第二次組件。該第二次組件固接於一切割帶，且令該背面磨削膠帶層曝露。該背面磨削膠帶係自該間隙壁黏接層去除。一自該間隙壁黏接層延伸到至少該切割帶層之槽道陣列係形成以產生間隙壁/黏膠晶粒結構。該等間隙壁/黏膠晶粒結構包含間隙壁晶粒及黏膠。一間隙壁/黏膠晶粒結構固接於一支撐表面，且令該間隙壁黏接層曝露。一第二電路晶粒相關於該間隙壁/黏膠晶粒結構之黏膠而定位，以將該第二電路晶粒固接於該間隙壁晶粒。該方法亦可包括在該背面磨削步驟之後且在該第一固接步驟之前，將一第二間隙壁黏接層黏接於該間隙壁晶圓之第二側，使該第二間隙壁黏接層可在該第二固接步驟期間用於將該間隙壁/黏膠晶粒結構固接於該支撐表面。
本發明之一第四觀點係指一種用於將一半導體間隙壁晶粒黏著於一支撐表面之方法。一第一次組件包含一間隙壁晶圓，其具有第一及第二側及一設於該第一側之背面磨削膠帶層。該間隙壁晶圓之第二側係進行背面磨削，以產生一第二次組件。一保護性覆蓋層與該間隙壁晶圓之第二側係以其間之一間隙壁黏接層固接，以產生一第三次組件。該背面磨削膠帶層係自該第三次組件之間隙壁晶圓之第一側去除，以產生一第四次組件。該第四次組件固接於一切割帶，且令該保護性覆蓋層曝露。該保護性覆蓋層係自該間隙壁黏接層去除。一槽道陣列係形成自該間隙壁黏接層延伸到至少該切割帶層，藉此產生間隙壁/黏膠晶粒結構。該等間隙壁/黏膠晶粒結構包含間隙壁晶粒及黏膠。一間隙壁/黏膠晶粒結構固接於一支撐表面，且令該間隙壁黏接層曝露。在一些實施例中，在該背面磨削步驟之後且在該第二固接步驟之前，一第二間隙壁黏接層黏接於該間隙壁晶圓之第一側，使該第二間隙壁黏接層可用於將該間隙壁/黏膠晶粒結構固接於該支撐表面。該第二間隙壁黏接層之厚度可經選擇以適應於一凹凸不平之支撐表面。例如，該第二間隙壁黏接層可以比該第一間隙壁黏接層至少厚大約50%。
本發明之一第五觀點係指一種用於組合一多晶片半導體封裝之方法。取得一第一次組件，其包含一半導體間隙壁晶圓，具有第一及第二側及一設於該第一側之背面磨削膠帶層。該間隙壁晶圓之第二側係進行背面磨削，以產生一第二次組件。一保護性覆蓋層與該間隙壁晶圓之第二側係以其間之一間隙壁黏接層固接，以產生一第三次組件。該背面磨削膠帶層係自該第三次組件之間隙壁晶圓之第一側去除，以產生一第四次組件。該第四次組件固接於一切割帶，且令該保護性覆蓋層曝露。該保護性覆蓋層係自該間隙壁黏接層去除。一自該間隙壁黏接層延伸到至少該切割帶層之槽道陣列係形成以產生間隙壁/黏膠晶粒結構，該等間隙壁/黏膠晶粒結構包含間隙壁晶粒及黏膠。一間隙壁/黏膠晶粒結構固接於一支撐表面，且令該間隙壁黏接層曝露。一第二電路晶粒係相關於該間隙壁/黏膠晶粒結構之黏膠而定位，以將該第二電路晶粒固接於該間隙壁晶粒。在一些實施例中，在該背面磨削步驟之後且在該第二固接步驟之前，將一第二間隙壁黏接層黏接於該間隙壁晶圓之第一側，使該第二間隙壁黏接層可在該第三固接步驟期間用於將該間隙壁/黏膠晶粒結構固接於該支撐表面。該第二間隙壁黏接層之厚度係經選擇以適應於一半導體基板之一凹凸不平支撐表面。
本發明之多項特性及優點可藉由以下說明得知，其中較佳實施例已配合附圖詳細說明。
本發明現在即參考諸附圖完整說明於後，圖中揭示本發明之變換實施例。諸圖式為示意圖，揭示本發明之特性及其對於其他特性與結構之關係，且未依比例繪示。為了增進本文之明確性，在用於揭述本發明實施例之諸圖式中，對應於其他圖中所示元件之元件皆不特別予以重新編號，儘管其在所有圖式中皆可輕易辨識。
圖1係一間隙壁晶圓10之側視圖。該等間隙壁晶圓係將被裁切成個別間隙壁晶粒12之半導體晶圓，參閱圖9。間隙壁晶粒12典型上用於在一多晶片封裝18內將電路晶粒14、16分隔。圖2說明間隙壁晶圓10之一第一側20接合於一背面磨削膠帶組件24之一間隙壁黏接層22。間隙壁黏接層22典型上為一介電質膜黏膠，例如可以取自Lintec公司之Lintec LE5000。組件24具有一背面磨削膠帶層26，其可藉由一釋放黏膠30而可釋放地黏接於間隙壁黏接層22。如文後所述，釋放黏膠30被設計用於容許背面磨削膠帶層26分離於黏接層22。惟，釋放黏膠30之形式為在後續處理步驟期間或之後不干擾到層22之黏性與動作。
如圖3所示，一第一次組件32係由圖2之結構產生且準備進行背面磨削。圖4揭示在第一次組件32之間隙壁晶圓10之第二側34之編號35處進行背面磨削，以產生一第二次組件36。提供背面磨削膠帶層26、釋放黏膠30及間隙壁黏接層22，而不僅是背面磨削膠帶層26及釋放黏膠30，即可在背面磨削操作期間對晶圓10提供額外保護。此亦有助於多晶片封裝18之組合，容後詳述。
圖4之第二次組件36之間隙壁晶圓10之背面磨削後之第二側34係在圖5中被黏接於一環框40內之一切割帶38。圖6說明熱或UV輻射之施加，以在圖7之背面磨削膠帶去除步驟期間，協助減低背面磨削膠帶層26與間隙壁黏接層22之間之釋放黏膠30之結合強度。UV或熱之選擇、或為了減低釋放黏膠30之結合強度所需之任意動作型式，其至少一部分係取決於釋放黏膠30與間隙壁黏接層22之成分、處理環境及欲接合之表面類型。圖7揭示圖6中之背面磨削膠帶層26自間隙壁黏接層22移除，以產生一第三次組件42。背面磨削膠帶層26例如可使用日本東京Tokyo Seimitsu有限公司(TSK)出售之設備移除。
背面磨削膠帶層26去除後，一槽道陣列44形成於圖7之第三次組件42內。請參閱圖8，間隙壁/黏膠晶粒結構46係在圖8中以一較誇大之厚度表示，以利於說明。此典型上使用一雷射切割鋸完成；習知切割鋸設備係由日本東京Disco公司出售。此產生複數個間隙壁/黏膠晶粒結構46。間隙壁/黏膠晶粒結構46包含間隙壁晶粒12及黏膠48。請參閱圖9。黏膠48之緣部係由此切割步驟界定。
圖10說明具有間隙壁晶粒12之多晶片模組18利用一接合黏膠50以固接於該第二電路晶粒。此例如可以使用習知晶粒黏著設備完成，諸如取自瑞士Cham之Esec公司之Esec 2008。接合黏膠50例如可為施加於第二電路晶粒14之習知或非習知膜或漿狀黏膠。圖9之間隙壁/黏膠晶粒結構46已被用於將第三電路晶粒16固定在一間隔於第二電路晶粒14上方之位置，且不需要任意其他黏膠施加步驟，例如若一黏膠漿或一黏膠膜施加於一間隙壁晶粒與第三電路晶粒16之間時所需者。任意殘留之釋放黏膠30並不會對於由黏膠48所產生之間隙壁晶粒12與電路晶粒16之間之接合有實質影響。
圖11－17說明本發明之一變換實施例，且相同編號係指相同元件。一第二間隙壁黏接層60係在圖11中被揭示為黏接於圖4之第二次組件36之間隙壁晶圓10之第二背面磨削側34。圖12－17相似於圖5及7－10，且其在圖16中揭示一黏膠/間隙壁/黏膠晶粒結構62之產生，以利產生圖17之多晶片模組64。若有需要或必要時，亦可使用一製程以減低釋放黏膠30之結合強度，如圖6所示。黏膠48在圖16之間隙壁晶粒12二側上之存在即可以不需要提供例如第二電路晶粒14與間隙壁晶粒12間之接合黏膠50。
圖18－22說明本發明之另一變換實施例，且相同編號係指相同元件。圖18說明一包含半導體間隙壁晶圓10之第一次組件70，該間隙壁晶圓具有第一及第二側20、34及位於該第一側之背面磨削膠帶層26。間隙壁晶圓10之第二側34係在編號35處進行背面磨削，以產生一第二次組件72。一保護性覆蓋層74與第二側34係利用其間之間隙壁黏接層22固接，以產生一第三次組件76，請參閱圖19。保護性覆蓋層74可以是一般釋放內襯型層，其用於處理期間協助保護該結構。如圖20中所建議，背面磨削膠帶層26係自第三次組件76中之間隙壁晶圓10之第一側20去除，以產生一第四次組件78。第四次組件78固接於切割帶38，且令保護性覆蓋層74曝露。保護性覆蓋層74係在圖22中自間隙壁黏接層22移除。釋放黏膠30可以適當地使用在任意諸層之間。此實施例之剩餘製程步驟大體上對應於有關圖14－17中所示者，故恕不予以贅述。
本發明瞭解到將一間隙壁晶粒安裝於某些支撐表面，例如由一半導體基板提供之支撐表面，其不同於將一間隙壁晶粒安裝於其他支撐表面所造成之問題，例如由一電路晶粒所提供之支撐表面。有些可供一半導體間隙壁晶圓安裝之支撐表面相對於其他支撐表面而並非呈光滑狀，亦即凹凸不平。為了適應該等凹凸不平表面，第二間隙壁黏接層60可被選擇用於適應一凹凸不平之支撐表面。用於適應該等凹凸不平表面之主要觀點在於第二間隙壁黏接層60之厚度。第一間隙壁黏接層22之一典型厚度為大約10至25微米，而當適應一凹凸不平之支撐表面時，第二間隙壁黏接層60之一典型厚度為至少大約35微米。第二間隙壁黏接層60之一典型厚度為大約40微米，亦即，比第一間隙壁黏接層22厚至少大約50%。第二間隙壁黏接層60之其他物理性特徵，例如低彈性係數、柔軟材料，亦可經調整或變更以適應一凹凸不平之支撐表面。一適用於間隙壁黏接層22、60之膜型黏膠例子可以取自新澤西州08807 Bridgewater市National Starch & Chemical公司之產品Ablestik RP787－3DS。
如上所述，本發明有助於在背面磨削操作期間保護晶圓10，且有利於多晶片封裝之組合。本發明亦可改善晶粒晶片之晶粒堆疊品質、裂痕與膜毛刺、及晶粒堆疊設計間隙，而無樹脂流出。
在不脫離文後請求項所定義之本發明主旨下，其他變更及變化型式皆可進行於該等揭露之實施例。例如，間隙壁/黏膠晶粒結構46及黏膠/間隙壁/黏膠晶粒結構62可用於支撐其他間隙壁晶粒以及電路晶粒。
上述參考之任意及所有專利、專利申請案及刊印公告皆在此納入供作參考。
其他實施例應在本發明範疇內。
10．．．間隙壁晶圓
12．．．間隙壁晶粒
14．．．第二電路晶粒
16．．．第三電路晶粒
18．．．多晶片封裝
20．．．間隙壁晶圓之第一側
22．．．第一間隙壁黏接層
24．．．背面磨削膠帶組件
26．．．背面磨削膠帶層
30．．．釋放黏膠
32、70．．．第一次組件
34．．．間隙壁晶圓之第二側
35．．．背面磨削
36、72．．．第二次組件
38．．．切割帶
40．．．環框
42、76．．．第三次組件
44．．．槽道陣列
46．．．間隙壁/黏膠晶粒結構
48．．．黏膠
50．．．接合黏膠
60．．．第二間隙壁黏接層
62．．．黏膠/間隙壁/黏膠晶粒結構
64．．．多晶片模組
74．．．保護性覆蓋層
78．．．第四次組件
圖1係一間隙壁晶圓之側視圖，其係一欲被裁切成個別間隙壁晶粒之半導體晶圓；圖2說明圖1之間隙壁晶圓之一第一側接合於一背面磨削膠帶組件之間隙壁黏接層；圖3說明一第一次組件產生自圖2之該結構且準備進行背面磨削；圖4揭示圖3之次組件之間隙壁晶圓之第二側之背面磨削，以產生一第二次組件；圖5說明圖4之第二次組件，且間隙壁晶圓之背面磨削後之第二側黏接於一切割帶；圖6說明熱或UV輻射對於圖5結構之施加；圖7揭示背面磨削膠帶層自圖6之間隙壁黏接層移除，以產生一第三次組件；圖8揭示圖7之第三次組件，其在一槽道陣列形成於其內之後，產生複數個間隙壁/黏膠晶粒結構；圖9說明一個別間隙壁/黏膠晶粒結構；圖10說明一多晶片模組，其中圖9之間隙壁/黏膠晶粒結構已用於將一第三電路晶粒安裝於一第二電路晶粒；圖11－17說明本發明之一變換實施例；圖11說明一間隙壁黏接層安裝於圖4之第二次組件之間隙壁晶圓之第二背面磨削側；及圖12－17相似於圖5及7－10，且其在圖16中揭示一黏膠/間隙壁/黏膠晶粒結構之產生，以利產生圖17之多晶片模組；圖18－22說明在本發明之另一變換實施例之製造期間所採取之一些步驟；圖18說明一間隙壁晶圓具有一背面磨削膠帶層於一第一側上，及建議將間隙壁晶圓之第二非電路側背面磨削；圖19揭示圖18之結構，且一保護性覆蓋層與該晶圓之第二側係利用其間之一間隙壁黏接層固接；圖20揭示背面磨削膠帶層自該晶圓之第一側去除；圖21說明圖20之結構固接於一切割帶，且令保護性覆蓋層曝露；及圖22揭示保護性覆蓋層自圖21之結構移除，隨後剩餘結構可用相似於圖14－17所示之方式處理。
10．．．間隙壁晶圓
22．．．第一間隙壁黏接層
26．．．背面磨削膠帶層
30．．．釋放黏膠
36．．．次組件
38．．．切割帶
40．．．環框

Claims (29)

  1. 一種半導體間隙壁結構，其包含：一可去除層，其隨後為一間隙壁黏接層，其隨後為一半導體間隙壁層，其隨後為一切割帶層及設於該可去除層與該間隙壁黏接層之間之一介面處之一釋放黏膠，以利於該可去除層自該間隙壁黏接層去除。
  2. 如請求項1之半導體間隙壁結構，其中該可去除層包含一背面磨削膠帶層。
  3. 如請求項1之半導體間隙壁結構，其中該可去除層包含一保護性覆蓋層。
  4. 如請求項1之半導體間隙壁結構，尚包含一設於該半導體間隙壁層與該切割帶層間之一第二間隙壁黏接層。
  5. 如請求項1之半導體間隙壁結構，其中該間隙壁黏接層包含一介電質間隙壁黏接層。
  6. 如請求項1之半導體間隙壁結構，其中該間隙壁黏接層包含一環氧樹脂黏膠。
  7. 如請求項1之半導體間隙壁結構，其中該半導體間隙壁層包含一半導體晶圓。
  8. 一種半導體間隙壁結構，其包含：一可去除層，其隨後為一第一間隙壁黏接層，其隨後為一半導體間隙壁晶圓，其隨後為 一第二間隙壁黏接層，其隨後為一切割帶層；及一釋放黏膠，其設於該可去除層與該第一間隙壁黏接層間之一介面處，以利於該可去除層自該第一間隙壁黏接層去除。
  9. 如請求項8之半導體間隙壁結構，其中該可去除層包含一背面磨削膠帶層。
  10. 如請求項8之半導體間隙壁結構，其中該可去除層包含一保護性覆蓋層。
  11. 一種用於將一半導體間隙壁晶粒黏著於一支撐表面之方法，其包含：取得一第一次組件，其包含一具有第一及第二側之間隙壁晶圓、一背面磨削膠帶層及一設於該第一側與該背面磨削膠帶層間之間隙壁黏接層；將該間隙壁晶圓之第二側進行背面磨削，以產生一第二次組件；將該第二次組件固接於一切割帶，且令該背面磨削膠帶層曝露；自該間隙壁黏接層去除該背面磨削膠帶；形成一槽道陣列，其係自該間隙壁黏接層延伸到至少該切割帶層，且藉此產生間隙壁/黏膠晶粒結構，該等間隙壁/黏膠晶粒結構包含間隙壁晶粒及黏膠；及將一間隙壁/黏膠晶粒結構固接於一支撐表面，且令該間隙壁黏接層曝露。
  12. 如請求項11之方法，其中該去除步驟係在該第一固接步驟之後實施。
  13. 如請求項11之方法，尚包含在該背面磨削步驟之後且在該第一固接步驟之前，將一第二間隙壁黏接層黏接於該間隙壁晶圓之第二側，使該第二間隙壁黏接層可用於將該間隙壁/黏膠晶粒結構固接於該支撐表面。
  14. 如請求項13之方法，尚包含選擇該第二間隙壁黏接層為較厚於該第一間隙壁黏接層，以利於良好地適應於一凹凸不平之支撐表面。
  15. 如請求項14之方法，其中該選擇步驟係實施以利於該第二間隙壁黏接層比該第一間隙壁黏接層於厚度上至少大約厚了50%。
  16. 如請求項13之方法，尚包含至少選擇該第二間隙壁黏接層之厚度以適應於一凹凸不平之支撐表面。
  17. 如請求項13之方法，其中該第二間隙壁黏接層係至少大約為35微米之厚度。
  18. 如請求項12之方法，其中該取得步驟係實施以利於該第一次組件包含一設於該背面磨削膠帶層與該間隙壁黏接層間之一介面處之釋放黏膠，以利該背面磨削膠帶去除步驟。
  19. 一種用於組合一多晶片半導體封裝之方法，其包含：取得一第一次組件，其包含一具有第一及第二側之半導體間隙壁晶圓、一背面磨削膠帶層及一設於該第一側與該背面磨削膠帶層之間之間隙壁黏接層； 將該間隙壁晶圓之第二側進行背面磨削，以產生一第二次組件；將該第二次組件固接於一切割帶，且令該背面磨削膠帶層曝露；自該間隙壁黏接層去除該背面磨削膠帶；形成一槽道陣列，其係自該間隙壁黏接層延伸到至少該切割帶層，且藉此產生間隙壁/黏膠晶粒結構，該等間隙壁/黏膠晶粒結構包含間隙壁晶粒及黏膠；將一間隙壁/黏膠晶粒結構固接於一支撐表面，且令該間隙壁黏接層曝露；及將一第二電路晶粒相關於該間隙壁/黏膠晶粒結構之黏膠而定位，以將該第二電路晶粒固接於該間隙壁晶粒。
  20. 如請求項19之方法，尚包含：在該背面磨削步驟之後且在該第一固接步驟之前，將一第二間隙壁黏接層黏接於該間隙壁晶圓之第二側，使該第二間隙壁黏接層可在該第二固接步驟期間用於將該間隙壁/黏膠晶粒結構固接於該支撐表面；及至少選擇該第二間隙壁黏接層之厚度以適應於一半導體基板之一凹凸不平支撐表面。
  21. 一種用於將一半導體間隙壁晶粒黏著於一支撐表面之方法，其包含：取得一第一次組件，其包含一具有第一及第二側之間隙壁晶圓及一設於該第一側之背面磨削膠帶層； 將該間隙壁晶圓之第二側進行背面磨削，以產生一第二次組件；將一保護性覆蓋層與該間隙壁晶圓之第二側以其間之一間隙壁黏接層固接，以產生一第三次組件；自該第三次組件之間隙壁晶圓之第一側去除該背面磨削膠帶層，以產生一第四次組件；將該第四次組件固接於一切割帶，且令該保護性覆蓋層曝露；自該間隙壁黏接層去除該保護性覆蓋層；形成一槽道陣列，其係自該間隙壁黏接層延伸到至少該切割帶層，且藉此產生間隙壁/黏膠晶粒結構，該等間隙壁/黏膠晶粒結構包含間隙壁晶粒及黏膠；及將一間隙壁/黏膠晶粒結構固接於一支撐表面，且令該間隙壁黏接層曝露。
  22. 如請求項21之方法，其中該第一去除步驟係在該第一固接步驟之後實施。
  23. 如請求項21之方法，其中該第二去除步驟係在該第二固接步驟之後實施。
  24. 如請求項21之方法，尚包含在該背面磨削步驟之後且在該第二固接步驟之前，將一第二間隙壁黏接層黏接於該間隙壁晶圓之第一側，使該第二間隙壁黏接層可用於將該間隙壁/黏膠晶粒結構固接於該支撐表面。
  25. 如請求項24之方法，尚包含至少選擇該第二間隙壁黏接層之厚度以適應於一凹凸不平之支撐表面，該選擇步驟 係實施以利於該第二間隙壁黏接層比該第一間隙壁黏接層於厚度上至少大約厚了50%。
  26. 如請求項21之方法，其中該取得步驟係實施以利於該第一次組件包含一設於該背面磨削膠帶層與該間隙壁晶圓間之一介面處之釋放黏膠，以利該背面磨削膠帶去除步驟。
  27. 如請求項21之方法，其中該第一固接步驟係實施以利於該第三次組件包含一設於該保護性覆蓋層與該間隙壁黏接層間之一介面處之釋放黏膠，以利該保護性覆蓋層去除步驟。
  28. 一種用於組合一多晶片半導體封裝之方法，其包含：取得一第一次組件，其包含一具有第一及第二側之半導體間隙壁晶圓及一設於該第一側之背面磨削膠帶層；將該間隙壁晶圓之第二側進行背面磨削，以產生一第二次組件；將一保護性覆蓋層與該間隙壁晶圓之第二側以其間之一間隙壁黏接層固接，以產生一第三次組件；自該第三次組件之間隙壁晶圓之第一側去除該背面磨削膠帶層，以產生一第四次組件；將該第四次組件固接於一切割帶，且令該保護性覆蓋層曝露；自該間隙壁黏接層去除該保護性覆蓋層；形成一槽道陣列，其係自該間隙壁黏接層延伸到至少該切割帶層，且藉此產生間隙壁/黏膠晶粒結構，該等間 隙壁/黏膠晶粒結構包含間隙壁晶粒及黏膠；將一間隙壁/黏膠晶粒結構固接於一支撐表面，且令該間隙壁黏接層曝露；及將一第二電路晶粒相關於該間隙壁/黏膠晶粒結構之黏膠而定位，以將該第二電路晶粒固接於該間隙壁晶粒。
  29. 如請求項28之方法，尚包含：在該背面磨削步驟之後且在該第二固接步驟之前，將一第二間隙壁黏接層黏接於該間隙壁晶圓之第一側，使該第二間隙壁黏接層可在該第三固接步驟期間用於將該間隙壁/黏膠晶粒結構固接於該支撐表面；及至少選擇該第二間隙壁黏接層之厚度以適應於一半導體基板之一凹凸不平支撐表面。
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