TWI359464B - Semiconductor transistor having structural element - Google Patents

Semiconductor transistor having structural element Download PDF

Info

Publication number
TWI359464B
TWI359464B TW094126811A TW94126811A TWI359464B TW I359464 B TWI359464 B TW I359464B TW 094126811 A TW094126811 A TW 094126811A TW 94126811 A TW94126811 A TW 94126811A TW I359464 B TWI359464 B TW I359464B
Authority
TW
Taiwan
Prior art keywords
electrode
semiconductor
control electrode
layer
region
Prior art date
Application number
TW094126811A
Other languages
English (en)
Chinese (zh)
Other versions
TW200620483A (en
Inventor
Voon-Yew Thean
Dina H Triyoso
Bich-Yen Nguyen
Original Assignee
Freescale Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Freescale Semiconductor Inc filed Critical Freescale Semiconductor Inc
Publication of TW200620483A publication Critical patent/TW200620483A/zh
Application granted granted Critical
Publication of TWI359464B publication Critical patent/TWI359464B/zh

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/791Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • H10D30/797Arrangements for exerting mechanical stress on the crystal lattice of the channel regions being in source or drain regions, e.g. SiGe source or drain
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0212Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0221Manufacture or treatment of FETs having insulated gates [IGFET] having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended-drain MOSFETs [EDMOS]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/027Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
    • H10D30/0275Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs forming single crystalline semiconductor source or drain regions resulting in recessed gates, e.g. forming raised source or drain regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/01Manufacture or treatment
    • H10D62/021Forming source or drain recesses by etching e.g. recessing by etching and then refilling
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/691Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator comprising metallic compounds, e.g. metal oxides or metal silicates 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0167Manufacturing their channels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/017Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172Manufacturing their gate conductors
    • H10D84/0174Manufacturing their gate conductors the gate conductors being silicided
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172Manufacturing their gate conductors
    • H10D84/0177Manufacturing their gate conductors the gate conductors having different materials or different implants
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0188Manufacturing their isolation regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/82Heterojunctions
    • H10D62/822Heterojunctions comprising only Group IV materials heterojunctions, e.g. Si/Ge heterojunctions

Landscapes

  • Thin Film Transistor (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
TW094126811A 2004-08-24 2005-08-08 Semiconductor transistor having structural element TWI359464B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/924,632 US6979622B1 (en) 2004-08-24 2004-08-24 Semiconductor transistor having structural elements of differing materials and method of formation

Publications (2)

Publication Number Publication Date
TW200620483A TW200620483A (en) 2006-06-16
TWI359464B true TWI359464B (en) 2012-03-01

Family

ID=35482526

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094126811A TWI359464B (en) 2004-08-24 2005-08-08 Semiconductor transistor having structural element

Country Status (7)

Country Link
US (2) US6979622B1 (enExample)
EP (1) EP1784859A4 (enExample)
JP (1) JP4777987B2 (enExample)
KR (1) KR20070041757A (enExample)
CN (1) CN1993815A (enExample)
TW (1) TWI359464B (enExample)
WO (1) WO2006023197A2 (enExample)

Families Citing this family (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7402207B1 (en) 2004-05-05 2008-07-22 Advanced Micro Devices, Inc. Method and apparatus for controlling the thickness of a selective epitaxial growth layer
KR100655774B1 (ko) * 2004-10-14 2006-12-11 삼성전자주식회사 식각 저지 구조물, 이의 제조 방법, 이를 포함하는 반도체장치 및 그 제조 방법
US7241700B1 (en) 2004-10-20 2007-07-10 Advanced Micro Devices, Inc. Methods for post offset spacer clean for improved selective epitaxy silicon growth
US7402485B1 (en) 2004-10-20 2008-07-22 Advanced Micro Devices, Inc. Method of forming a semiconductor device
US7456062B1 (en) 2004-10-20 2008-11-25 Advanced Micro Devices, Inc. Method of forming a semiconductor device
US20060252191A1 (en) * 2005-05-03 2006-11-09 Advanced Micro Devices, Inc. Methodology for deposition of doped SEG for raised source/drain regions
US7553732B1 (en) 2005-06-13 2009-06-30 Advanced Micro Devices, Inc. Integration scheme for constrained SEG growth on poly during raised S/D processing
US20060281271A1 (en) * 2005-06-13 2006-12-14 Advanced Micro Devices, Inc. Method of forming a semiconductor device having an epitaxial layer and device thereof
US7572705B1 (en) 2005-09-21 2009-08-11 Advanced Micro Devices, Inc. Semiconductor device and method of manufacturing a semiconductor device
US7538002B2 (en) * 2006-02-24 2009-05-26 Freescale Semiconductor, Inc. Semiconductor process integrating source/drain stressors and interlevel dielectric layer stressors
US7479422B2 (en) * 2006-03-10 2009-01-20 Freescale Semiconductor, Inc. Semiconductor device with stressors and method therefor
DE102006015075A1 (de) * 2006-03-31 2007-10-11 Advanced Micro Devices, Inc., Sunnyvale Technik zur Bereitstellung von Verspannungsquellen in MOS-Transistoren in unmittelbarer Nähe zu einem Kanalgebiet
US20080108190A1 (en) * 2006-11-06 2008-05-08 General Electric Company SiC MOSFETs and self-aligned fabrication methods thereof
US8377812B2 (en) * 2006-11-06 2013-02-19 General Electric Company SiC MOSFETs and self-aligned fabrication methods thereof
US7695761B1 (en) 2006-12-21 2010-04-13 Western Digital (Fremont), Llc Method and system for providing a spin tunneling magnetic element having a crystalline barrier layer
EP1936696A1 (en) * 2006-12-22 2008-06-25 INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM vzw (IMEC) A field effect transistor device and methods of production thereof
US8559141B1 (en) 2007-05-07 2013-10-15 Western Digital (Fremont), Llc Spin tunneling magnetic element promoting free layer crystal growth from a barrier layer interface
US7825003B2 (en) * 2007-06-26 2010-11-02 International Business Machines Corporation Method of doping field-effect-transistors (FETs) with reduced stress/strain relaxation and resulting FET devices
US7936042B2 (en) * 2007-11-13 2011-05-03 International Business Machines Corporation Field effect transistor containing a wide band gap semiconductor material in a drain
US8545999B1 (en) 2008-02-21 2013-10-01 Western Digital (Fremont), Llc Method and system for providing a magnetoresistive structure
US8498084B1 (en) 2009-07-21 2013-07-30 Western Digital (Fremont), Llc Magnetoresistive sensors having an improved free layer
US8194365B1 (en) 2009-09-03 2012-06-05 Western Digital (Fremont), Llc Method and system for providing a read sensor having a low magnetostriction free layer
US20110049582A1 (en) * 2009-09-03 2011-03-03 International Business Machines Corporation Asymmetric source and drain stressor regions
US8436404B2 (en) 2009-12-30 2013-05-07 Intel Corporation Self-aligned contacts
US8415731B2 (en) * 2010-01-20 2013-04-09 Semiconductor Energy Laboratory Co., Ltd. Semiconductor storage device with integrated capacitor and having transistor overlapping sections
US9331174B2 (en) 2010-04-15 2016-05-03 Globalfoundries Inc. Method for improving device performance using epitaxially grown silicon carbon (SiC) or silicon-germanium (SiGe)
US8237197B2 (en) 2010-07-07 2012-08-07 International Business Machines Corporation Asymmetric channel MOSFET
US8450792B2 (en) 2011-04-08 2013-05-28 International Business Machines Corporation Structure and fabrication method of tunnel field effect transistor with increased drive current and reduced gate induced drain leakage (GIDL)
US8685825B2 (en) * 2011-07-27 2014-04-01 Advanced Ion Beam Technology, Inc. Replacement source/drain finFET fabrication
US8871584B2 (en) * 2011-07-27 2014-10-28 Advanced Ion Beam Technology, Inc. Replacement source/drain finFET fabrication
CN103489914B (zh) * 2012-06-12 2016-01-20 香港科技大学 具有非对称晶体管的静态随机访问存储器及其控制方法
US8896030B2 (en) 2012-09-07 2014-11-25 Intel Corporation Integrated circuits with selective gate electrode recess
US9070381B1 (en) 2013-04-12 2015-06-30 Western Digital (Fremont), Llc Magnetic recording read transducer having a laminated free layer
US9165944B2 (en) 2013-10-07 2015-10-20 Globalfoundries Inc. Semiconductor device including SOI butted junction to reduce short-channel penalty

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61276265A (ja) * 1985-05-30 1986-12-06 Nec Corp 絶縁ゲ−ト型電界効果トランジスタ
JPS6313378A (ja) * 1986-07-04 1988-01-20 Nippon Telegr & Teleph Corp <Ntt> 半導体装置およびその製造方法
JPH04313242A (ja) * 1991-04-10 1992-11-05 Sony Corp 薄膜半導体装置の製造方法
JPH0521762A (ja) * 1991-07-10 1993-01-29 Mitsubishi Electric Corp 電界効果型トランジスタを備えた半導体装置およびその製造方法
JPH05251691A (ja) * 1992-03-04 1993-09-28 Nec Corp ゲルマニウムを用いたヘテロ構造電界効果トランジスタ
ATE249099T1 (de) * 1995-06-16 2003-09-15 Imec Inter Uni Micro Electr Vertikale misfet-bauelemente, cmos- prozessintegration, ram-anwendungen
JP3327135B2 (ja) * 1996-09-09 2002-09-24 日産自動車株式会社 電界効果トランジスタ
JPH11163329A (ja) * 1997-11-27 1999-06-18 Mitsubishi Electric Corp 半導体装置およびその製造方法
US6384457B2 (en) 1999-05-03 2002-05-07 Intel Corporation Asymmetric MOSFET devices
US6445016B1 (en) 2001-02-28 2002-09-03 Advanced Micro Devices, Inc. Silicon-on-insulator (SOI) transistor having partial hetero source/drain junctions fabricated with high energy germanium implantation
US6708960B2 (en) * 2001-07-10 2004-03-23 Integrid Inc. Cooling tower support grid
US6818493B2 (en) 2001-07-26 2004-11-16 Motorola, Inc. Selective metal oxide removal performed in a reaction chamber in the absence of RF activation
JP4034627B2 (ja) * 2001-09-28 2008-01-16 テキサス インスツルメンツ インコーポレイテツド 集積回路及びその製造方法
US6744083B2 (en) * 2001-12-20 2004-06-01 The Board Of Regents, The University Of Texas System Submicron MOSFET having asymmetric channel profile
US6596594B1 (en) 2002-02-22 2003-07-22 Taiwan Semiconductor Manufacturing Co., Ltd Method for fabricating field effect transistor (FET) device with asymmetric channel region and asymmetric source and drain regions
DE10229003B4 (de) * 2002-06-28 2014-02-13 Advanced Micro Devices, Inc. Ein Verfahren zur Herstellung eines SOI-Feldeffekttransistorelements mit einem Rekombinationsgebiet
US6657223B1 (en) * 2002-10-29 2003-12-02 Advanced Micro Devices, Inc. Strained silicon MOSFET having silicon source/drain regions and method for its fabrication
US6825506B2 (en) * 2002-11-27 2004-11-30 Intel Corporation Field effect transistor and method of fabrication
US6949482B2 (en) * 2003-12-08 2005-09-27 Intel Corporation Method for improving transistor performance through reducing the salicide interface resistance
FR2868207B1 (fr) * 2004-03-25 2006-09-08 Commissariat Energie Atomique Transistor a effet de champ a materiaux de source, de drain et de canal adaptes et circuit integre comportant un tel transistor

Also Published As

Publication number Publication date
US7230264B2 (en) 2007-06-12
JP2008511171A (ja) 2008-04-10
US6979622B1 (en) 2005-12-27
US20060076579A1 (en) 2006-04-13
KR20070041757A (ko) 2007-04-19
TW200620483A (en) 2006-06-16
WO2006023197A2 (en) 2006-03-02
JP4777987B2 (ja) 2011-09-21
WO2006023197A3 (en) 2006-04-27
CN1993815A (zh) 2007-07-04
EP1784859A2 (en) 2007-05-16
EP1784859A4 (en) 2007-10-03

Similar Documents

Publication Publication Date Title
TWI359464B (en) Semiconductor transistor having structural element
TWI272699B (en) MOS transistor with elevated source and drain structures and method of fabrication thereof
US6800910B2 (en) FinFET device incorporating strained silicon in the channel region
TWI251304B (en) Method for selectively stressing MOSFETs to improve charge carrier mobility
TWI333260B (en) An enhancement mode metal-oxide-semiconductor field effect transistor and method for forming the same
TWI420602B (zh) 用於形成nmos與pmos電晶體中之凹陷之受應變之汲極/源極區之技術
JP5583448B2 (ja) 半導体デバイス及びこれの形成方法
TWI247386B (en) Slim spacer device and manufacturing method
TWI247425B (en) Advanced strained-channel technique toe mprove cmos performance
TWI588902B (zh) 形成包含矽化及非矽化電路元件之半導體結構的方法
US7812397B2 (en) Ultra thin channel (UTC) MOSFET structure formed on BOX regions having different depths and different thicknesses beneath the UTC and source/drain regions and method of manufacture thereof
TW200842988A (en) Semiconductor device and method for manufacturing semiconductor device
TW200805573A (en) Optimized deep source/drain junctions with thin poly gate in a field effect transistor
JP2006512766A (ja) 厚い歪みシリコン層を形成する方法、および厚い歪みシリコン層を組み込んだ半導体構造
TW201209932A (en) A transistor with embedded strain inducing material formed in diamond-shaped cavities based on a preamorphization
TW201214709A (en) Polysilicon resistors formed in a semiconductor device comprising high-k metal gate electrode structures
US20090068824A1 (en) Fabricating method of semiconductor device
US8790972B2 (en) Methods of forming CMOS transistors using tensile stress layers and hydrogen plasma treatment
US7700438B2 (en) MOS device with nano-crystal gate structure
TW200416898A (en) Semiconductor component and method of manufacture
CN105097511B (zh) 鳍式场效应晶体管及其形成方法
TW434903B (en) Lateral diffused metal oxide semiconductor transistor
JP2008503098A (ja) セミコンダクタ・オン・インシュレータ半導体装置及び製造方法
US8580646B2 (en) Method of fabricating field effect transistors with low k sidewall spacers
US7790545B2 (en) Semiconductor device having a polysilicon electrode including amorphizing, recrystallising, and removing part of the polysilicon electrode

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees