TWI321335B - Method for manufacturing simox wafer and simox wafer - Google Patents
Method for manufacturing simox wafer and simox wafer Download PDFInfo
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- TWI321335B TWI321335B TW095120710A TW95120710A TWI321335B TW I321335 B TWI321335 B TW I321335B TW 095120710 A TW095120710 A TW 095120710A TW 95120710 A TW95120710 A TW 95120710A TW I321335 B TWI321335 B TW I321335B
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- layer
- oxygen
- heat treatment
- wafer
- temperature
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- 238000000034 method Methods 0.000 title claims description 25
- 238000004519 manufacturing process Methods 0.000 title claims description 12
- 239000001301 oxygen Substances 0.000 claims description 57
- 229910052760 oxygen Inorganic materials 0.000 claims description 57
- 238000010438 heat treatment Methods 0.000 claims description 50
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 40
- 235000012431 wafers Nutrition 0.000 claims description 38
- -1 oxygen ions Chemical class 0.000 claims description 17
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 11
- 239000007789 gas Substances 0.000 claims description 9
- 230000015572 biosynthetic process Effects 0.000 claims description 7
- 239000012298 atmosphere Substances 0.000 claims description 4
- 238000002844 melting Methods 0.000 claims description 2
- 230000008018 melting Effects 0.000 claims description 2
- 229910001925 ruthenium oxide Inorganic materials 0.000 claims 1
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 claims 1
- 238000005468 ion implantation Methods 0.000 description 11
- 238000009413 insulation Methods 0.000 description 8
- 230000003647 oxidation Effects 0.000 description 6
- 238000007254 oxidation reaction Methods 0.000 description 6
- 239000000758 substrate Substances 0.000 description 6
- 125000004429 atom Chemical group 0.000 description 5
- 239000013078 crystal Substances 0.000 description 5
- 229910052715 tantalum Inorganic materials 0.000 description 5
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 5
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 4
- 230000007547 defect Effects 0.000 description 4
- 239000002245 particle Substances 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000002513 implantation Methods 0.000 description 3
- 238000002347 injection Methods 0.000 description 3
- 239000007924 injection Substances 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 229910052786 argon Inorganic materials 0.000 description 2
- 239000012300 argon atmosphere Substances 0.000 description 2
- 229910000420 cerium oxide Inorganic materials 0.000 description 2
- 239000011261 inert gas Substances 0.000 description 2
- 238000007689 inspection Methods 0.000 description 2
- BMMGVYCKOGBVEV-UHFFFAOYSA-N oxo(oxoceriooxy)cerium Chemical compound [Ce]=O.O=[Ce]=O BMMGVYCKOGBVEV-UHFFFAOYSA-N 0.000 description 2
- 230000000630 rising effect Effects 0.000 description 2
- 230000001133 acceleration Effects 0.000 description 1
- 239000012491 analyte Substances 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 125000004430 oxygen atom Chemical group O* 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
- H01L21/26533—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically inactive species in silicon to make buried insulating layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
- H01L21/42—Bombardment with radiation
- H01L21/423—Bombardment with radiation with high-energy radiation
- H01L21/425—Bombardment with radiation with high-energy radiation producing ion implantation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76243—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using silicon implanted buried insulating layers, e.g. oxide layers, i.e. SIMOX techniques
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- High Energy & Nuclear Physics (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Element Separation (AREA)
- Formation Of Insulating Films (AREA)
Description
1321335 (1) 九、發明說明 【發明所屬之技術領域】 本發明,係有關於 SIMOX ( Separation by Implanted Oxygen)晶圓之製造方法及SIMOX晶圓,特別是有關於 對應於MLD ( Modified Low Dose )法之SIMOX晶圓之製 造方法。 本申請,係對在2005年6月13日所申請之日本專利 申請第2005-172715號主張優先權,並於此援用其內容。 【先前技術】 作爲SOI晶圓之製造方法,係被習知有SIMOX法。 若藉由此方法,則藉由例如注入能量約爲200keV,將劑 量約2xl018at〇mS/Cm2之氧原子做離子注入,並以高溫作 熱處理,則可形成塡埋氧化膜(以下,稱爲BOX(Buried Oxide)層)。此SIMOX法,由於可以用高精度控制劑量 和注入能量,因此能將BOX層之厚度或SOI層之膜厚以 特定之厚度來均勻形成。 舉例而言,劑量在l〇18atoms/cm2以上之基板,係被 稱爲高劑量SIMOX晶圓,4xl017atmos/cm2以下之基板, 則被稱爲低劑量SIMOX晶圓。後者。由於和前者相比其 貫穿差排(threading dislocation)較少發生,能縮短氧離 子之注入時間,故能製造高品質且低成本之SOI基板。然 而,舉例而言,若降低劑量,則會有BOX層之厚度變薄 ,BOX層之信賴度降低之虞。 (2) (2)1321335 於此,作爲已開發之技術,周知有所謂ITOX ( Internal thermal oxidation)的技術。(例如,參考專利文 件1,非專利文件1 )。若藉由此ITOX技術,則將能成爲 藉由氧離子之劑量所計算出的理論膜厚之熱處理,在含有 濃度不滿1%之氧氣的氬氣體環境中進行後,藉由在含有 1%濃度以上之氧氣的氬氣體環境中施加熱處理,可將 BOX層形成厚膜。 藉由導入此ITOX技術,能夠將BOX層厚膜化,減少 BOX層之針孔,並能降低SOI層(基板表面之單結晶矽層 )表面、以及SOI層和BOX層間之界面的凹凸,亦即是 降低粗度,而大幅提高低劑量SIMOX晶圓之品質。然而 ,就算是在導入此技術之低劑量SIMOX法中,亦由於氧 離子之劑量大,使每一批(batch )之離子注入時間需耗費 數小時。更進而,由於需要ITOX處理,亦即是需要特定 之熱工程處理,故會有生產性降低而增加製造成本之問題 〇 另一方面,於SIMOX晶圓之製造方法中,亦習知有 將氧離子分爲兩次來注入之方法(參考專利文件2)。此 2階段之氧離子注入,係先在將矽晶圓加熱後之狀態進行 高濃度之氧離子注入,接下來,將矽晶圓冷卻至室溫後進 行氧離子之注入。亦即是,第1回之氧離子注入,係藉由 加熱矽晶圓,將矽晶圓之表面維持爲矽之單結晶,第2回 之氧離子注入,係藉由將矽晶圓維持在低溫,形成非結晶 層。而後,此矽晶圓,係藉由在例如1 3 5 0 °C以固定時間作 (3) (3)1321335 氧化處理,形成SOI構造。 若藉由此方法,則經由離子注入後之熱處理,能由非 結晶層形成由多結晶、雙晶、層積缺陷所成之高密度缺陷 層。由於此形成有缺陷層之區域容易解析出氧,故能將 BOX層之厚度,形成爲由氧離子之劑量所推測出之理論厚 度的兩倍左右之厚度。更加上,由於能較ITOX技術更爲 減少氧離子之劑量,故能提高生產性,並減低製造成本。 以此方法所製造之SIMOX晶圓,被稱爲MLD-SIMOX。 然而,並不限定爲上述方法,SOI晶圓,會在經過一 連串之製造工程的過程中,在矽基板之表面產生缺陷,或 在表面附著有粒子(塵埃等)。若在殘留有此些之缺陷的 狀態下繼續進行工程,則會有做爲裝置之生產率降低之虞 。故而,SOI晶圓,係在將基板表面洗淨並乾燥之後,進 行有例如在晶圓表面照射光,並藉由表面檢查裝置等檢測 出粒子的檢查。 然而,上述之MLD — SIMOX中,當形成有BOX層後 ,會產生在SOI層之表面、以及在SOI層和BOX層間之 界面的粗度變大的現象。因此,在粒子檢查中,會有無法 辨別出到底是晶圓表面之粗度亦或是粒子之虞。 另一方面,於MLD - SIMOX中,若爲了使BOX層更 加厚膜化,而增加氧離子之劑量,則會有BOX層之絕緣 耐壓特性降低之虞。 發明所欲解決之課題 (4) (4)1321335 本發明,係以抑制伴隨MLD-SIMOX之BOX層的厚 膜化,而產生之SOI層表面、以及SOI層和BOX層間之 界面的粗度之增加及絕緣耐壓之降低爲課題。
(專利文件1)日本特開平7-263538號公報 (專利文件2)美國專利第5930643號說明書 (非專利文件1)中嶋定夫、他六名,「Thickness Increment of Buried Oxide in a SIMOX Wafer by High-temperature Oxidation 」 , Proceedings 1 994 IEEE
International SOI Conference, 1 994 年,第 71— 72 頁 用以解決課題之手段 爲了解決上述之課題,本發明者們,在針對氧離子注 入後之在氧化氣體環境中之熱處理條件作檢討的結果,發 現了 :當熱處理溫度越低時,BOX層將越厚膜化,另一方 面,當熱處理溫度越高時,在提高BOX層之絕緣耐壓的 同時,SOI層表面、及SOI層與BOX層間之界面的粗度 將降低。 【發明內容】 本發明之SIMOX晶圓之製造方法,係爲一種SIMOX 晶圓的製造方法,其特徵爲:一面將矽晶圓加熱至300 °C 以上,一面注入氧離子,於前述矽晶圓之內部形成氧之高 濃度層,將由前述氧之高濃度層之形成工程所得之前述矽 晶圓冷卻至3 0 0 °C以下,並注入氧離子以於前述矽晶圓形 (5) (5)1321335 成非晶質層,將由前述非晶質層之形成工程所得之前述矽 晶圓,在含有氧之混合氣體環境中作熱處理並形成塡埋氧 化膜,於前述塡埋層之形成工程中,前述熱處理之開始溫 度係爲未滿1 3 5 0 °C ’而以最高溫度在1 3 5 0。(:以上來加熱 〇 如此這般,藉由在初期之熱處理中以不滿1350 °C之較 爲低溫來作熱處理,使BOX層厚膜化。進而,藉由以 ^50 °C以上之較爲高溫來作熱處理,能使BOX層之絕緣 耐性提高,並使SOI層表面、及SOI層和BOX層間之界 面的粗度降低。 於本發明之SIMOX晶圓之製造方法,在前述塡埋層 之形成工程中,前述熱處理,係亦可具備有在不滿1 3 50 °C 之固定溫度的加熱。如此這般,藉由保持在不滿1350 t之 較爲低溫之區域,由於被注入晶圓之氧會作爲氧化物而被 析出而成長,故能使BOX層厚膜化。 於前述塡埋工程中,前述熱處理,係亦可具備有由前 述開始溫度起直線地又或是階段性地昇溫的加熱。舉例而 言,藉由對應於所設定之溫度範圍來適當變化昇溫之斜率 ,能針對BOX層之厚度或絕緣特性及界面之粗度等,進 行更爲嚴密之控制。 本發明之SIMOX晶圓,係具備有BOX層;和設置於 BOX層上之SOI層;和設置於表面之氧化膜,前述BOX 層之厚度係爲1 3 00A以上,且,前述BOX層之絕緣耐壓 係爲7MV / cm以上,前述SOI層之表面,以及,前述 (7) 1321335 5xl016atoms/cm2,較理想係爲 lxlO13 〜Ixl0】6atoms/cm2, 將注入能量(加速能量)設爲140〜22 OkeV之範圍,較理 想係爲1 80keV,來進行之。 圖1 A,係顯示注入氧離子後之晶圓剖面,箭頭係模 式顯示氧離子注入之模樣。第一回之氧離子注入,係藉由 將矽晶圓1加熱至較爲高溫,來將矽晶圓1之表面維持單 結晶的狀態以形成氧之高濃度層2,第2回之氧離子注入 g ,係藉由以較第1回之氧離子注入時爲低的溫度,形成非 晶質層3。 圖1 B,係顯示經由熱處理後所得之S IΜ Ο X晶圓的剖 面。於熱處理工程中,以使氧和不活性氣體成爲設定之比 例(例如,氧氣分壓比爲5 %以上)之混和氣體環境,施 加例如10〜20小時之熱處理,形成BOX(BuriedOxide; 塡埋氧化膜)層4。於本實施形態,首先以不滿1350 °C, 較理想係爲1280〜1320 °C之範圍內作特定時間之熱處理之 φ 後,一面昇溫至1 3 5 0°C以上,不到氧化矽之溶點的溫度, 一面進一步進行高溫熱處理。於此,表面氧化膜5之厚度 ,由於係經由混合氣體之氧氣分壓或熱處理時間來決定, 故經由調整混合氣體之氧氣分壓或是熱處理時間,便能控 制SOI層(Silicon Onlnsulator;基板表面之氧化矽單結 晶層)6之厚度。 作爲與氧混和之不活性氣體,係使用氮或是氬。 接下來,針對熱處理之條件作詳細說明。相對於先前 之被固定的熱處理溫度之設定條件,於本實施形態,首先 -11 - (8) (8)1321335 ,藉由以不滿1350 °C之較爲低溫來作熱處理,使高密度之 氧解析物形成而使BOX層4厚膜化。接下來,一面昇溫 至1350 °C以上,一面藉由以較爲高溫來作熱處理,改質 BOX層4,而能提高絕緣耐性,並使SOI層6表面、及 SOI層6和BOX層4間之界面的粗度降低。 於不滿1 3 5 0°C之溫度區域中,舉例而言,以熱處理之 固定之開始溫度作固定時間之熱處理(保持),藉由適當 調整熱處理(保持)之時間,使高密度之氧解析物成長, 而能控制Β Ο X層之厚度。於此,所謂開始溫度,係指將 含有5 %以上氧氣之混合氣體導入熱處理爐中,而開始矽 晶圓之氧化的溫度。於此不滿1350 °C之熱處理中,加熱環 境中之氧氣分壓比係爲5%以上,100%以下,熱處理時間 ,較爲理想係爲1〇〜20小時。另外,從室溫加熱至開始 溫度的昇溫工程中,加熱環境中之氧氣分壓比係不滿5% 〇 當從不滿1 3 5 0 °C之溫度區域昇溫至1 3 5 0°C以上之溫 度區域時,可使其直線地,或是階段性地昇溫。舉例而言 ,藉由對應於所設定之溫度範圍來適當變化昇溫之斜率, 能針對BOX層之厚度或絕緣特性及界面之粗度等,進行 更爲嚴密之控制。於此昇溫中,加熱環境中之氧氣分壓比 係爲5%以上,100%以下,昇溫速度,較爲理想係爲 0.05 〜0.5 〇C /min 〇 於1350 °C以上之溫度區域,做特定時間之熱處理(保 持)亦可。藉由此,能控制表面氧化膜5及SOI層6之厚 -12- (9) 1321335 度,進而,改質BOX層4,而能提高絕緣耐性,並使SOI 層6之表面、及SOI層6和BOX層4間之界面的粗度降 低。此時,混合氣體中之氧氣分壓’舉例而言,係以不滿 5 %爲理想》 1 3 5 0 °C以上之熱處理時間,較理想係爲5〜1 5小時。 如上述一般,在本實施形態中,於注入氧離子後之熱 處理中,由於係以氧氣濃度在5%以上之環境,將熱處理 之開始溫度設爲不滿1 3 5 0 °C,而後,昇溫至1 3 5 0 °C以上 之溫度而進行熱處理,故能將SIMOX晶圓之BOX層4厚 膜化,而能實現提高此BOX層4之絕緣耐性,並使SOI 層6之表面、及SOI層6和BOX層4間之界面的粗度降 低。 實施例 接下來,將本發明之實施例和比較例一起做說明。 (實施例1 ) 第1回之氧離子注入,係將晶圓在真空中加熱至400 °C ,以氧離子之劑量 2.6 X 1017atoms/cm2,注入能量 17 0keV來進行。接下來,第2回之氧離子注入,係以氧 離子之劑量6xl015atoms/cm2,注入能量160keV來進行。 將於此所得之晶圓,在含有5 0%之氧氣的氬氣環境下,施 加13 10°C ’ 5小時之氧化處理,接下來,以〇· 1〇。(:/分之 昇溫速度’ 一面由1310 °C昇溫至1350 °C,一面施加氧化 -13- (12) (12)1321335 此些實施例所限定。只要不脫離本發明之意旨的範圍內, 可做構成之附加 '省略、替換,及其他之變更。本發明係 不被前述之說明所限定,僅被附屬之申請範圍所限定。 【圖式簡單說明】 圖1六、18,係展示對應於適用本發明而成之1^11^0-SIMOX法的SIMOX晶圓之製造方法的說明圖。詳細而言 ,圖1 A係展示注入氧離子後之晶圓剖面,圖1 B係展示熱 處理後所得之SIMOX晶圓之剖面。 【主要元件符號說明】 1 :矽晶圓 2 :氧之高濃度層 3 :非晶質層 4 : BOX 層 5 :表面氧化膜 6 : SOI層 -16-
Claims (1)
1321335
十、申請專利範圍 第95 1 207 1 0號專利申請案 中文申請專利範圍修正本 民國98年8月31曰修正 1.—種SIMOX晶圓的製造方法,其特徵爲: ' —面將矽晶圓加熱至300 °C以上,一面注入氧離子, φ 於前述矽晶圓之內部形成氧之高濃度層, 將由前述氧之高濃度層之形成工程所得之前述矽晶圓 冷卻至未滿3 0 0 °C,並注入氧離子以於前述矽晶圓形成非 晶質層, 將由前述非晶質層之形成工程所得之前述矽晶圓,在 含有氧之混合氣體環境中作熱處理並形成塡埋氧化膜, 於前述塡埋氧化膜之形成工程中,前述熱處理,係爲 在氧分壓比爲5%〜100%之之氛圍中的10〜20小時之熱 φ 處理,並具備有:將開始溫度設爲未滿1 3 5 0°C之一定溫度 下的熱處理、和其後之從前述一定溫度起直到1350 °C以上 而未滿矽融點之溫度爲止而直線性地或是階段性地以升溫 速度0.005〜0.5°C/min來作升溫之熱處理。 2·—種SIMOX晶圓,係以申請專利範圍第1項所記 載之SIMOX晶圓之製造方法所製造出之SIMOX晶圓,其 特徵爲,具備有: BOX層;和設置於前述BOX層上之SOI層, 前述BOX層之厚度係爲1 300人以上,且,前述BOX 1321335 層之絕緣耐壓係爲7MV/cm以上,前述SOI層之表面, 以及,前述SOI層和前述BOX層間之交界之ΙΟμιη平方的 粗糙度,係爲4Arms以下。
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US5930643A (en) * | 1997-12-22 | 1999-07-27 | International Business Machines Corporation | Defect induced buried oxide (DIBOX) for throughput SOI |
JP3911901B2 (ja) * | 1999-04-09 | 2007-05-09 | 信越半導体株式会社 | Soiウエーハおよびsoiウエーハの製造方法 |
US6417078B1 (en) * | 2000-05-03 | 2002-07-09 | Ibis Technology Corporation | Implantation process using sub-stoichiometric, oxygen doses at different energies |
JP2002231651A (ja) * | 2001-02-02 | 2002-08-16 | Nippon Steel Corp | Simox基板およびその製造方法 |
WO2002097892A1 (fr) * | 2001-05-29 | 2002-12-05 | Nippon Steel Corporation | Substrat silicium sur isolant |
US6784072B2 (en) | 2002-07-22 | 2004-08-31 | International Business Machines Corporation | Control of buried oxide in SIMOX |
JP4228676B2 (ja) * | 2002-12-06 | 2009-02-25 | 株式会社Sumco | Simoxウェーハの製造方法 |
US20050170570A1 (en) * | 2004-01-30 | 2005-08-04 | International Business Machines Corporation | High electrical quality buried oxide in simox |
-
2005
- 2005-06-13 JP JP2005172715A patent/JP4876442B2/ja not_active Expired - Fee Related
-
2006
- 2006-06-08 US US11/450,562 patent/US7514343B2/en not_active Expired - Fee Related
- 2006-06-09 EP EP06011986A patent/EP1734575A1/en not_active Withdrawn
- 2006-06-09 TW TW095120710A patent/TWI321335B/zh not_active IP Right Cessation
- 2006-06-09 KR KR1020060052116A patent/KR100775799B1/ko not_active IP Right Cessation
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2009
- 2009-02-19 US US12/389,299 patent/US20090152671A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
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US20060281233A1 (en) | 2006-12-14 |
US20090152671A1 (en) | 2009-06-18 |
US7514343B2 (en) | 2009-04-07 |
TW200705555A (en) | 2007-02-01 |
JP4876442B2 (ja) | 2012-02-15 |
EP1734575A1 (en) | 2006-12-20 |
KR100775799B1 (ko) | 2007-11-12 |
JP2006351632A (ja) | 2006-12-28 |
KR20060129957A (ko) | 2006-12-18 |
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