TWI287850B - A method of depositing dielectric - Google Patents

A method of depositing dielectric Download PDF

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TWI287850B
TWI287850B TW090108642A TW90108642A TWI287850B TW I287850 B TWI287850 B TW I287850B TW 090108642 A TW090108642 A TW 090108642A TW 90108642 A TW90108642 A TW 90108642A TW I287850 B TWI287850 B TW I287850B
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deposited
dielectric
electrode
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metal oxide
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Claire Louise Wiggins
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Trikon Holdings Ltd
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    • H01L21/203—
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/0021—Reactive sputtering or evaporation
    • C23C14/0036—Reactive sputtering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02266—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/08—Oxides
    • C23C14/083—Oxides of refractory metals or yttrium
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/58—After-treatment
    • C23C14/5826—Treatment with charged particles
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/58—After-treatment
    • C23C14/5846—Reactive treatment
    • C23C14/5853—Oxidation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/018—Dielectrics
    • H01G4/06—Solid dielectrics
    • H01G4/08—Inorganic dielectrics
    • H01G4/12—Ceramic dielectrics
    • H01G4/1209—Ceramic dielectrics characterised by the ceramic dielectric material
    • H01G4/1254—Ceramic dielectrics characterised by the ceramic dielectric material based on niobium or tungsteen, tantalum oxides or niobates, tantalates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02183—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing tantalum, e.g. Ta2O5
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02321—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer
    • H01L21/02323—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of oxygen
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
    • H01L21/0234—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31604—Deposition from a gas or vapour

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
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  • Ceramic Engineering (AREA)
  • Optics & Photonics (AREA)
  • Inorganic Chemistry (AREA)
  • Plasma & Fusion (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Physical Vapour Deposition (AREA)
  • Formation Of Insulating Films (AREA)

Description

1287850 A7 五、發明説明（ ） ~~一 ' ---- 2 賤鑛至屬氧化物層至基板上，其特徵在於支持體被施加偏 介電質形成時誘生跨越已沉積的介電質之直流電 壓。 誘生的電壓係於200至300伏之範圍，為達此項目的， 支持體可利用射頻或脈衝直流電源供應器施加偏壓。標乾 也可藉RF或脈衝直流電源供應器施加偏壓，以脈衝供應為 較佳。 該方法進一纟包括沉積H冗積期間《沉積氧化物 之電漿氧化步驟。 介電質層可被沉積於第一電極上，且分立的第二電極 可/儿積於上表面上而界定出多個電容器。各個第二電極面 積係小於0.01平方厘米，且電容器被形成有第二電極，其 面積為0.008平方厘米。 較佳具體實施例令，金屬氧化物為五氧化二鈕，但若 任何金屬氧化物係由躲反應性雜則該方法被相信將更 為改良。 軸已經於前文定義本發明，但須瞭解其包括前文陳 述或後文說明之本發明結構特色之任一種組合。 圖式簡單說明/圖式簡介 本發明可以多種方式施行，現在參照第一圖說明其特 定具體實施例，第-圖為通過根據本發明之電容器陣列之 示意剖面圖。 實施方式/較佳實施例之詳細描述 反應性濺鍍方法為眾所周知，例如述於「薄膜方法 ------------— (ΓΝ::；) A,!：i 5 A7 1287850 B7 五、發明説明（ ） 3
John L. Vossen及Werner Kern編輯，1978年學術出版社出版 ，第48至53頁、第107至109頁。如前文已述，美國專利 5872696特別描述五氧化二鈕的反應性濺鍍。 從第一圖可看出，申請人沉積第一電極1〇(典型為氮化 鈦製成）至基板11表面上且於電極1〇上反應性濺鍍五氧化 二钽12而形成介電質層。然後藉孔隙罩沉積氮化鈦之點13 而形成第二電極。然後由各點界定一單獨電容器，該電容 器由個別的點13、第一電極10下方區域以及介電質12中間 部分形成。 申請人所建立的反應性沉積標乾電極係由脈衝直流 供電。 然後對相同（「同一批」）晶圓使用下列條件進行兩次 實驗，但於實驗之一部分基板所在的支持體未被施加偏壓 ，而於第二實驗則如所示施加偏壓： 試驗結構·
下電極 TiN 介電質 Ta205通常厚100埃至1〇〇〇埃，典型為500 埃，不同用途可能需要1微米厚度，以下報告結果係100埃 所得結果。通常以較薄層為較佳。 上電極 為了試驗介電質，TiN層係經由孔隙罩 沉積，以界定出面積〇·〇〇8平方厘米的電容點。 實驗過程： 反應性沉積6 00埃五氧化二钽 目標功率2千瓦直流，施加1000千赫脈衝，脈衝寬度 請 先 Μ 讀 背 之 注 意 項 再 場 % 本 身
1287850 hi B7' 五、發明説明（ ） 4 4000毫微米 氣流 50sccm (請先閲讀背面之注意事項再填窝本黃) 氧流 40sccm
平台溫度 300°C 平台偏壓功率600瓦13.65百萬赫射頻誘生270伏直流偏壓 處理時間150秒 •晶圓大小：150毫米矽 電漿氧化如上沉積之五氧化二鈕： 氧流 200sccm 感應線圈功率 500瓦，於400瓦「軟性開始」然後逐漸提 高，處理1分鐘 功率密度為主要特性，且用於不同大小的晶圓及腔室 時，其它功率位準可為適當者且可藉實驗測定。 電容點13於施加5伏下探測以及測量漏電流。該批電 容器之中未施加偏壓於支持體而被形成者具有漏電流大於 Γ6安培，而於偏壓條件下被形成者則具有漏電流小於1_8 安培。各例中五氧化二钽厚度為100埃。 須注意於美國專利5872696各例之陽極化步驟已被實 行，但於偏壓條件下漏電流相當可觀地被改良。如此強力 提示，於申請人之發明存在相當不同的處理，相信可導致 沉積層密度改良。須瞭解，漏電流改良的幅度表示申請人 發現一種有效改善此類型電容器效能之方式。 圖式簡單說明 第一圖為通過根據本發明之電容器陣列之示意剖面圖。

Claims (1)

1287850 申請專利範圍 ^年^月^日修正續 第090108642號專利申請案申請專利範圍修正本 修正曰期：96年5月 1· 一種沉積介電質於支持體上之半導體基板上而形成電 容器部分之方法，包括由金屬標靶反應性濺鍍金屬氧 化物層至基板上，該方法特徵在於：該支持體被施加 偏壓致使介電質形成時誘生一跨越所沉積的介電質之 直机電壓，且其中該被誘生的電壓係於2〇〇至3〇〇伏之 範圍。 2·如申請專利範圍第旧之方法，其中該支持體係利用射 頻或脈衝直流電源供應器施加偏壓。 3.如中請專利範圍第㈣之方法，其中該標㈣藉射頻或 脈衝直流電源供應器施加偏壓。 4·如前述申請專利範圍第1項 y 貝之方法，進一步包括於沉積 後或沉積期間氧化物之電漿氧化。 5.如前述申請專利範圍第1項 _ 貝之方法，其中該介電質係被 儿積於第一電極上，且分 刀立的苐二電極係被沉積於上 表面上而界定出多個電容器。 6·如申請專利範圍第5項之方、、土廿丄 r 、之方法，其中各個各第二電極面 積係小於〇 · 〇 1平方厘米。 7. 如前述申請專利範圍第丨 為五氧化二组。 、之方法，其中該金屬氧化物 8. 如申請專利範圍第4項 五 氧化二 方法，其中該金屬氧化物為 9
TW090108642A 2000-04-14 2001-04-11 A method of depositing dielectric TWI287850B (en)

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US6936481B2 (en) 2005-08-30
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CN1326218A (zh) 2001-12-12
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