TWI266375B - Semiconductor device and manufacture method thereof - Google Patents

Semiconductor device and manufacture method thereof Download PDF

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Publication number
TWI266375B
TWI266375B TW094131647A TW94131647A TWI266375B TW I266375 B TWI266375 B TW I266375B TW 094131647 A TW094131647 A TW 094131647A TW 94131647 A TW94131647 A TW 94131647A TW I266375 B TWI266375 B TW I266375B
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Taiwan
Prior art keywords
wiring
resin film
semiconductor
semiconductor device
wiring pattern
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TW094131647A
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English (en)
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TW200625476A (en
Inventor
Masahiro Sekiguchi
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Toshiba Corp
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Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of TW200625476A publication Critical patent/TW200625476A/zh
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Publication of TWI266375B publication Critical patent/TWI266375B/zh

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    • HELECTRICITY
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    • H01L21/6836Wafer tapes, e.g. grinding or dicing support tapes
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!266375 (1) 九、發明說明 【發明所屬之技術領域】 本發明係關於一種使用被當作配線基板而使用的配線 用樹脂薄膜,而可總括加工半導體晶圓的半導體裝置及其 製造方法。 【先前技術】 # 由載置於習知之配線基板的半導體元件所成的半導體 裝置之製造方法中,一般係從經切割的矽等之半導體晶圓 ' 中按每1元件拾起(pick up )半導體元件,且載置於形成 、 有配線圖案的薄膜基板或印刷配線基板等配線基板。例 如,進行覆晶(flip chip)連接的半導體裝置(FC-BGA) 係在形成有配線圖案的基材上,將形成有柱形凸塊(stud bump )的半導體元件按每1元件進行覆晶連接。在上述習 知的半導體封裝體之製造方法中,由於係按每1元件處理 • 半導體元件,因此生產性較低,且在其處理上亦會產生問 題。 此外,習知的晶圓級(w a f e r 1 e v e 1 )的半導體封裝體 之製造方法中,雖列舉有晶圓級的CSP,但此時的封裝體 的外形尺寸係取決於半導體元件的外形尺寸,因此,在每 次因配線製程改變等而使半導體元件的外形尺寸改變時, 會有對封裝體尺寸造成影響的問題產生。 再者,載置習知之半導體元件的配線基板中已知有層 積(b u i 1 d u p )基板。層積基板係在使環氧樹脂等樹脂含 -4- (2) (2)1266375 浸在玻璃纖維不織布而成的絕緣基板的表背兩面,施加有 至少1層的層積層(build up layer)。在層積層係配設有 適當配線圖案與連接配線,且將載置於層積基板的半導體 元件與安裝於層積基板的外部連接端子作電性連接。層積 層係使用例如簡稱爲ABF的配線用樹脂薄膜。當將該習 知的配線基板用在半導體裝置時,對於半導體裝置變厚而 有必要追求薄型化的半導體裝置而言,係爲具有應解決之 問題的構造。 在專利文獻1中,係將支持構件黏接在形成有元件的 基板背面,在拉伸按每一元件將基板切斷後的支持基板, 且在元件間設置間隙的狀態下,總括進行樹脂封裝。沿著 前述切斷痕跡,再次進行切斷,而按每一元件分離。 〔專利文獻1〕日本專利特開2000-2 1 906號公報 【發明內容】 (發明所欲解決之課題) 本發明係鑑於上述情形而硏創者,係提供一種可總括 加工矽等之半導體晶圓,此外,可以配線用樹脂薄膜夾持 •φ導體晶Η ’藉此作爲基材加以處理’因此’可提升生產 性的半導體裝置及其製造方法。 (用以解決課題之手段) 本發明之半導體裝置之一態樣的特徵係具備:半導體 元件;第1及第2配線用樹脂薄膜,夾持前述半導體元 -5- (3) (3)1266375 件;配線圖案,分別形成於夾持前述半導體元件之第1及 第2配線用樹脂薄膜所露出的表面;以及外部連接端子, 形成於前述第2配線用樹脂薄膜的配線圖案所露出的表 面,形成於前述第1配線用樹脂薄膜的配線圖案係與前述 半導體元件作電性連接,形成於前述第2配線用樹脂薄膜 的配線圖案係與形成於前述第1配線用樹脂薄膜的配線圖 案作電性連接。 本發明之半導體裝置之製造方法之一態樣的特徵係具 備:將經切割分離成複數個半導體元件的半導體晶圓以垂 直於切割方向的方向載置於可伸縮的黏接片上的製程;對 前述黏接片施加張力而在前述半導體元件間形成間隙的製 程;由上面將第1配線用樹脂薄膜貼在前述黏接片上的半 導體晶圓,且使其硬化的製程;將前述黏接片從前述半導 體晶圓予以去除,在已去除該黏接片的面貼上第2配線用 樹脂薄膜,使其硬化的製程;在前述第1及第2配線用樹 脂薄膜所露出的表面貼上導電箔,將其進行鈾刻處理,在 各別的表面形成配線圖案的製程;藉由嵌入形成於前述第 1配線用樹脂薄膜之貫通孔內的連接配線,將形成在前述 第1配線用樹脂薄膜表面的配線圖案與前述半導體元件作 電性連接的製程;藉由嵌入形成於前述第1及第2配線用 樹脂薄膜之貫通孔內的連接配線,將形成於前述第2配線 用樹脂薄膜表面的配線圖案與形成於前述第1配線用樹脂 薄膜表面的配線圖案作電性連接之製程;以及將外部連接 端子連接於前述第2配線用樹脂薄膜之配線圖案表面的製 -6- (4) 1266375 程。 (發明之效果) 本發明係以配線用樹脂薄膜夾持半導體元件,藉此獲 得新構造的封裝體,且可達成半導體裝置的薄型化。此 外’可總括加工半導體晶圓,此外,可以配線用樹脂薄膜 夾持,藉此作爲基材加以處理,其結果可使生產性提升。 再者,當以配線用樹脂薄膜夾持半導體晶圓時,可在元件 間設置間隙(clearance ),其結果使得封裝體的外形形狀 並不取決於半導體元件的外形。 【實施方式】 本發明係於半導體封裝體的製造方法中,以總括加工 矽晶圓爲特徵,且特徵爲:由上下以配線用樹脂薄膜夾持 矽晶圓,藉此形成半導體元件嵌入基材。此外,本發明的 特徵爲:以配線用樹脂薄膜夾持半導體晶圓時,對載置半 導體晶圓的黏接片施加張力,藉此在元件間設置間隙,以 確保形成用以獲得導通之貫通孔等的區域。以配線用樹脂 薄膜夾持矽等之半導體晶圓,藉此可在與一般的薄膜基材 相同的狀態下進行處理,此外,由於形成相對於矽等爲上 下對稱構造,因此,由熱膨脹等的觀點來看,形成有利的 構造。再者,由於總括處理半導體晶圓,因此,可提升生 產性。 以下參照實施例,說明發明之實施形態。 -7 - (5) (5)1266375 第1實施例 首先,參照第1圖至第5圖,說明第1實施例。 第1圖係載置經切割之半導體晶圓的黏接片的斜視圖 及延伸該黏接片之狀態的斜視圖,第2圖至第4圖係製造 該實施例之半導體裝置的製程剖視圖,第5圖係藉由該製 程形成的半導體裝置的剖視圖。如第5圖所示,例如,由 石夕半導體而成且厚度例如爲60// m左右的晶片狀半導體元 件1係被第1及第2配線用樹脂薄膜3、3 a所夾持且包 覆。配線用樹脂薄膜係爲用在層積層的材料,該層積層係 形成有設在層積配線基板之核心基板表面之配線圖案,環 氧系熱硬化性樹脂薄膜爲其一例。在第1及第2配線用樹 脂薄膜表面設有分別包含陸地(land )等的配線圖案4、 4 a 〇 設在第1配線用樹脂薄膜 3表面的配線圖案4係形 成於半導體元件1表面,係和與半導體元件1之內部電路 (未圖示)電性連接的連接電極(未圖示),藉由由嵌入 形成於第1配線用樹脂薄膜之貫通孔的鍍膜層等而成的連 接配線6而電性連接。設在第1及第2配線用樹脂薄膜 3、3 a的配線圖案4、4a係經由由嵌入透過該等配線用樹 脂薄膜而形成之貫通孔的鍍膜層等而成的連接配線6而作 電性連接。在第2配線用樹脂薄膜3 a之配線圖案4a的連 接電極部分,係形成有銲錫球等外部連接端子8。外部連 接端子8係透過配線圖案4、4a而電性連接於半導體元件 -8- (6) 1266375 1的內部電路。除了外部連接端子8之外,以覆蓋配線圖 案4、4 a的方式,在第1及第2配線用樹脂薄膜 3、3 a 表面形成有阻劑等絕緣膜7、7a。 該實施例的半導體裝置,如上所述,係以配線用樹脂 薄膜夾持半導體元件,藉此獲得新構造的封裝體,而可達 成半導體裝置更進一步的薄型化。 接著說明本實施例之製程。 φ 第1圖(a)係將已完成元件形成製程的例如直徑爲6至 8英寸左右的矽晶圓(半導體晶圓)黏在合成樹脂等黏接 ' 片1上,沿著切割線進行切割,而形成分割成個個半導體 - 元件(晶片)的狀態。黏接片1係使半導體晶圓可朝垂直 於半導體元件之切割方向的方向伸縮。接著,如第1圖(b) 所示,對黏接片1以箭頭方向二次元施加張力,而在半導 體元件間形成間隙。此時的間隙係以確保當藉由配線用樹 脂薄膜夾持半導體晶圓時,使上下面藉由貫通孔取得導通 • 程度的空間(space )的方式設置。此外,可藉由適當控 制張力,來調整間隙寬度。 接著,參照第2圖,說明將配線用樹脂薄膜黏在施加 張力的黏接片上的製程。第2圖係沿著第1圖(㈧的A_A’ 線的部分的剖視圖,在半導體元件間設有間隙(第2圖 (a))。將20至30 // m厚左右的第1配線用樹脂薄膜3 貼在黏接片2之貼有半導體元件1的面。在該狀態下,半 導體元件1表面係由第1配線用樹脂薄膜3所覆蓋。此 外,配線用樹脂薄膜係經加熱而硬化(第2圖(b))。因 -9- (7) (7)^266375 此’半導體元件1係支撐於第1配線用樹脂薄膜3。在 該狀態下,將黏接片2從半導體晶圓剝離(第2圖(c))。 之後,將第2配線用樹脂薄膜3 a貼在剝離黏接片2而露 出半導體元件1的第1配線用樹脂薄膜3,之後,加熱而 使第2配線用樹脂薄膜3 a硬化(第2圖(d))。第2配線 用樹脂薄膜3 a既可爲與第1配線用樹脂薄膜3相同材質 的材料,亦可爲不同材質的材料。 接著,參照第3圖及第4圖,說明電路形成在配線用 樹脂薄膜的製程。第3圖及第4圖係說明進行電路形成, 到安裝外部連接端子爲止之製程的剖視圖。首先,以導電 箱而言,例如將銅箔貼在第1及第2配線用樹脂薄膜露出 的表面,藉由將其進行蝕刻等而圖案化,且在第1配線用 樹脂薄膜3的表面上形成配線圖案4,在第2配線用樹脂 薄膜3 a的表面上形成配線圖案4 a (第3圖(a))。之後, 藉由雷射將形成在配線圖案4、第1配線用樹脂薄膜3及 半導體元件1的表面且與半導體元件的內部電路電性連接 的由銘等構成的連接電極(銲墊(pad ))(未圖示)形 成開口,且在第1配線用樹脂薄膜3形成貫通孔而使銲墊 露出。接著,在該貫通孔內施加鍍膜處理,而形成將配線 圖案4與半導體元件的銲墊作電性連接的連接配線5 (第 3圖(b))。接著,爲了使配線圖案4、4a導通,藉由例如 鑽孔(drill )等,貫穿第1及第2配線用樹脂薄膜3、 3 a,而形成貫通孔。之後,在該貫通孔內施加鍍膜處理, 而形成將配線圖案4、4a作電氣連接的連接配線6 (第3 -10- 1266375 (8) 圖(c))。 接著’除了外部連接端子形成區域之外,以覆蓋配線 圖案4、4a的方式在第1及第配線用樹脂薄膜3、3 a表面 形成阻劑等絕緣膜7、7 a (第3圖(d))。接著,將銲錫球 等外部連接端子8連接在設在第2配線用樹脂薄膜3 a上 的配線圖案4 a的外部連接端子形成區域。藉此方式,形 成晶圓形狀的封裝體(第4圖)。於第4圖中,已完成的 1個半導體裝置係顯示於由虛線包圍之區域的部分。將該 晶圓形狀的封裝體按每一半導體元件進行封裝體切割,而 分割成複數個半導體裝置。第5圖係顯示分割後之半導體 裝置的剖視圖。 以上根據該實施例之方法,可總括加工矽等之半導體 晶圓’此外,可以配線用樹脂薄膜夾持半導體晶圓,藉此 作爲基材加以處理,而有助於提升生產性。此外,當以配 線用樹脂薄膜夾持半導體晶圓時,藉由在元件間設置間 隙’使得封裝體的外形形狀並不取決於半導體元件的外 形。 第2實施例 接著,參照第6圖,說明第2實施例。 在本實施例之半導體裝置中,在將複數個收納半導體 元件的封裝體進行層積的構造上具有特徵。第6圖係在本 實施例中進行說明之半導體裝置的剖視圖。在本實施例 中’雖就安裝有2個半導體元件之封裝體進行層積後的半 -11 - (9) (9)1266375 導體裝置進行說明’惟封裝體的層積數亦可爲3層以上。 在本實施例中,在封裝體A之上層積有封裝體B。 如第6圖所示,封裝體A係具有例如由矽半導體而成 且厚度例如爲6 0 // m左右之晶片狀半導體元件1,該半導 體元件1係被第1及第2配線用樹脂薄膜3、3 a所夾持且 包覆。配線用樹脂薄膜係爲用在層積層的材料,該層積層 係形成有設在層積配線基板之核心基板表面之配線圖案, 環氧系熱硬化性樹脂薄膜爲其一例。在第1及第2配線用 樹脂薄膜表面設有分別包含陸地(land )等的配線圖案 4、4 a 〇 設在第1配線用樹脂薄膜3表面的配線圖案4係形成 於半導體元件1表面,係和與半導體元件1之內部電路 (未圖示)電性連接的連接電極(未圖示),藉由由嵌入 形成於第1配線用樹脂薄膜之貫通孔的鍍膜層等而成的連 接配線6而電性連接。設在第1及第2配線用樹脂薄膜 3、3 a的配線圖案4、4a係經由由嵌入透過該等配線用樹 脂薄膜而形成之貫通孔的鍍膜層等而成的連接配線6而作 電性連接。在第2配線用樹脂薄膜3 a之配線圖案4a的連 接電極部分,係形成有銲錫球等外部連接端子8。外部連 接端子8係透過配線圖案4、4a而電性連接於半導體元件 1的內部電路。除了外部連接端子8之外,以覆蓋配線圖 案4、4 a的方式,在第1及第2配線用樹脂薄膜 3、3 a 表面形成有阻劑等絕緣膜7、7a。
此外,層積在封裝體A的封裝體B既可爲與封裝體A -12- (10) 1266375 相同的構造/材料,亦可爲不同的構造/材料。然而,由 於所用的半導體元件1,具有藉由第〗及第2配線用樹脂薄 月旲3 ’、3 ’ a夾持的構造,因此兩者爲一致。封裝體b係在 由第2配線用樹脂薄膜3,a的絕緣膜7,a覆蓋的配線圖案 4 ’ a形成有銲錫球等外部連接端子8 a,且在第1配線用樹 脂薄膜3的配線圖案4 ’形成有未被絕緣膜7,覆蓋的陸地區 域9。 # 在該實施例中,可視需要而更進一步層積。此時,第 3層的內部連接端子係連接於第2層之配線圖案4 ’的陸地 • 區域9。 * 本實施例之半導體裝置,如上所述,係以配線用樹脂 薄膜夾持半導體元件,藉此獲得新構造的封裝體,因此可 達成半導體裝置更進一步的薄型化,藉由層積爲多層,而 可達成高密度化。 Φ 第3實施例 接著,參照第7圖,說明第3實施例。 在本實施例中,係在以複數個配線用樹脂薄膜與複數 個配線用樹脂薄膜夾持半導體元件的構造上具有特徵。第 7圖係在本實施例中進行說明之半導體裝置的剖視圖。使 用該配線用樹脂薄膜的封裝體係如習知之層積配線基板般 可層積爲多層。 如第7圖所示,半導體裝置係具有例如由矽半導體而 成且厚度例如爲6 0 // m左右之晶片狀半導體元件1 ’該半 -13- (11) (11)1266375 導體元件1係被第1及第2配線用樹脂薄膜3、3a所夾持 且包覆。配線用樹脂薄膜係爲用在層積層的材料,該層積 層係形成有設在層積配線基板之核心基板表面之配線圖 案’環氧系熱硬化性樹脂薄膜爲其一例。 第1配線用樹脂薄膜3係由直接覆蓋半導體元件1的 第1層3b及覆蓋第1層3b的第2層3c所構成,第2配 線用樹脂薄膜3 a係由直接覆蓋半導體元件1的第1層3 d 及覆蓋第1層3 d的第2層3 e所構成。在該等配線用樹脂 薄膜係分別形成有配線圖案,透過該等配線圖案使半導體 元件1的內部電路與外部連接端子8作電性連接。在第1 配線用樹脂薄膜的第1層3 b及第2層3 c、第2配線用樹 脂薄膜之第1層3 d及第2層3 e係分別設有配線圖案4b、 4c、4 d、4 e 〇 藉由嵌入貫穿第1配線用樹脂薄膜及第2配線用樹脂 薄膜而形成之貫通孔的連接配線6a作電性連接。配線圖 案4c及配線圖案4b係藉由嵌入貫穿第1配線用樹脂薄膜 之第1層3b及第2配線用樹脂薄膜之第1層3d而形成之 貫通孔的連接配線5a作電性連接。配線圖案4d及配線圖 案4e係藉由形成於第2配線用樹脂薄膜之第2層3e的連 接配線5 a作電性連接。 配線圖案4b及形成於半導體元件1的連接電極1 〇係 藉由形成在第1配線用樹脂薄膜之第1層3 b的連接配線 5 c作電性連接。第1及第2配線用樹脂薄膜表面係藉由絕 緣膜7、7a而受到覆蓋保護。在第2配線用樹脂薄膜3a -14- (12) (12)1266375 的配線圖案4a的連接電極部分係形成有銲錫球等外部連 接端子8。外部連接端子8係透過配線圖案4、4a而電性 連接於半導體元件1的內部電路。除了外部連接端子8之 外,以覆蓋配線圖案的方式,在第1及第2配線用樹脂薄 膜 3、3 a表面形成有阻劑等絕緣膜7、7 a。 本實施例之半導體裝置,如上所述,係以配線用樹脂 薄膜夾持半導體元件,藉此獲得新構造的封裝體,而可達 成半導體裝置更進一步的薄型化。此外,根據本實施例的 方法,可總括加工矽等之半導體晶圓,此外,可由配線用 樹脂薄膜夾持,藉此作爲基材加以處理,而有助於提升生 產性。再者,當以配線用樹脂薄膜夾持半導體晶圓時,可 在元件間設置間隙,而使封裝體的外形形狀並不會取決於 半導體元件的外形。 【圖式簡單說明】 第1圖係用以說明本發明之一實施例的第1實施例之 載置經切割之半導體晶圓的黏接片的斜視圖及延伸該黏接 片之狀態的斜視圖。 第2圖係製造第1實施例之半導體裝置的製程剖視 圖。 第3圖係製造第1實施例之半導體裝置的製程剖視 圖。 第4圖係製造第1實施例之半導體裝置的製程剖視 圖。 -15- (13) 1266375 第5圖係第1實施例之半導體裝置的剖視圖。 第6圖係說明本發明之一實施例的第2實施例之半導 體裝置的剖視圖。 第7圖係說明本發明之一實施例的第3實施例之半導 鳢裝置的剖視圖。 t主要元件符號說明】
1、1 ’ :半導體元件 2 : 黏接片 3、 3 a、3 ’、3 ’ a :配線用樹脂薄膜 4、 4a、4’、4’a、4b、4c、4d、4e:配線圖案 5、 5 ’、5 c、6 :連接配線 7、7 a、7 ’、7 ’ a :絕緣膜 8 :外部連接端子 8a :內部連接端子 9 :陸地區域 A、B :封裝體 -16-

Claims (1)

  1. (1) (1)1266375 十、申請專利範圍 1 · 一種半導體裝置,係具備: 半導體元件; 第1及第2配線用樹脂薄膜,夾持前述半導體元件; 配線圖案,分別形成於夾持前述半導體元件之第1及 第2配線用樹脂薄膜所露出的表面;以及 外部連接端子,形成於前述第2配線用樹脂薄膜的配 線圖案所露出的表面, 形成於前述第1配線用樹脂薄膜的配線圖案係與前述 半導體元件作電性連接,形成於前述第2配線用樹脂薄膜 的配線圖案係與形成於前述第1配線用樹脂薄膜的配線圖 案作電性連接。 2. 如申請專利範圍第1項之半導體裝置,其中,形成 於前述第1配線用樹脂薄膜的配線圖案與形成於前述第2 配線用樹脂薄膜之配線圖案表面的配線圖案,係藉由嵌入 形成於前述第1及第2配線用樹脂薄膜之貫通孔的連接配 線作電性連接。 3. 如申請專利範圍第1項或第2項之半導體裝置,其 中,形成於前述第1配線用樹脂薄膜表面的配線圖案係藉 由形成在前述第1配線用樹脂薄膜之貫通孔內所形成的連 接配線作電性連接。 4. 一種半導體裝置之製造方法,係具備: 將經切割分離成複數個半導體元件的半導體晶圓以垂 直於切割方向的方向載置於可伸縮的黏接片上的製程; -17- (2) 1266375 對前述黏接片施加張力而在前述半導體元件間形成間 隙的製程; 由上面將第1配線用樹脂薄膜貼在前述黏接片上的半 導體晶圓,且使其硬化的製程; 將前述黏接片從前述半導體晶圓予以去除,在已去除 該黏接片的面貼上第2配線用樹脂薄膜,使其硬化的製 程; • 在前述第1及第2配線用樹脂薄膜所露出的表面貼上 導電箔,將其進行蝕刻處理,在各別的表面形成配線圖案 * 的製程; - 藉由嵌入形成於前述第1配線用樹脂薄膜之貫通孔內 的連接配線,將形成在前述第1配線用樹脂薄膜表面的配 線圖案與前述半導體元件作電性連接的製程; 藉由嵌入形成於前述第1及第2配線用樹脂薄膜之貫 通孔內的連接配線,將形成於前述第2配線用樹脂薄膜表 # 面的配線圖案與形成於前述第1配線用樹脂薄膜表面的配 線圖案作電性連接之製程;以及 將外部連接端子連接於前述第2配線用樹脂薄膜之配 線圖案表面的製程。 5.如申請專利範圍第4項之半導體裝置之製造方法, 其中,嵌入前述貫通孔內的連接配線係藉由鍍膜而形成。 -18-
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