TWI241669B - Planarizing and testing of BGA packages - Google Patents

Planarizing and testing of BGA packages Download PDF

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Publication number
TWI241669B
TWI241669B TW93110509A TW93110509A TWI241669B TW I241669 B TWI241669 B TW I241669B TW 93110509 A TW93110509 A TW 93110509A TW 93110509 A TW93110509 A TW 93110509A TW I241669 B TWI241669 B TW I241669B
Authority
TW
Taiwan
Prior art keywords
package
circuit board
printed circuit
probe
test
Prior art date
Application number
TW93110509A
Other languages
English (en)
Chinese (zh)
Other versions
TW200425373A (en
Inventor
Mark L Diorio
Original Assignee
Celerity Res Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/428,572 external-priority patent/US6984996B2/en
Application filed by Celerity Res Inc filed Critical Celerity Res Inc
Publication of TW200425373A publication Critical patent/TW200425373A/zh
Application granted granted Critical
Publication of TWI241669B publication Critical patent/TWI241669B/zh

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/04Housings; Supporting members; Arrangements of terminals
    • G01R1/0408Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
    • G01R1/0433Sockets for IC's or transistors
    • G01R1/0483Sockets for un-leaded IC's having matrix type contact fields, e.g. BGA or PGA devices; Sockets for unpackaged, naked chips

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Measuring Leads Or Probes (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
TW93110509A 2003-05-01 2004-04-15 Planarizing and testing of BGA packages TWI241669B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/428,572 US6984996B2 (en) 2003-05-01 2003-05-01 Wafer probing that conditions devices for flip-chip bonding
US10/718,503 US6975127B2 (en) 2003-05-01 2003-11-19 Planarizing and testing of BGA packages

Publications (2)

Publication Number Publication Date
TW200425373A TW200425373A (en) 2004-11-16
TWI241669B true TWI241669B (en) 2005-10-11

Family

ID=33436680

Family Applications (1)

Application Number Title Priority Date Filing Date
TW93110509A TWI241669B (en) 2003-05-01 2004-04-15 Planarizing and testing of BGA packages

Country Status (4)

Country Link
EP (1) EP1625409A4 (ja)
JP (1) JP2006525515A (ja)
TW (1) TWI241669B (ja)
WO (1) WO2004099792A2 (ja)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20120014752A (ko) * 2010-08-10 2012-02-20 삼성전기주식회사 기판의 코이닝-전기검사 장치
US8933717B2 (en) 2012-06-21 2015-01-13 International Business Machines Corporation Probe-on-substrate

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5055778A (en) * 1989-10-02 1991-10-08 Nihon Denshizairyo Kabushiki Kaisha Probe card in which contact pressure and relative position of each probe end are correctly maintained
JPH06232233A (ja) * 1992-12-23 1994-08-19 Honeywell Inc 裸ダイの試験装置
JPH0883825A (ja) * 1994-09-09 1996-03-26 Tokyo Electron Ltd プローブ装置
TW308724B (ja) * 1995-07-03 1997-06-21 Motorola Inc
JPH09297154A (ja) * 1996-05-07 1997-11-18 Matsushita Electric Ind Co Ltd 半導体ウエハの検査方法
JPH10260224A (ja) * 1997-03-19 1998-09-29 Fujitsu Ltd 半導体検査装置及びこれを用いた検査方法
WO1999015908A1 (en) * 1997-09-19 1999-04-01 Hitachi, Ltd. Method for manufacturing semiconductor integrated circuit device
US6285201B1 (en) * 1997-10-06 2001-09-04 Micron Technology, Inc. Method and apparatus for capacitively testing a semiconductor die
US5967798A (en) * 1998-07-13 1999-10-19 Unisys Corporation Integrated circuit module having springy contacts of at least two different types for reduced stress
JP4036978B2 (ja) * 1998-09-09 2008-01-23 株式会社日本マイクロニクス 電子部品用電気的接続装置
JP2000353579A (ja) * 1999-06-08 2000-12-19 Nec Corp 半導体装置用のソケット及び半導体装置と基板との接続方法
US6344684B1 (en) * 2000-07-06 2002-02-05 Advanced Micro Devices, Inc. Multi-layered pin grid array interposer apparatus and method for testing semiconductor devices having a non-pin grid array footprint
JP2002164136A (ja) * 2000-11-28 2002-06-07 Nec Ibaraki Ltd Bga用icソケット
JP2002373924A (ja) * 2001-06-15 2002-12-26 Kyocera Corp プローブカード

Also Published As

Publication number Publication date
JP2006525515A (ja) 2006-11-09
TW200425373A (en) 2004-11-16
EP1625409A4 (en) 2006-06-14
WO2004099792A2 (en) 2004-11-18
WO2004099792A3 (en) 2005-09-09
EP1625409A2 (en) 2006-02-15

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees