1255520 玖、發明說明： I：發明戶斤屬之技術領域3 發明領域 本發明係一種使用一配適裝置之探針裝置。 5 【先前技術】 發明背景 積體電路元件的測試可分辨出有瑕疵的元件，亦可提 供有關製程中之良率或問題的資訊。最好能在製程中儘早 地進行測試，以避免不良元件的浪費處理，並能在一可修 10 正的問題影響多數批次之前來辨認出製程的問題。晶圓檢 測尤其能容許各積體電路元件在由一晶圓分開之前先行電 測試該各元件。被認為有瑕疵或不良的元件可在封裝之前 被剔除。又，對其製程的修正或調整亦能馬上進行而不會 有更多的延誤，此係若該等元件僅在被封裝之後才來測試 15 時將會造成者。 第1圖示出一習知的測試設備100可供測試被製成在一 晶圓110上的積體電路元件112。該晶圓110係為一半導體晶 圓而包含有許多的元件112。欲測試時，一探針或其它的定 位系統（未示出）會移動該晶圓110或一測試頭130，以使一測 20 試板120對準當時所要測試的元件112。該測試板120上列設 計多銷針124等匹配於各元件112上的電端子Π4之圖案。當 該測試板120適當地對準所擇元件112時，銷針124和端子 114會連接來提供該元件Π2與測試板120之間的電連接。該 等銷針124、測試板120,及測試頭130等將可導通該元件1 12 1255520 與測試裝置140之間的電訊號。 ^ 一測試設備100一般會被設計成可避免或儘量減少對該 μ 一牛112的損告，尤其是在銷針〗24接觸端子114處。於第 _於二中°銷針124會被懸設來提供可撓性，以限制其施加 ^而子114上之力。某些其它類似的設備會使用彈麼銷針的 σ又汁俾吾測试時能緩衝或限制施加於該等元件]12上的 力。 10 15 _该寻銷針12 4可換曲之—缺點係容易對準失誤。例如， ^ —鎖針124在清潔或使料被曲.f，則_針124將會時 f不能與目標端子114形成良好的電接觸，而致使測試失 、又°亥日日圓Uo與測試板120或銷針124的埶性質差昱， 亦會使銷針m能精準匹配今等减早n4岡安」貝t 千配°亥寻知子1 圖案的溫度範圍受 ::二其ί化?等銷針124相對於該元件112的辦 故田咖度支化時其長度亦會成正比地改變。 Λ彳式仏子114上造成的損害或磨損即使當該等銷 之十應匹配時亦會是__題，尤其#該元件ιΐ2 第二·裝晶片封裝時，該等損害更是-大問題。 =圖不出―倒如封裝_，其包含—晶粒職一互 的晶圓崎開。«曰/JT2係已由一例如第1圖 元件112 ::二的封裝會將金屬凸體(其乃形成 兒而子114)固接於基板220上的接墊 的電連1 互接基板220則會提供晶粒210和外部端子222之間 在封褒製程之前，接觸端子1M的尖銳測試銷針124等 20 1255520 會將凹痕216留在端子214上，特別是當該等端子114的接觸 部份係為較軟的金屬例如焊劑時。該等凹痕216會滯陷污染 物，氧化物或助焊劑，其會弱化端子114與接墊214之間的 接點，而造成較不可靠的封裝體。 5 在倒裝晶片封裝體中之另一潛在的問題係由端子的不 均一性所產生者。具言之，為能將端子114牢靠地固接於接 墊214，則該等端子114與接墊214的頂部應要平齊於一對應 該封裝基板的平面上。第2圖示出一問題，即有一端子114’ 並未延伸至或與一對應接墊214形成可靠的連接。該等端子 10 114的製程一般係為該異常端子114’的成因，但銷針124在 測試時亦會磨損所擇的端子114，而進一步地破壞其平面 性，故將使可靠的封裝更為困難。 I：發明内容3 發明概要 15 依據本發明之一態樣，一檢測系統會使用一種半導體 探針裝置，其係使用某些與受測元件相同的製程和材料來 製成者。具言之，該半導體探針裝置可包含一半導體晶粒， 及接觸墊等係使用與在受測元件上形成接觸墊之相同阻罩 來製設在該晶粒上。該等接觸墊可作為探針梢，或習知的 20 晶圓凸體製程亦可在該半導體探針裝置上來製成探針梢。 對該等探針梢的電接點可使用導電線路，線結法，帶結法， 或其它用來製造半導體元件的習知技術而來形成。當製法 或設計改變時，該探針梢圖案可調整為該等半導體元件所 需的尺寸，因為用來形成受測元件的半導體製程亦可用來 1255520 製成該探針裝置，包括該等探針梢。使用含有相同或類似 於受測元件之材料的半導體探針裝置，將會匹配該探針裝 置與受測試元件的熱性質，而可容其測試涵蓋一較大的溫 度範圍。 5 本發明之一特定實施例係為用來測試一元件的檢測系 統。在該檢測系統中的探針包含一半導體晶粒，其上設有 探針梢。該等探針梢可被電連接於一測試器，且會被排列 成一圖案而匹配於該元件上的端子圖案。在該探針中的半 導體晶粒可由與該受測元件相同的材料來製成，俾使該元 10 件能與該探針熱匹配。該測試器對探針梢的電連接能經由 設在該晶粒頂面上的線路來達成，或藉貫穿該晶粒的導電 通孔而來完成。該探針可選擇地包含一基板或印刷電路 板，其上固裝該半導體晶粒，且在一構態中，該探針總成 可包括一附設有或未附設基板的半導體晶粒，而套入一探 15 針卡的插座内。此可容該探針在受損或要測試一不同類型 的元件時能被卸除及更換。 本發明之另一實施例係為用來電測試一元件的探針 卡。該探針卡包含一第一基板可用來安裝在測試設備上； 一插座設在第一基板上；及一探針裝在該插座中。該探針 20 係可卸除地裝該插座内，而具有探針梢等設在一半導體晶 粒的頂面上，並排到成一圖案匹配於該元件上的端子圖案。 本發明的又另一實施例係為一種用來電測試一半導體 元件的製造方法。該方法包含：在一半導體晶粒上製成探 針梢並使之形成一圖案匹配於該半導體元件上的端子圖 1255520 案，及製成一互接社 備。製成該等探針肖° "^使該等探針梢電連接於測試設 觸墊等，然後在兮等接f驟包括在該半導體晶粒上製成接 接結構可被製成將該 电凸月…亥互 上，或將導電通孔由，丰體晶粒的頂面 圖式簡單說明 / v體晶粒的頂面貫通至其底面。 w圖示出用來檢剩晶圓的習知測試設備。 圖示出—習知的㈣晶片封裝體，其具有《是由 測5式和不均一的焊接凸體所造成者。 10 第3圖不出本發明之—實施例的晶圓檢測設備。 f4A圖示出_組金屬凸體在晶圓檢測之前的狀態。 第4B、4C、4D圖示出第从圖中的金屬凸體在使用本發 明各變化實施例的探針梢來作晶圓檢測之後的狀態。 15 第5A及5B圖不出在本發明一實施例的晶圓檢測程序 之前及之後，受測元件的凸體高度分佈圖。 第6A與6B圖為本發明_實施例之探針卡的立體圖，其 具有整合的金屬设在接塾探針上。 第7A、7B及7C圖示出本發明一實施例之探針卡的立體 圖，其中探針梢係設在可更換的探針總成上。 20 第8A及则示出—探針卡可在-溫度範圍内保持對 準一受測元件。 第9A 9B 9C 9d、9E圖係示出使用本發明各變化 實施例之半導體探針裝置的檢測系統。 在各圖中之相同標號係指相同或類似的構件。 1255520 i:實施方式i 較佳實施例之詳細說明 依據本發明之一態樣，一種用來電測試製設在一晶圓 上之元件的晶圓檢測方法亦會調修該元件上的端子，以改 5 善該等端子高度的均一性。故良好的元件在由該晶圓分開 時會呈較佳的狀態，而能在一倒裝晶片封裝體中可靠地連 接於一互接基板，或當該晶片被組裝於一 “Chip-on-board ”（晶片設於板上）的裝置中時，能固接於一電路板。該晶圓 探針可使用一探針卡，其係大致類似於該元件所要附設之 10 —印刷電路板或互接基板的全部或一部份。或者，該晶圓 探針能使用一半導體探針裝置，其係類似於該受測元件。 在該探針卡或裝置上的探針梢可為扁平的接觸墊或凸體 等，其係為該互接基板的正常電接觸結構物。或者，具有 所需形狀與尺寸的探針梢亦可被設在該探針卡或裝置上， 15 以使該等元件上的金屬凸體能造成所需的變形。 第3圖係為本發明一實施例之測試系統300的方塊圖。 該測試系統300包含一自動測試設備(ATE)310，一測試頭 320, 一探針卡330含有墊上金屬（MOP)的探針梢340等，一 晶圓盤350，及一檢測枱360。該系統300會電測試被製設在 20 一晶圓110的各元件112，且在過程中亦會調整各元件112的 端子，來改善各端子114的平面性。 該等元件112可為任何類型的元件，包括但不限於記憶 體、控制器、處理器、特定用途的積體電路(ASIC)，或任 何其它種類的1C或個別的元件。至於端子114，該等元件可 10 1255520 -、有孟屬凸體專以一咼度凸出於晶圓110的頂面上，該高度 係足夠用來倒裝晶片封裝或固接於一印刷電路板。針對目 前的倒裝晶片封裝製程，該等端子114 一般會有約60至 7〇〇μη之間的平均高度，而典型的平均高度約為l〇(^m。該 5各端子114可例如為一焊球，或一複合結構而含有多數金屬 層，譬如堆疊的焊球，包覆一焊劑層，一焊球，一金層， 一金柄的銅或其它金屬柱。或者，該端子114亦可為接墊， 而月b使用線結或某些其它封裝技術來被電連接。 當要進行電測試在晶圓110上之一選定元件112的檢測 10操作時，一探針卡330會被裝在測試頭320上，該探針卡設 有MOP探針340等會形成一圖案而匹配於一元件丨12上的端 子114圖案。MOP探針340可為金屬探針而直接設在探針卡 330上，或设在一附接於探針卡330之分開的印刷電路板或 互接基板上，或設在一電連接於探針卡33〇的半導體探針裝 15置上。該晶圓U0典型係由矽（Si)或其它半導體材料製成， 將會被放在該晶圓盤350上。檢測枱360會操作來定位及定 向該晶圓盤350，俾使所擇元件112的端子能對準M〇p探針 340。 僅為舉例，以下將說明一元件112在其端子114含有金 20屬凸體而需要調整來改善平坦性時的測試過程。如專業人 士所知，多個元件者有需要亦可同時地測試，且可在該等 元件上以其它類型的端子或不改變端子來進行測試。在讀 測試例過程中，檢測枱360會將晶圓盤350驅動升高，直到 被對準元件112上的端子1丨4與MOP探針340電接觸，且該等 1255520 MOP探針340開始非彈性地變形該等端子114為止。嗣ate 310會經由測試頭320和探針卡33〇將電輸入訊號送至端子 114 ,並測量由所擇元件112產生的輪出訊號，來判斷該元 件112疋否可操作並具有所需的功能。 10 15 20 八比j川和檢測枱360係為標準的測試設備_ 街合 供應商來購得，包括AgilentTechn〇k)gies公司，Teradyne& 司，及LTX公司等。ATE 31〇通常會依據元件112的類型來 以習知方式進行元件112的電測試。可控制該晶圓11〇相對 於MOP探針34〇之定位的檢測枱36〇，|好儀能夠測量該 圓110頂面與探針卡330之間的距離，或能精確地控制該咖 圓110最初與探針卡330接觸之後向上的移動量。或者，該 探針卡33G能被移動來控制該晶圓㈣的相對位置。當測試 時該晶圓110頂面與M〇P探針34〇之間的理想距離，將取決 於該晶圓11G表面上之端子114的高度，如後所詳述。、 依據本U之-您、樣，在探針卡33〇上_〇?探針州 僅賦具有限_應性而在檢_能促進端子ιΐ4的變形。該 k針卡330可例如為-具有或不具有凸體的互接基板，其可 適用於-含有-被封裝元件112的倒裝晶片封裝體中。該互 接基板典型係由-有機材料製成，例如聚酸胺或其它絕緣 材料，並包含導電線路能將該互接基板—面上的凸體或接 觸塾電連接於該基板相反面上的接_及/或球栅陣列 (BGA)。或者，M0P探針34〇亦可被設在 -的印刷電路板、互接基板、或半導體探針裝】上： 探針340會接觸受電測試之元件π2的端子]14，且能施加足 a曰 曰曰 12 1255520 夠的壓力來提供良好的電連接，並進一步造成端子114的變 形0 如上所述的探針卡330與MOP探針340可為一同質/整 5 10 15 合的結構或為可分開的元件。測試頭為一般的標準裳置， 且揼針卡330的基部可依據適當的標準來設計再固接於測 忒頭320。但，在本發明的所示實施例中，該等M〇p探針 可被設在一個別的基板、裝置或總成上，而被附設如該探 針卡330之一可卸除部份。此乃可使用設有不同探針 340的探針卡330來測試不同的元件。一具有可更換之 探針340的探針卡33G會具有能_速更換損壞之探針梢的 優點，因此ATE 310的停俥時間會減至最少。 則木針卞顶能被剛性或彈性地安裝在測試頭MO，俾 使該探針伽整體賦具—有限_變性。其輕量的範圍 :由無順變或雜安㈣〇至—彈財裝的大約15_或更 多。當檢測時，該等元件端子114的所需變形或平面化，如 :所述’纽係為—固定或崎安裝，或安裝的最 移行距離’或在—順變安“位於賴頭灿與探針卡 3^之„或可壓縮構件的數目，及料可壓縮構件之彈 吊數或模數等之控制選擇。 該等⑽探針34G係可使用印刷電路板技術或元件凸 來製成，而具有一優點係可容易構製來匹配-特定元 ^多個元件錢平行測試。相反地…具«桿或彈壓 :針的探針卡典型必須大於該元件，以容納該等探針的尺 ’而要安排該等探針匹配於-或多個元件將會較複雜。 20 1255520 硬實而無順變性MOP探針340的另一優點係，當相較於 使用在習知檢測設備中的針式、彈督式或懸桿式探針時， 它們會較為耐用。故MOP探針340能保持正確的斜準，而不 需要調整’亦無撓曲之虞。MOP探針340亦能例如以一刷子 5 或其它機械式清潔技術來清理，而不會損壞該等探針戈使 其對準失誤。 M〇P探針340亦能具有較大的平坦接觸區，乃如後所样 述。該等平坦接觸區除了在使用與清潔時較不會受損之 外，亦不會具有突出物或尖銳點等來夹帶微粒。因此，M〇p 10探針340在測試時即使長久使用之後且未經清理時，亦能對 該元件繼續提供低接觸阻抗。 第4八圖示出一被製設在一基板41〇上之元件_的一部 份。該元件400包含凸體42〇及422等，其可為焊球或其它如 同電端子的導電結構物。最理想是，所有的凸體42〇與极 Μ皆能在基材4U)表面上β出相同的高度H，但凸體42〇和似 I能會遭受製造變異，而使某些凸體422與標準高度h產生 -差距有任何凸體422的差距Z1太大，則當 連接時，將會產生-脆弱或不良的接點，如前於第2圖中所 述0 20 第仙圖示出一具有尖銳且硬質的探針梢440之探針卡 430當與-元件上的凸體42〇和422形成接觸時，會如何地馨 凹該等凸體420。具言之’當—探針梢44〇運行一足夠的距 離來電接觸-較小的&體422時’其它的探針梢糊會馨入 較大的凸體420中’而造成細窄的凹痕425。如此形成於較 14 1255520 大凸胆420中的凹痕425將會帶陷污染物 體420的電連接。此外 4化對較大凸 μ ^斤 兄的探針梢C0幾乎不能改 “亥寻凸體420與422的高度不 奶之原本高度差異仍會在—倒ρ片^该寺凸體物與 刷電路板的晶粒中，造成弱化U = 衣體或固設於印 成弱化或不良的電接觸。 第4C圖示出—系統包含—本發 432,其具有平扫的探 只e例的採針卡 卞—自冰針梢442。平探針梢 =為凸體·2直徑的-半。在本發明之= 中，5亥採針卡432係為—印刷電路拓，” 、， 10 15 20 該印刷電路;^ ，而探針梢442係為在 路板之-表面上的接觸墊或金 的另-實施例中’該等探針梢觸為一半導二= =墊:形：圖案匹配於受測試元件上二與 性=:，:當施加可使元件端子辦 成。當該元二:===的金屬來製 時，目i丨一 4 了延展材料例如焊料 堵如銅的材料即可適用於該等探針梢442。 圖中示出鱗探針梢442係與探針卡极的表面平 β仁揼針梢442亦可凸出探針卡432的表面 凹入探針卡432的表面。<曰，探斜卡4巧庙φ飞甚至相對 的底… “針卡心2應要可使探針梢442 ]展。達到與晶圓400頂面所需的間隔。 2用探針卡432來進行檢測操作時，—檢測枱 而使探_442的底部接觸 的底應的凸體420,而晶圓的頂面會與探針梢撕 有Η的距離。該檢測枱會進一步驅動晶圓彻及/或 ]5 1255520 探針卡432-超移距離Z2，使兩者更為#近。此過程將會壓 平问度為Η或較咼的凸體420，及至少高度在Η2(Η2 = Η_Ζ2) 的凸體422等。如此形成的變形凸體424和426等會更一致地 成為相同的咼度Η2。故該等凸體424與426的頂部會比原來 5的*體420與422具有更佳的平面十生，而此較佳的平面性將 月匕加強在-倒裝晶片封裝體或—含有該探針裝置之晶片設 在板上構件的互接點整體牢固性。 在本發明之一實施例中，該探針卡432可如同一互接基 板(如第2圖中的互接基板22〇)，其在測試後會被使用於該元 10件的倒I晶片封裝體。而探針梢442則可如同接觸塾而會被 焊接於凸體424與426等，例如，當在將該元件電連接^一 倒I晶片封裝體之互接基板的習知重流操作時。或者，該 探針卡432可包含-半導體探針裝置，其係相同於該受測元 件，或其至少具有-接觸墊圖案匹配於受測元件者。 15 该超行距離Ζ2通常必須至少充分足夠來在各端子424 與426形成-低接觸阻抗，以供該元件的電測試。即使一很 小的超移距離Ζ2(例如供電測試所需之最小超移）通常亦會 造成最大凸體的平坦化，而改善該等凸體的整體平面性， 因此得能增進所造成之倒裝晶片封裝體各互接點的牢固 20性。而較大量的超移可提供更大的平面性改善，直到該超 移距離Ζ2能令所有的凸體42〇與422等皆達成某些平坦化為 止。在該各&體420與422至少部份平坦化時，該等凸體似 與426之平面性的改變乃取決於探針梢M2之平面性和順應 性的變異。 ' u 16 1255520 第5A圖示出該等凸體高度在檢測之前和檢驗之後的分 佈圖510和520。於本例中，其製程所造成的凸體額定高度 和寬度皆約為90μηι，但會有一些差異而使少數凸體高至 105 μΐΉ或低於75μηι。在本例的檢測過程中，將會驅近該晶 5 圓與探針卡，而使晶圓與探針梢底部的平均間距成為約 80μηι。當該探針卡被抽出時，該分佈曲線520會包含較高 及較短於80μηι的凸體，因為其有容差，且較短的端子422 僅會作彈性變形。 第5Β圖示出另一例的凸體高度在檢測前及檢測後的分 10 佈曲線530與540。在檢測操作之前，該等凸體的平均高度 接近88μπι，而最短的凸體高度約為82μηι。在第5Β圖之例 中，該檢測操作會驅動該晶圓與探針卡，直到該晶圓與探 針梢底部之間的平均間距小於檢測前的最短凸體兩度為 止。結果，當該探針卡被抽出時，所有的凸體之高度皆會 15 短如檢測前之分佈曲線530的最小凸體高度，或比它更短。 故分佈曲線540會包含更短的凸體高度，但其範圍會比分佈 曲線530更窄甚多，此顯示在檢測之後，該等凸體會具有改 善的平面性。 在檢測時所用的超移距離Ζ2亦需要限制以免損壞該元 20 件，因為凸體420與422等之壓縮會在其面下的元件410部份 上造成破壞應力。所造成的應力之量通常係取決於超移距 離Ζ2及凸體420的結構。凸體420與422係由可延展材料製 成，例如鉛類或易熔焊劑，其能非彈性變形而不會造成應 力來損壞下層之典型半導體元件結構。含有較低延展性的 ]7 下層 Z2。 结樽 或車乂硬質的結構物例如銅柱之凸體，在造成損 的風險變 壞 得太大之前 僅能容許較小的超移距離 量因紊护測/平坦化操作來選擇超移距離Z2之另一考 所需更大4凸體的所需變形廓型。比能形成良好電接觸 平垣化及勺超移距離，會在凸體424與426的頂面上提供更 上時，診t的平坦面積。要將該元件固接於—互接基板 的接觸體頂部的平坦區域會被移來與互接基板上 10 烊劑，I二凸肢接觸。嗣一重流程序會至少部份地液化該 球狀^息平^的焊料凸體會傾向於將其本身變形成- 過程中各 ' 少表面張力。故该等平坦化的焊球在該重流 ^自然地朝向互接的晶圓延伸。 15 垣化、凸⑻伽與422頂部在檢測時的調整並不僅限於平 何所鸾體:頂面。鱗凸體42Q與422亦可被印鑄成任 444等延# #圖乃不出一例，該探針卡434具有探針梢 徑。=+凸出探針卡434的表面上，到、於凸細的= 仏針梢444可例如一 有9〇μ1Ώι#_ _見，而凸體的直徑約 忒寺奴針梢444可使用—設有 半導體元件料該探針卡43•㈣成。^互接基板或 20 當在檢測過程時，探獅44會在較小的凸體似上造 成一+坦化的了頁面，而該凸體426之平坦化區輸、於探斜 脚的面積。但該探針梢444會在^_42㈣心 陷的頂面。當所造成的凹穴不會太窄或太深而足以滯納污 染物例如乳化物或焊接助劑時，該等凹陷表面是可以接受 18 1255520 基极的程中有助於該元件與-凸體互接 焊^ 的對準及在重流過程中寸笙料p 坏球的自然膨脹，則 H私中忒寺變形 "坏接連結的牢固性將能增強。 之h 圖的測試設傷3 〇〇中，一 | # 之‘針梢的探針相 〃有本發明 構，或為一複人為—έ有该寺探針梢的單-整體結 易地卸除㈣中包含該等探針梢的—部份能被容 第6Α圖示出本發明—實 卡_包含—基板 d木針卡_。雜針 10 15 基板610可為一印刷 及心針柏㈣寻。該 貫m千# 板’ ^由一絕緣材料所製成，其上 貝叹，亥寻V電線路62〇。 ^ 圖所不，该寺導電線路620會將 ==63G電連胁魏_，其會導至難板⑽連結於-夺木針頭之一面上的雷觸- _ 、 ，，，，（未不出）。該等探針梢630如第6Β β平不可被小心地製設成在導電線路伽之接墊部上的 平頂金屬凸體或短柱。或者，該等導電線路620的接塾部份 亦可形成如上所述的探針梢。在任—情況下，該等探針梢 皆會提供平坦的非順變表面’其在當晶圓檢測時能被用來 改善該等元件端子的平面性。 該一體的探針卡_會有一優點，即受測元件與探針頭 ，探針梢630、導電線路㈣、通孔⑽等）之間的連接可 被最佳化來提供最少雜抗，此敏巧路或高制試甚為 重要但’破固定於基板610上的探針梢63〇僅能被用來測 試-具有與探針梢6 3 〇之圖案匹配的端子之元件。當該測試 設備開始要測試另一種元件或若探針梢63〇損壞時，則該整 19 1255520 個探針卡600即需被更換。 第7A圖示出本發明一實施例的探針卡7〇〇，其能快速地 更換探針梢來儘量減少測試設備的停俥時間。該探針卡7〇〇 包含一第一基板710，一插座75〇，及一第二基板76〇。該基 5板760可套入插座750中，並具有固定的探針梢730。插座750 係設在基板710上，而當基板76〇套入插座75〇内時，在基板 710中的導電線路720等會將基板76〇電連接於通孔，其 會導至測試頭的電無（未示出）。因此，探針梢謂會經由 基板760、插座75〇、導電線路72〇、通孔74〇，及該基板則 10背面上的電接點（未示出）而電連接於該測試設備。 該各基板710與760可使用傳統的印刷電路技術來製 成，且在本發明之-實施例中，該基板76〇係類同於一使用 在受測元件之倒裝晶片封裝體内的互接基板。該插座75〇可 為任何類型的插座，而能容裝或提供對基板的電接點。 在第7B圖所示之例中，該插座75〇在各導電線路72〇的端部 白3有接塾725 ’其會匹配並電連接於基板底面上的端 子（未示出）。一樞轉夹會將該基板760固持於定位。 第7C圖不出另-變化實施例的基板他可被央固於插 座、中,亥基板765不同於基板76〇之處在於該基板加含 2〇有-半導體裝置77〇，其上設有探針梢別。該半導體裝置 頂則又被設在一印刷電路板上，其可套入插座7_， 亚具有端子（未示出）會觸接各線路72〇末端的接墊725。 此探針卡的優點係利用它則基板76〇或爾能被 更換，而基板710則可保持固裝於測試設備上。基板760或 20 1255520 765可例如被釋放再由插座750中取出，而不需要除 何複雜的拆解，故基板760或765在當測試設備要改成 具有不同端子圖案（例如晶粒縮小）的元件時，或當探針梢 730損壞時，將能夠迅速地更換一新基板。 10 15 20 一晶圓在極端溫度的電檢測和測試有時會需要被用來 辨認及消除不可靠的元件。俾以性能或規格標準來收存或 分類各元件，或來區分特定操作溫度或使用條件的元件。 不用懸桿或彈簧銷而具有硬實探針梢的探針卡之一優點係 月匕改善其熱穩疋性。溫度的變化，例如定溫測試之加枚， 會使習知的測試騎圖案造成大變化，因為長銷針^著 ，升的溫度而可觀地膨脹。相對地，該等探針梢圖；：隨 二相對較小之互接基板或半導體晶_輯或_來敎收 、、伯或膨脹。且，當該等探針梢設在_半導體晶粒上，而該 ==與受測元件相同或類似的材料時 幸: 的熱膨脹將會㈣於該元件上之接觸端子«㈣膨服。 右该寺楝針梢設在與受測元件不同的材料上，則 在—特定測試溫度來機械式地匹配該 Γ=:曰等設計將會納入對該元件之物理性質的考 歹 矽日曰圓的熱脹係數（CTE) 測試溫度等。佝a ,、“ 幻木針卡的CTE，及 卡未必能在另 飞度（如室溫）能匹配-元件的探針 匹7_試溫度(例咐或㈣^ 較二：b，使用與受測元件不同的材料可能在該 造成開放性接觸。因此，—第二種探2極端的情況下會 較高溫度時匹配該元件。 ★肖可被設計來在該 21 25 1255520 依據本發明的另一態樣，即使一探針並未包含與受測 元件相同的材料，但在該探針上之探針梢的圖案和尺寸亦 可被製成能在一寬廣的溫度範圍内來與一元件的端子妥當 地接觸。第8A與8B圖示出一探針81〇具有探針梢811、812、 5 813等由該探針810的中央隨著距離來增大尺寸。當要檢測 時，該探針810的中心會對準一元件82〇的中心。第8八圖示 出滅元件820的ί而子822等如何在一第一溫度（如室溫）對準 各抓針梢81卜812、813。- “定溫，，測試會在—較高溫度 (如120 C)來進行。結果，該元件82〇的熱膨脹可能與該探針 1〇 810的膨服不同，因為它們的各CTE有所差異(例如一石夕晶圓 興印刷電路板的CTE會有*同）。通常，該元件82〇的膨脹 差異可相對於對應的探針梢8U、812、或813來移動各端子 822’且其移動量係正比於該端子奶與該元件中心的距 離。為補償該等膨脹差異，各梢墊如、812、813的尺寸會 15被製成延伸超過對應端子822的定位範圍，因此即使在較二 溫度，，該等梢塾8U、812、813亦能保持對準各端子奶。 當該等探針梢被設在一半導體探針裝置上，而該裝置 具有與受測元件相_咖時，職雜差異的問題將能 被減少或消除。第9A圖示出一探針_的平面圖，盆包含一 2〇半導體晶粒⑽最好是由與受測元件相_材料所製成。在 该半導體晶粒910上的接觸墊具有一圖案相同於受測元件 叫妾觸墊圖案。或者，該晶粒崎可包含附加的接觸塾 ^線路922來電連接於—探針卡的其餘雜(未示於第湖 )在本發明之一實施例中，接觸墊920等會使用一罩幕 22 1255520 及/或-製程，其係相同於用以製造受測元件上的接觸塾 者，來製設在該晶粒910上。該晶粒91〇甚至可為和受測元 件相同類型的元件。嗣若有需要，則附加的線路或接塾922 等，可使用在另-製程步驟製成的一或多個附加圖案層來 5加設於晶粒9H)上。或者，接觸墊92〇與線路922等亦可^同 一圖案化層或互接結構的一部份。 奴針梢930係設在接觸墊92〇上。該等探針梢93〇可用傳 統的凸體技術來製成，該技術係習知用來製造凸體或短柱 以供倒裝晶片連結者。或者，該等接墊92〇亦可作為探針 10梢’而各凸體930則可省略。如前所述，該等探針梢最好係 由例如銅等材料來製成，其會比受測元件之端子上的頂面 材料更具彈性。一打光製程，化學機械拋光(CMp)，或任何 其匕精岔處理，皆可將該等探針梢（不論是否凸出）平坦化至 一南精確度（例如在1 μπι以内）。 15 該探針係可拆卸地安裝在一探針卡上，如第9Β圖所 示在第9Β圖中，4採針卡950上設有一插座940具有電觸 點942等，其在晶粒91〇被固定於插座91〇内等將會接觸各接 墊922。該插座940最好能被打開或拆卸來移除及裝入晶粒 910 g要測试時，该晶粒91〇上的探針梢930會透過接塾920 20和922而電連接於各觸點942，並由該等觸點942經由插座 940來電連接於探針卡950。該探針卡95〇則可藉前於第3圖 所述的方式來連接於測試設備。 第9C圖示出一變化結構，其中晶粒91〇係設在一 pCB或 互接基板960的頂面上，且一探針總成包含晶粒91〇和基板 23 1255520 960等係可卸除地裝在一插座942中。於所示實施例中，連 '、、口線924等會將晶粒91〇頂面上的接墊連接於互接基板96〇 上之各接墊962。或者，帶連接或撓性電路連接亦可同樣地 用來將接墊942等電連接於基板96〇。在該基板96〇中的線路 5 (未示出）會將接墊962等電連接於基板960底面上的端子 編，且端子934會電連接在—探針卡脱上的接墊或線路 (未示出），而元成探針梢93〇至探針卡952的電連接。第9c 圖的實施狀-優點係，雜座942並不f要電接點，而尺 寸係可容納互接基板960其典型會大於半導體晶粒91〇。此 1〇外，基板960會將探針裝置910置於一比探針卡952更高之 處。沒些結構特徵將會使該插座942比第9β圖中的插座舛〇 更容易製造。 第9D圖示出本發明的另一實施例，其包含一半導體探 針裝置915。該探針裝置915與第从圖中之探針裝置異 b在於，該探針裝置915的電端子934係設在該探針裝置犯的 底面上。更詳言之，該探針裝置915含有接觸墊920和探針 梢=0等設在頂面上。導電通孔934等會連接於接觸塾伽， 並穿過該半導體晶粒而將該等接觸墊92()電連接於該探針 卡915底面上之各接觸墊926。 20 —種用來製造該探料置915的方法係、進行雷射鑽1255520 玖, DESCRIPTION OF THE INVENTION: I: TECHNICAL FIELD OF THE INVENTION The invention is a probe device using a fitting device. 5 [Prior Art] Background of the Invention The test of integrated circuit components can identify defective components and provide information on yield or problems in the process. It is best to test as early as possible in the process to avoid wasted processing of defective components and to identify process issues before a potentially correct problem affects most batches. Wafer inspection in particular allows each integrated circuit component to be electrically tested prior to being separated by a wafer. Components that are considered defective or defective can be removed prior to packaging. Also, corrections or adjustments to the process can be made immediately without further delays, which would result if the components were tested only after they were packaged. Figure 1 shows a conventional test apparatus 100 for testing integrated circuit components 112 that are fabricated on a wafer 110. The wafer 110 is a semiconductor wafer and contains a plurality of elements 112. To test, a probe or other positioning system (not shown) moves the wafer 110 or a test head 130 to align a test panel 120 with the component 112 to be tested at the time. The test board 120 is provided with a pattern of the plurality of pins 124 and the like, which are matched to the electrical terminals Π4 on the respective elements 112. When the test board 120 is properly aligned with the selected component 112, the pin 124 and the terminal 114 are connected to provide an electrical connection between the component Π2 and the test board 120. The pin 124, the test board 120, and the test head 130, etc., will conduct electrical signals between the component 1 12 1255520 and the test device 140. ^ A test device 100 will generally be designed to avoid or minimize damage to the μ-Ice 112, particularly at the pin terminal 24 contact terminal 114. The pin 124 will be suspended to provide flexibility to limit the force exerted on the sub-114. Some other similar devices use the sigma of the pin and the force that can be applied to the components 12 when tested. 10 15 _ The search pin 12 4 can be changed. The disadvantage is that it is easy to misalign. For example, ^—the lock pin 124 is cleaned or the material is bent. f, then the _ pin 124 will not make good electrical contact with the target terminal 114, causing the test to be lost, and the sunday Uo and the test board The difference in the 埶 properties of the 120 or pin 124 will also make the pin m accurately match the temperature range of the N4 Gangan "Bei Thousand ° 亥 寻 知 知 1 pattern:: 2 its の化? The length of the needle 124 will also vary proportionally with respect to the branching of the element 112. The damage or wear caused by the cymbal cymbal 114 may be a __ question even when the pin 10 should match, especially when the component ι ΐ 2 is mounted on the chip package, the damage is a big problem. = Can not figure out - such as package _, which contains - the wafers of the wafers. «曰/JT2 has been electrically connected to the pads of the substrate 220 by a package such as the component 112:2 of FIG. 1 which will fix the metal protrusions (which are formed 114) to the substrate 220. A sharp test pin 124 or the like 20 1255520 contacting the terminal 1M between the die 210 and the external terminal 222 will be provided between the die 210 and the external terminal 222 to leave the dimple 216 on the terminal 214, particularly when the terminals 114 are in contact. Some parts are softer metals such as flux. The indentations 216 can trap contaminants, oxides or fluxes which can weaken the joint between the terminals 114 and the pads 214, resulting in a less reliable package. Another potential problem in flip chip packages is due to the inhomogeneity of the terminals. In other words, in order to securely fasten the terminal 114 to the pad 214, the terminals 114 and the top of the pad 214 should be flush with a plane corresponding to the package substrate. Figure 2 illustrates a problem in that a terminal 114' does not extend to or form a reliable connection with a corresponding pad 214. The process of the terminals 10 114 is generally caused by the abnormal terminal 114', but the pin 124 also wears the selected terminal 114 during testing, further destroying its planarity, thus making the reliable package more reliable. difficult. I: SUMMARY OF THE INVENTION 3 SUMMARY OF THE INVENTION 15 In accordance with one aspect of the present invention, a detection system utilizes a semiconductor probe device that is fabricated using the same processes and materials as the device under test. In other words, the semiconductor probe device can include a semiconductor die, and the contact pads are formed on the die using the same mask as the contact pads formed on the device under test. The contact pads can be used as probe tips, or conventional 20 wafer bumping processes can also be used to form probe tips on the semiconductor probe device. The electrical contacts of the probe tips can be formed using conductive traces, wire bonding, tape bonding, or other conventional techniques for fabricating semiconductor components. When the manufacturing process or design changes, the probe tip pattern can be adjusted to the size required for the semiconductor components, because the semiconductor process used to form the device under test can also be used to make the probe device, including the probes, 1255520. Tip. The use of a semiconductor probe device containing the same or similar material to the device under test will match the thermal properties of the probe device to the device under test, allowing for a wide temperature range. A particular embodiment of the invention is a detection system for testing a component. The probe in the detection system includes a semiconductor die with a probe tip disposed thereon. The probe tips can be electrically connected to a tester and arranged in a pattern to match the terminal pattern on the component. The semiconductor die in the probe can be made of the same material as the device under test so that the member can be thermally matched to the probe. The electrical connection of the tester to the probe tip can be accomplished via a line disposed on the top surface of the die or through a conductive via of the die. The probe optionally includes a substrate or a printed circuit board on which the semiconductor die is mounted, and in a configuration, the probe assembly may include a semiconductor die with or without a substrate attached thereto. Nest into the socket of the 15-pin card. This allows the probe to be removed and replaced when it is damaged or when testing a different type of component. Another embodiment of the invention is a probe card for electrically testing a component. The probe card includes a first substrate for mounting on the test device; a socket disposed on the first substrate; and a probe mounted in the socket. The probe 20 is removably mounted in the socket, and has a probe tip or the like disposed on a top surface of the semiconductor crystal grain and arranged in a pattern matching the terminal pattern on the element. Still another embodiment of the present invention is a method of manufacturing a semiconductor component for electrical testing. The method includes forming a probe tip on a semiconductor die and forming a pattern to match the terminal of the semiconductor device, Fig. 1255520, and forming an interconnection device. Forming the probes such that the probe tips are electrically connected to the test contact pads, etc., and then the connection structure is formed on the semiconductor die by 兮 etc. The electric embossing is carried out on the other side, or the conductive through hole is formed by the top surface pattern of the bulk crystal grain/the top surface of the v body grain is penetrated to the bottom surface thereof. w shows a conventional test device for detecting remaining wafers. The figure shows a conventional (four) chip package having "caused by a type 5 and a non-uniform solder bump. 10 Fig. 3 shows a wafer inspection apparatus of the present invention. f4A illustrates the state of the _group metal bumps prior to wafer inspection. 4B, 4C, and 4D are views showing a state after the metal bump of the drawing is subjected to wafer inspection using the probe tip of each of the modified embodiments of the present invention. 15 Figures 5A and 5B illustrate a profile of the height of the convexity of the device under test before and after the wafer inspection procedure of an embodiment of the present invention. 6A and 6B are perspective views of the probe card of the embodiment of the present invention, having an integrated metal disposed on the interface probe. 7A, 7B and 7C are perspective views of a probe card in accordance with an embodiment of the present invention, wherein the probe tip is attached to the replaceable probe assembly. 20 8A and </ RTI> show that the probe card can maintain alignment of a component under test over a temperature range. The 9A 9B 9C 9d, 9E diagram shows a detection system using the semiconductor probe device of each of the modified embodiments of the present invention. The same reference numerals in the various drawings refer to the same or similar components. 1255520 i: Embodiment i Detailed Description of Preferred Embodiments According to one aspect of the present invention, a wafer inspection method for electrically testing components fabricated on a wafer also modifies terminals on the component to Change the uniformity of the height of these terminals. Therefore, a good component will be in a better state when separated by the wafer, and can be reliably connected to an interconnect substrate in a flip chip package, or when the wafer is assembled in a "Chip-on- When the board is mounted on the board, it can be attached to a board. The wafer probe can use a probe card that is substantially similar to all or a portion of the printed circuit board or interconnect substrate to which the component is to be attached. Alternatively, the wafer probe can use a semiconductor probe device that is similar to the device under test. The probe tip on the probe card or device can be a flat contact pad or protrusion, etc., which is the normal electrical contact structure of the interconnecting substrate. Alternatively, probe tips having the desired shape and size may be provided on the probe card or device to allow the metal projections on the components to cause the desired deformation. Figure 3 is a block diagram of a test system 300 in accordance with one embodiment of the present invention. The test system 300 includes an automatic test equipment (ATE) 310, a test head 320, a probe card 330 including a metal tip (MOP) probe tip 340, etc., a wafer tray 350, and a test station 360. The system 300 electrically tests the components 112 of the wafer 110 and also adjusts the terminals of the components 112 to improve the planarity of the terminals 114. The elements 112 can be any type of element including, but not limited to, a memory, a controller, a processor, an application-specific integrated circuit (ASIC), or any other type of 1C or individual component. As for the terminal 114, the components may be 10 1255520 - and the Meng convex body is protruded from the top surface of the wafer 110 with a degree of height sufficient for flip chip packaging or fixing to a printed circuit. board. For current flip chip packaging processes, the terminals 114 typically have an average height between about 60 and 7 〇〇μη, while a typical average height is about 1 〇 (^m. The 5 terminals 114 can be, for example, A solder ball, or a composite structure, containing a plurality of metal layers, such as stacked solder balls, coated with a solder layer, a solder ball, a gold layer, a gold handle copper or other metal post. Alternatively, the terminal 114 is also It can be a pad, and the month b is electrically connected using a wire tie or some other packaging technique. When an electrical test is to be performed on the detection 10 of one of the selected components 112 on the wafer 110, a probe card 330 will be Mounted on the test head 320, the probe card is provided with a pattern such as a MOP probe 340 that forms a pattern to match a terminal 114 on a component 丨 12. The MOP probe 340 can be a metal probe and is directly disposed on the probe. The card 330 is disposed on a separate printed circuit board or interconnect substrate attached to the probe card 330 or on a semiconductor probe package 15 electrically connected to the probe card 33. The circle U0 is typically made of germanium (Si) or other semiconductor material and will be placed on the wafer pad 350. The inspection station 360 operates to position and orient the wafer tray 350 such that the terminals of the selected component 112 can be aligned with the M〇p probe 340. By way of example only, an element 112 will have gold 20 at its terminal 114. It is a convex body that needs to be adjusted to improve the flatness test process. As known to the skilled person, multiple components can be tested at the same time, and other types of terminals can be used on the components or the terminals can be changed. The test is performed. During the test case, the test station 360 drives the wafer tray 350 up until the terminals 1丨4 on the aligned component 112 are in electrical contact with the MOP probe 340, and the 1255520 MOP probes 340 Starting to inelastically deform the terminals 114. The 嗣ate 310 sends an electrical input signal to the terminal 114 via the test head 320 and the probe card 33, and measures the round-out signal generated by the selected component 112 to determine the Component 112 is operational and has the required functionality. 10 15 20 Eight to J and the test bench 360 are standard test equipment _ Street suppliers to buy, including AgilentTechn〇k) gies, Teradyne & , and LTX companies. ATE 31A typically performs an electrical test of component 112 in a conventional manner depending on the type of component 112. The detection table 36〇 of the wafer 11〇 relative to the positioning of the MOP probe 34〇 can be controlled, and the distance between the top surface of the circle 110 and the probe card 330 can be measured, or the coffee circle can be accurately controlled. The amount of upward movement of 110 after initial contact with probe card 330. Alternatively, the probe card 33G can be moved to control the relative position of the wafer (4). The ideal distance between the top surface of the wafer 110 and the M〇P probe 34A when tested will depend on the height of the terminal 114 on the surface of the wafer 11G, as will be described in more detail below. According to this U-you, sample, on the probe card 33 〇 〇 探针 探针 探针 探针 探针 探针 探针 探针 探针 探针 探针 探针 探针 探针 探针 探针 探针 探针 探针 探针 探针 探针 探针 探针 探针 探针 探针 探针 探针 探针 探针 探针 探针The k-pin card 330 can be, for example, an inter-substrate with or without a bump, which can be adapted for use in a flip-chip package containing the packaged component 112. The interconnect substrate is typically made of an organic material, such as a polyamine or other insulating material, and includes a conductive trace that electrically connects the bump or contact pad on the interconnect substrate to the opposite side of the substrate. Connect _ and / or ball grid array (BGA). Alternatively, the MOS probe 34 can also be disposed on a printed circuit board, an interconnect substrate, or a semiconductor probe package: the probe 340 contacts the terminal 14 of the component π2 subjected to the power test, and can apply a foot a.曰曰曰 12 1255520 sufficient pressure to provide a good electrical connection and further cause deformation of the terminal 114. The probe card 330 and the MOP probe 340 as described above may be a homogeneous/integral 5 10 15 structure or Separable components. The test head is a standard standard skirt, and the base of the boring card 330 can be designed and reattached to the boring head 320 according to appropriate standards. However, in the illustrated embodiment of the invention, the M〇p probes may be provided on a separate substrate, device or assembly and attached as a removable portion of the probe card 330. . This allows the use of probe cards 330 with different probes 340 to test different components. A probe card 33G having a replaceable probe 340 has the advantage of being able to replace the damaged probe tip with a speed change, so that the ATE 310's downtime is minimized. The wooden needle dome can then be rigidly or elastically mounted to the test head MO, so that the probe is integrally provided with a limited _ degeneration. Its light weight range: from no reciprocity or miscellaneous (four) 〇 to - 弹 装 大约 about 15 _ or more. When detecting, the required deformation or planarization of the component terminals 114, such as: the 'new line is - fixed or sturdy installation, or the most moving distance of installation' or in - shun'an" is located in Laitoucan and exploration The needle card 3^ or the number of compressible members, and the number of bombs or modulus of the compressible member can be controlled. The (10) probes 34G can be fabricated using printed circuit board technology or component bumps, and have the advantage that they can be easily constructed to match-specific elements. Conversely... a probe with a rod or a spring: the probe card of the needle must typically be larger than the member to accommodate the size of the probes. It would be more complicated to arrange the probes to match - or multiple components. 20 1255520 Another advantage of the hard, non-conforming MOP probe 340 is that they are more durable when compared to pin, bullet or boom probes used in conventional testing equipment. Therefore, the MOP probe 340 can maintain the correct alignment without the need to adjust 'and no deflection. The MOP probes 340 can also be cleaned, for example, by a brush 5 or other mechanical cleaning technique without damaging the probes for misalignment. The M〇P probe 340 can also have a large flat contact area as will be described later. These flat contact areas do not have protrusions or sharp points or the like to entrain particles in addition to being less damaged during use and cleaning. Therefore, the M〇p 10 probe 340 can continue to provide low contact resistance to the element even after long-term use and without cleaning. Fig. 4 shows a part of a component _ which is formed on a substrate 41. The component 400 includes bumps 42 and 422, etc., which may be solder balls or other electrically conductive structures such as electrical terminals. Ideally, all of the protrusions 42 and Μ can produce the same height H on the surface of the substrate 4U), but the protrusions 42 and I can suffer manufacturing variations, and some of the protrusions 422 If there is any difference between the standard height h and the gap Z1 of any convex body 422, then when connected, a weak or bad contact will be produced, as shown in the previous figure in Fig. 2 A probe card 430 having a sharp and rigid probe tip 440 will emboss the projections 420 when in contact with the projections 42 and 422 on the component. In other words, when the probe tip 44 〇 runs a sufficient distance to make an incoming call - the smaller & body 422 'other probe tips will sing into the larger protrusion 420' and cause a narrow Dent 425. The indentations 425 thus formed in the greater than 14 1255520 large lobes 420 will trap the electrical connections of the contaminant body 420. In addition, the probe tip C0 of the larger convex μ 斤 几乎 几乎 几乎 几乎 几乎 几乎 几乎 几乎 “ 420 420 420 420 420 420 420 420 420 420 420 420 420 420 420 420 420 420 420 420 420 420 420 420 420 420 420 420 420 420 420 420 420 In the die of the board, the weakened U = body or fixed to the printed weakened or poor electrical contact. Figure 4C shows - the system contains - the hair 432, which has a flat sweep Needle 卞 - from the ice needle tip 442. Flat probe tip = is a convex body · 2 diameter - half. In the invention =, 5 Hai Cai needle card 432 is - printed circuit extension,",, 10 15 20 the printed circuit; ^, and the probe tip 442 is in the contact pad or gold on the surface of the road - in another embodiment - the probe tip is half-guided = = pad: shape: pattern Matching to the tested component on the second and the sex =:,: When applied, the component terminal can be made. When the metal of the element 2: === is made, the material of the extension material such as a solder plug such as copper can be applied to the probe tips 442. The scale probe tip 442 is shown in the figure and the surface of the probe card is flat. The edge of the probe card 442 can also protrude from the surface of the probe card 432 to the surface of the probe card 432. <曰, the probe card 4 Qiao Temple φ fly even the opposite bottom... "The needle card 2 should be able to spread the probe tip 442." to reach the required spacing from the top surface of the wafer 400. 2 with a probe card When the detecting operation is performed 432, the bottom of the wafer is contacted with the bottom of the probe 442, and the top surface of the wafer is torn away from the tip of the probe. The detecting station further drives the crystal. Round and/or] 5 1255520 probe card 432 - overtravel distance Z2, making the two more near. This process will flatten the convexity 420 with a 问 or 咼, and at least the height Η 2 ( Η2 = Η_Ζ2) convex body 422, etc. The deformed convex bodies 424 and 426 thus formed will become the same twist Η2 more uniformly. Therefore, the tops of the convex bodies 424 and 426 will be compared with the original 5 body 420 and 422 has a better planarity, and this preferred planarity enhances the overall robustness of the matte at the point of attachment of the flip-chip package or the wafer containing the probe device to the on-board member. In an embodiment of the present invention, the probe card 432 can be the same interconnecting substrate (such as the interconnecting substrate 22 in FIG. 2), which will be used for the element 10 after testing. The inverted I chip package of the device, and the probe tip 442 can be soldered to the protrusions 424 and 426 and the like like the contact pads, for example, when the device is electrically connected to the interposer substrate of the I chip package. Alternatively, the probe card 432 may comprise a semiconductor probe device that is identical to the device under test, or that has at least a contact pad pattern that matches the component under test. The row distance Ζ2 must generally be at least sufficiently sufficient to form a low contact impedance at each of the terminals 424 and 426 for electrical testing of the component. Even a small overshoot distance Ζ2 (e.g., the minimum overshoot required for power testing) is typically It also causes flattening of the largest convex body, and improves the overall planarity of the convex bodies, so that the firmness of the mutual joints of the flip chip package can be improved. A larger amount of overshoot can be provided. The greater planarity is improved until the overtravel distance Ζ2 enables some flattening of all of the protrusions 42〇 and 422, etc., when the & 420 and 422 are at least partially planarized, The change in the planarity of the convex and 426 depends on The variation of the planarity and compliance of the needle tip M2. ' u 16 1255520 Figure 5A shows the distribution maps 510 and 520 of the heights of the protrusions before and after the inspection. In this example, the convexity caused by the process The height and width of the body are both about 90μηι, but there are some differences that make a few protrusions up to 105 μΐΉ or less than 75μηι. In the detection process of this example, the crystal 5 circle and the probe card will be driven. The average spacing between the wafer and the bottom of the probe tip is about 80 μm. When the probe card is extracted, the distribution curve 520 will include a convex body that is higher and shorter than 80 μm because of tolerance and The short terminal 422 is only elastically deformed. Fig. 5 is a diagram showing the heights of the convex bodies of another example before and after the detection of the distribution curves 530 and 540. Prior to the sensing operation, the average height of the projections was approximately 88 μm and the shortest projection height was approximately 82 μm. In the example of Figure 5, the test operation drives the wafer and probe card until the average spacing between the wafer and the bottom of the probe tip is less than two degrees from the shortest protrusion before detection. As a result, when the probe card is withdrawn, the height of all the protrusions 15 is as short as, or shorter than, the minimum convex height of the distribution curve 530 before detection. Therefore, the distribution curve 540 will contain a shorter convex height, but the range will be much narrower than the distribution curve 530, which indicates that the convexities will have improved planarity after detection. The overtravel distance Ζ2 used in the inspection also needs to be limited so as not to damage the element 20 because the compression of the projections 420 and 422 causes a destructive stress on the portion of the element 410 below it. The amount of stress caused is usually determined by the structure of the overhanging distance 及2 and the convex body 420. The projections 420 and 422 are made of a malleable material, such as a lead or fusible flux, which is non-elastically deformable without stressing to damage the underlying typical semiconductor component structure. Contains lower ductility of the 7 lower layer Z2. A stiff structure of a crucible or rut, such as a convex body of a copper column, can only allow a small amount of overtravel distance to be selected for the overtravel distance due to the turbulence/flattening operation before the risk of damage is too great. Another test of Z2 requires a larger deformation profile of 4 protrusions. The specific energy can form a good electrical contact. The flattening and scoop overtravel distance will provide a flat area for the diagnosis of t on the top surfaces of the convex bodies 424 and 426. The flat area to be attached to the top of the contact body of the interconnecting substrate will be moved into contact with the 10 sputum, I and 2 swells on the interconnecting substrate. The 重-heavy flow program will at least partially liquefy the spheroidal solder bumps which tend to deform themselves - less 'surface tension' during the process. Therefore, the planarized solder balls naturally extend toward the interconnected wafers in the reflow. 15 The adjustment of the top of the 垣, convex (8) gamma and 422 is not limited to the flat body: the top surface. The scales 42Q and 422 can also be printed as any 444 equal extensions. The probe card 434 has a probe tip diameter. = + protruding on the surface of the probe card 434, to the convex = 仏 needle tip 444 can be, for example, a 9 〇 μ1 Ώ ι #_ _ see, and the diameter of the convex body about 忒 奴 奴 针 针 444 can be used - The semiconductor component material is provided with the probe card 43 (4). ^ Interconnecting the substrate or 20 When the detection process, the lion 44 will cause a +canned page on the smaller convexity, and the flattened area of the convex 426 will be the area of the probing foot. . However, the probe tip 444 will be on the top surface of the ^_42 (four) heart. When the resulting pocket is not too narrow or too deep enough to retard contaminants such as emulsions or soldering aids, the recessed surfaces are acceptable for the process of 18 1255520 bases contributing to the component and the convex The alignment of the body joint welding ^ and the natural expansion of the bad ball in the heavy flow process, the H private 忒 变形 deformation deformation "quot; the firmness of the bad connection will be enhanced. The test of the h map is set to 3 〇〇, the probe of the needle tip of the # 之 has the structure of the invention, or is a complex person - the single-to-one knot of the probe tip of the temple is easily unloaded The part containing the probe tips in (4) can be accommodated in the drawing of the present invention - the actual card _ contains - the substrate d wood card _. The needle 10 15 substrate 610 can be a printed and embossed (four) finder. The mm千# board' ^ is made of an insulating material, and the upper sigh is sighed. ^ Figure does not, the temple conductive line 620 will == 63G electric connection threat _, which will lead to the hard board (10) connected to the lightning touch on one side of the wooden needle - _, ,,,, (not yet ). The probe tips 630, such as the 6th Ββ flat, cannot be carefully fabricated into flat-top metal projections or stubs on the pads of the conductive traces. Alternatively, the interface portions of the conductive traces 620 may also form probe tips as described above. In any case, the probe tips will provide a flat, non-conforming surface that can be used to improve the planarity of the component terminals when wafer inspection. The integrated probe card has the advantage that the connection between the device under test and the probe tip, probe tip 630, conductive traces (four), vias (10), etc. can be optimized to provide minimal interference resistance. It is important to have a sensitive circuit or a high test, but the probe tip 63 that is fixed to the substrate 610 can only be used to test - an element having a terminal that matches the pattern of the probe tip 63. When the test equipment begins to test another component or if the probe tip 63 is damaged, then the entire 19 1255520 probe card 600 needs to be replaced. Fig. 7A shows a probe card 7A according to an embodiment of the present invention which can quickly change the probe tip to minimize the downtime of the test equipment. The probe card 7A includes a first substrate 710, a socket 75A, and a second substrate 76A. The base 5 plate 760 can be nested into the socket 750 and has a fixed probe tip 730. The socket 750 is disposed on the substrate 710, and when the substrate 76 is nested in the socket 75, the conductive line 720 or the like in the substrate 710 electrically connects the substrate 76 to the through hole, which leads to the test head. None (not shown). Therefore, the probe tip is electrically connected to the test device via the substrate 760, the socket 75, the conductive line 72, the through hole 74, and the electrical contacts (not shown) on the back surface of the substrate 10. The substrates 710 and 760 can be fabricated using conventional printed circuit technology, and in the embodiment of the invention, the substrate 76 is similar to a mutual use in a flip chip package of the device under test. Connect the substrate. The socket 75 can be any type of socket that can accommodate or provide electrical contacts to the substrate. In the example shown in Fig. 7B, the socket 75 has an interface 725' at the end of each of the conductive traces 72, which is matched and electrically connected to a terminal (not shown) on the bottom surface of the substrate. A pivoting clip holds the substrate 760 in place. 7C, the substrate of the modified embodiment can be fixed in the socket, and the substrate 765 is different from the substrate 76. The substrate is provided with a semiconductor device 77, which is provided thereon. Probe tip. The top of the semiconductor device is in turn disposed on a printed circuit board that can be placed over the socket 7_, and has terminals (not shown) that contact the pads 725 at the ends of the respective lines 72. The advantage of this probe card is that the substrate 76 can be replaced or the substrate 710 can remain attached to the test equipment. The substrate 760 or 20 1255520 765 can be, for example, released and removed from the socket 750 without the need for complicated disassembly, so that the substrate 760 or 765 is to be modified to have different terminal patterns (eg, die reduction). At the time of the component, or when the probe tip 730 is damaged, it will be possible to quickly replace a new substrate. 10 15 20 Electrical testing and testing of a wafer at extreme temperatures sometimes needs to be used to identify and eliminate unreliable components.收 Separate or classify components by performance or specification standards, or to distinguish components for specific operating temperatures or conditions of use. One of the advantages of a probe card having a hard probe tip without a suspension rod or spring pin is that it improves its thermal stability. Changes in temperature, such as the addition of a constant temperature test, can cause large variations in the conventional test ride pattern because the long pin and the temperature rise and appreciate. In contrast, the probe tips are: 敎, 伯, or swell with two relatively small interconnected substrates or semiconductor crystals. Moreover, when the probes are disposed on the _semiconductor die, and the == material is the same as or similar to the device under test, the thermal expansion will (4) be applied to the contact terminal «(4) on the component. The right temple is placed on a different material than the component under test, and the design is mechanically matched at a specific test temperature. The design will be included in the physical properties of the component. Coefficient of thermal expansion (CTE) Test temperature, etc.佝a , , " CTE of the magic wood card, and the card may not be able to match at the other level (such as room temperature) - the probe of the component 7_ test temperature (example or (four) ^ compare two: b, use and receive Different materials of the measuring element may cause open contact in this way. Therefore, in the case of the second probe 2 extreme, the component will be matched at a higher temperature. ★ Xiao can be designed in the 21 25 1255520 according to the invention. In one aspect, even if a probe does not contain the same material as the device under test, the pattern and size of the probe tip on the probe can be made to be compatible with a component over a wide temperature range. The terminals are properly contacted. Figures 8A and 8B illustrate that a probe 81 has a probe tip 811, 812, 5 813, etc., which is increased in size from the center of the probe 810 by distance. When it is to be detected, The center of the probe 810 is aligned with the center of a component 82. The eighth diagram shows how the 820 of the component 820 and the like are aligned at each of the first temperatures (e.g., room temperature). , 813. - "Standing temperature, the test will be carried out at a higher temperature (such as 120 C). As a result, the thermal expansion of the component 82〇 can be Can be different from the expansion of the probe 1 810, because their CTEs are different (for example, the CTE of a Xixi wafer printed circuit board will have the same *). Generally, the difference in expansion of the element 82 可 can be relative Each terminal 822' is moved by a corresponding probe tip 8U, 812, or 813 and its movement amount is proportional to the distance between the terminal milk and the center of the component. To compensate for the difference in the expansion, each tip pad is 812, 813. The dimensions 15 are made to extend beyond the positioning range of the corresponding terminal 822, so that even at the second temperature, the tips 8U, 812, 813 can remain aligned with the respective terminal milk. When the probe tips are set On a semiconductor probe device, the device has the problem of the difference between the device and the device under test, and the problem of the difference between the user and the device can be reduced or eliminated. Figure 9A shows a plan view of a probe, the basin contains a 2〇 The semiconductor die (10) is preferably made of a material to be tested. The contact pad on the semiconductor die 910 has a pattern identical to that of the device under test, or the die pad pattern. Including additional contact 塾^ line 922 is connected to the probe card Residual (not shown in the first lake) In one embodiment of the invention, the contact pad 920 or the like will use a mask 22 1255520 and/or a process which is the same as that used to make contact on the device under test. The die 91 is formed on the die 910. The die 91 can even be the same type of component as the device under test. If necessary, an additional line or interface 922 can be used in another process step. One or more additional pattern layers are formed to be applied to the die 9H). Alternatively, contact pads 92 and lines 922 may be part of the same patterned layer or interconnect structure. The slave needle tip 930 is attached to the contact pad 92〇. The probe tips 93 can be made using conventional projection techniques which are conventionally used to make projections or studs for flip chip bonding. Alternatively, the pads 92 can also serve as probes 10 and each of the protrusions 930 can be omitted. As previously mentioned, the probe tips are preferably made of a material such as copper which is more resilient than the top surface material on the terminals of the component under test. A single light process, chemical mechanical polishing (CMp), or any other precision treatment can flatten the probe tips (whether convex or not) to a south accuracy (eg, within 1 μπι). 15 The probe is detachably mounted on a probe card. As shown in FIG. 9 , in FIG. 9 , the 4 pin card 950 is provided with a socket 940 having electrical contacts 942 and the like, which are in the die 91 . The crucible is fixed in the socket 91, etc., and will contact each of the pads 922. Preferably, the socket 940 can be opened or removed to remove and load the die 910. When tested, the probe tip 930 on the die 91 is electrically connected to each of the contacts through the interfaces 920 20 and 922. Point 942 is electrically connected to the probe card 950 via the contacts 942 via the socket 940. The probe card 95 can be connected to the test equipment in the manner previously described in Figure 3. FIG. 9C illustrates a variation structure in which the die 91 is disposed on the top surface of a pCB or interconnect substrate 960, and a probe assembly includes a die 91 and a substrate 23 1255520 960, etc. The ground is mounted in a socket 942. In the illustrated embodiment, the connection, the line 924, and the like connect the pads on the top surface of the die 91 to the pads 962 on the interconnect substrate 96A. Alternatively, a tape connection or a flexible circuit connection can be used to electrically connect the pads 942 and the like to the substrate 96A. A line 5 (not shown) in the substrate 96A electrically connects the pads 962 and the like to the terminals on the bottom surface of the substrate 960, and the terminals 934 are electrically connected to the pads or lines on which the probe card is removed ( Not shown), and the electrical connection of the probe tip 93〇 to the probe card 952. The embodiment of Fig. 9c - the advantage is that the spacer 942 does not have an electrical contact, and the size can accommodate the interconnect substrate 960 which is typically larger than the semiconductor die 91 〇. In addition, the substrate 960 places the probe device 910 at a higher position than the probe card 952. The lack of structural features will make the socket 942 easier to manufacture than the socket 第 in the IXFig. Figure 9D shows another embodiment of the invention including a semiconductor probe device 915. The probe device 915 differs from the probe device of the drawings in that the electrical terminal 934 of the probe device 915 is attached to the bottom surface of the probe device. More specifically, the probe device 915 includes a contact pad 920 and a probe tip = 0 and the like on the top surface. Conductive vias 934 and the like are connected to the contact sag and pass through the semiconductor die to electrically connect the contact pads 92() to the contact pads 926 on the bottom surface of the probe card 915. 20 - a method for manufacturing the probe 915, performing a laser drill
孔，定向蝴例如深離伟刻，或任何高縱橫比賴刻法: 來在各接墊920的區域造成孔洞貫穿該半導體晶粒。該等貫 穿嗣會被填滿-種導電填充材料，例如在呂、銅、鎢或導電 樹脂等。或者軌934亦可藉深離子植人法或其它摻雜製Z 24 1255520 來形成。接觸墊920與探針梢93時嗣可被製設在導電通孔 934頂上，时接㈣926及端子州制可被製設在導電通 孔934底下。接觸墊92〇通常會具有與接觸塾咖及受測元件 上之接觸墊等相同的圖案。同樣地，探針梢93〇和端子挪 5亦可使用相同的凸體製程來製成。 一插座944會將該探針裝置915固持定位，而使各端子 936接觸一探針卡954上匹配的接觸墊（未示出最好是，該 插座944係被製成可使該半導體探針裝置915在損壞時，或 當要重整測試設備來測試一不同類型的元件時，能夠被卸 10 除及更換。 第9E圖不出本發明之一實施例，其中該探針裝置915 係連接於一印刷電路板或一互接基板966，而不直接來接觸 探針卡952。在本例中，端子936最好包含桿劑或其它材 料，其能被使用於一焊劑重流製程，而將該探針裝置915固 15接於基板966。該插座942可被設成能可卸地固持該基板 966。由於在楝針裝置915上的端子93 6典型會與受測元件上 的觸點具有相同的圖案，故該基板966乃可完全相同於用來 供受測元件作倒裝晶片封裝的基板。 雖本發明已參照特定實施例來說明如上，惟所述僅為 20本發明的用途之例，而不應被作為限制。所揭實施例之各 種特徵的調變和組合皆包含於以下申請專利範圍所界定之 本發明的範轉内。 【圖式簡單說明】 第1圖示出用來檢測晶圓的習知測試設備。 25 1255520 第2圖示出一習知的倒裝晶片封裝體，其具有瑕疵是由 於測試和不均一的焊接凸體所造成者。 第3圖示出本發明之_實施例的晶圓檢測設備。 第4 A圖示出一組金屬凸體在晶圓檢測之前的狀態。 5 第4B、4C、4D圖示出第4A圖中的金屬凸體在使用本發 明各變化實施例的探針梢來作晶圓檢測之後的狀態。 第5A及5B圖示出在本發明一實施例的晶圓檢測程序 之剷及之後，受測元件的凸體高度分佈圖。 第6A與6B圖為本發明一實施例之探針卡的立體圖，其 10 具有整合的金屬設在接墊探針上。 第7A、7B及7C圖示出本發明一實施例之探針卡的立體 圖，其中探針梢係設在可更換的探針總成上。 第8A及8B圖示出-探針卡可在―溫度範圍内保持對 準一受測元件。 15 帛9A、9B ' 9C、9D、9E圖係示出使用本發明各變化 實施例之半導體探針裝置的檢測系統。 【圖式之主要元件代表符號表】 100…測試設備 110…晶圓 112…受測元件，積體電路元件 114，822，932，964···端子 120…測試板 124…銷針 130…測試頭 26 1255520 140···測試裝置 200···倒裝晶片封裝體 210，910…晶粒 216，425···凹痕 220，960，966…互接基材板 222···外部端子 224，725，920，926，962…接墊 300···測試系統 310···自動測試設備(ATE) 320···測試頭 330，430，432，434，600，700，950，952，954···探針卡 340，440，442，444，630，730，811，812，813，930···探針梢 350···晶圓盤 360…檢測枱 400，820···元件 410，610，710，760，765···基板 420，422···凸體 424，426…變形凸體 510，530···凸體高度分佈曲線(測試前） 520，540…凸體高度分佈曲線(測試後） 620，720，922…導電線路 640，740，934···通孔 750，940，942，944···插座 770…半導體裝置 27 1255520 780···印刷電路板 810，900，915…探針 924…連結線 942···電觸點The holes, orienting, for example, deep away from the etch, or any high aspect ratio etch: to create holes in the area of each of the pads 920 through the semiconductor die. These passes will be filled with a conductive filler such as lyon, copper, tungsten or a conductive resin. Alternatively, the rail 934 can be formed by deep ion implantation or other doping Z 24 1255520. The contact pad 920 and the probe tip 93 can be formed on top of the conductive via 934, and the timing (4) 926 and the terminal state can be formed under the conductive via 934. The contact pads 92A typically have the same pattern as the contact pads and contact pads on the device under test. Similarly, the probe tip 93〇 and the terminal extension 5 can also be made using the same convex process. A socket 944 holds the probe device 915 in place, with each terminal 936 contacting a matching contact pad on a probe card 954 (not shown, preferably, the socket 944 is formed to enable the semiconductor probe When the device 915 is damaged, or when the test device is to be reformed to test a different type of component, it can be removed and replaced. Figure 9E illustrates an embodiment of the present invention in which the probe device 915 is connected. The printed circuit board or an interconnecting substrate 966 does not directly contact the probe card 952. In this example, the terminal 936 preferably contains a rod or other material that can be used in a flux reflow process. The probe device 915 is affixed to the substrate 966. The socket 942 can be configured to removably hold the substrate 966. Since the terminal 936 on the stylus device 915 typically contacts the device under test. Having the same pattern, the substrate 966 can be identical to the substrate used for the flip-chip package of the device under test. Although the invention has been described above with reference to the specific embodiments, only the use of the invention is only 20 An example should not be taken as a limitation. Modulations and combinations of various features of the embodiments are included in the scope of the invention as defined by the following claims. [Simplified Schematic] Figure 1 shows a conventional test apparatus for detecting wafers. 1255520 Fig. 2 shows a conventional flip chip package having defects due to testing and non-uniform solder bumps. Fig. 3 shows a wafer detecting apparatus of the embodiment of the present invention. Figure 4A shows the state of a set of metal bumps prior to wafer inspection. 5 Figures 4B, 4C, 4D illustrate the metal bumps of Figure 4A using the probe tips of various variant embodiments of the present invention. The state after the wafer inspection is performed. FIGS. 5A and 5B are diagrams showing the height distribution of the convexity of the device under test after the shovel of the wafer inspection program according to an embodiment of the present invention. FIGS. 6A and 6B are diagrams of the present invention. A perspective view of a probe card of an embodiment, wherein 10 has an integrated metal disposed on the patch probe. Figures 7A, 7B, and 7C illustrate perspective views of a probe card in accordance with an embodiment of the present invention, wherein the probe tip is provided On the replaceable probe assembly. Figures 8A and 8B illustrate - the probe card can be The temperature is kept in alignment with a device under test. 15 帛9A, 9B '9C, 9D, 9E are diagrams showing a detection system using a semiconductor probe device according to various modified embodiments of the present invention. Table 100: Test Equipment 110... Wafer 112... Tested Components, Integrated Circuit Components 114, 822, 932, 964· Terminal 120... Test Board 124... Pins 130... Test Head 26 1255520 140···Test Device 200···Flip chip package 210, 910... dies 216, 425··dentations 220, 960, 966... interconnecting substrate plate 222··· external terminals 224, 725, 920, 926, 962 ...strap 300···Test System 310···Automatic Test Equipment (ATE) 320···Test Head 330,430,432,434,600,700,950,952,954···Probe Card 340, 440, 442, 444, 630, 730, 811, 812, 813, 930 · probe tip 350 · · wafer tray 360 ... inspection station 400, 820 · · components 410, 610, 710, 760, 765 ···Substrate 420, 422··· convex body 424, 426... deformation convex body 510, 530··· convex height distribution curve (before test) 520, 540... convex height distribution Line (after test) 620, 720, 922... Conductive lines 640, 740, 934 · Through holes 750, 940, 942, 944 · Socket 770... Semiconductor device 27 1255520 780 · · · Printed circuit board 810, 900 , 915...probe 924...link line 942···electrical contact