TWI223434B - Semiconductor integrated circuit device and its manufacturing method - Google Patents

Semiconductor integrated circuit device and its manufacturing method Download PDF

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Publication number
TWI223434B
TWI223434B TW091108115A TW91108115A TWI223434B TW I223434 B TWI223434 B TW I223434B TW 091108115 A TW091108115 A TW 091108115A TW 91108115 A TW91108115 A TW 91108115A TW I223434 B TWI223434 B TW I223434B
Authority
TW
Taiwan
Prior art keywords
misfet
separation
gate
threshold voltage
relatively
Prior art date
Application number
TW091108115A
Other languages
English (en)
Chinese (zh)
Inventor
Kousuke Ishibashi
Yasuo Sonobe
Yasushi Tainaka
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Application granted granted Critical
Publication of TWI223434B publication Critical patent/TWI223434B/zh

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/791Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • H10D30/795Arrangements for exerting mechanical stress on the crystal lattice of the channel regions being in lateral device isolation regions, e.g. STI
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76229Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0128Manufacturing their channels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0151Manufacturing their isolation regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Element Separation (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
TW091108115A 2001-06-05 2002-04-19 Semiconductor integrated circuit device and its manufacturing method TWI223434B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001169631A JP2002368080A (ja) 2001-06-05 2001-06-05 半導体集積回路装置およびその製造方法

Publications (1)

Publication Number Publication Date
TWI223434B true TWI223434B (en) 2004-11-01

Family

ID=19011679

Family Applications (1)

Application Number Title Priority Date Filing Date
TW091108115A TWI223434B (en) 2001-06-05 2002-04-19 Semiconductor integrated circuit device and its manufacturing method

Country Status (3)

Country Link
JP (1) JP2002368080A (enExample)
TW (1) TWI223434B (enExample)
WO (1) WO2002099872A1 (enExample)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004075295A1 (ja) * 2003-02-19 2004-09-02 Hitachi, Ltd. 半導体集積回路装置
JP4504633B2 (ja) 2003-05-29 2010-07-14 パナソニック株式会社 半導体集積回路装置
JP4608901B2 (ja) * 2004-02-09 2011-01-12 ソニー株式会社 半導体装置
CN1684246B (zh) 2004-03-30 2010-05-12 三星电子株式会社 低噪声和高性能电路以及制造方法
KR100541656B1 (ko) * 2004-08-03 2006-01-11 삼성전자주식회사 성능이 향상된 cmos 소자 및 그 제조 방법
JP4936418B2 (ja) * 2005-05-17 2012-05-23 ルネサスエレクトロニクス株式会社 半導体装置とその製造方法、及び半導体装置の設計プログラム
JP2007012855A (ja) * 2005-06-30 2007-01-18 Matsushita Electric Ind Co Ltd 半導体集積回路、標準セル、標準セルライブラリ、半導体集積回路の設計方法および半導体集積回路の設計装置
US7259393B2 (en) * 2005-07-26 2007-08-21 Taiwan Semiconductor Manufacturing Co. Device structures for reducing device mismatch due to shallow trench isolation induced oxides stresses
JP5091462B2 (ja) * 2006-01-19 2012-12-05 パナソニック株式会社 セルおよび半導体装置
JP5096719B2 (ja) * 2006-09-27 2012-12-12 パナソニック株式会社 回路シミュレーション方法及び回路シミュレーション装置
JP2009021482A (ja) * 2007-07-13 2009-01-29 Nec Electronics Corp 半導体集積回路の自動レイアウト装置及びプログラム
JP2009026829A (ja) * 2007-07-17 2009-02-05 Nec Electronics Corp 半導体集積回路の設計方法及びマスクデータ作成プログラム
JP5292005B2 (ja) * 2008-07-14 2013-09-18 ルネサスエレクトロニクス株式会社 半導体集積回路
JP5464761B2 (ja) * 2011-12-19 2014-04-09 ルネサスエレクトロニクス株式会社 半導体装置とその製造方法、及び半導体装置の設計プログラム
KR101974439B1 (ko) 2012-06-11 2019-05-02 삼성전자 주식회사 반도체 장치 및 그 제조 방법

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0828473B2 (ja) * 1988-09-29 1996-03-21 三菱電機株式会社 半導体装置およびその製造方法
JPH02153574A (ja) * 1989-05-24 1990-06-13 Hitachi Ltd 半導体集積回路装置の製造法
JPH0463437A (ja) * 1990-07-02 1992-02-28 Mitsubishi Electric Corp 半導体集積回路装置
JPH10242420A (ja) * 1997-02-27 1998-09-11 Toshiba Corp 半導体装置およびその製造方法
JP3519579B2 (ja) * 1997-09-09 2004-04-19 株式会社ルネサステクノロジ 半導体装置及びその製造方法
JP3615046B2 (ja) * 1998-03-23 2005-01-26 株式会社東芝 不揮発性半導体記憶装置

Also Published As

Publication number Publication date
JP2002368080A (ja) 2002-12-20
WO2002099872A1 (en) 2002-12-12

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