JP2002368080A - 半導体集積回路装置およびその製造方法 - Google Patents

半導体集積回路装置およびその製造方法

Info

Publication number
JP2002368080A
JP2002368080A JP2001169631A JP2001169631A JP2002368080A JP 2002368080 A JP2002368080 A JP 2002368080A JP 2001169631 A JP2001169631 A JP 2001169631A JP 2001169631 A JP2001169631 A JP 2001169631A JP 2002368080 A JP2002368080 A JP 2002368080A
Authority
JP
Japan
Prior art keywords
misfet
active region
element isolation
integrated circuit
circuit device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001169631A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002368080A5 (enExample
Inventor
Kyosuke Ishibashi
亨介 石橋
Yasuo Sonobe
泰夫 園部
Yasushi Tainaka
靖 田井中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2001169631A priority Critical patent/JP2002368080A/ja
Priority to PCT/JP2002/003944 priority patent/WO2002099872A1/ja
Priority to TW091108115A priority patent/TWI223434B/zh
Publication of JP2002368080A publication Critical patent/JP2002368080A/ja
Publication of JP2002368080A5 publication Critical patent/JP2002368080A5/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/791Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • H10D30/795Arrangements for exerting mechanical stress on the crystal lattice of the channel regions being in lateral device isolation regions, e.g. STI
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76229Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0128Manufacturing their channels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0151Manufacturing their isolation regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Element Separation (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
JP2001169631A 2001-06-05 2001-06-05 半導体集積回路装置およびその製造方法 Pending JP2002368080A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2001169631A JP2002368080A (ja) 2001-06-05 2001-06-05 半導体集積回路装置およびその製造方法
PCT/JP2002/003944 WO2002099872A1 (en) 2001-06-05 2002-04-19 Semiconductor integrated circuit device and its production method
TW091108115A TWI223434B (en) 2001-06-05 2002-04-19 Semiconductor integrated circuit device and its manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001169631A JP2002368080A (ja) 2001-06-05 2001-06-05 半導体集積回路装置およびその製造方法

Related Child Applications (2)

Application Number Title Priority Date Filing Date
JP2006037348A Division JP2006140539A (ja) 2006-02-15 2006-02-15 半導体集積回路装置の製造方法
JP2008208587A Division JP2009004800A (ja) 2008-08-13 2008-08-13 半導体集積回路装置

Publications (2)

Publication Number Publication Date
JP2002368080A true JP2002368080A (ja) 2002-12-20
JP2002368080A5 JP2002368080A5 (enExample) 2006-03-30

Family

ID=19011679

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001169631A Pending JP2002368080A (ja) 2001-06-05 2001-06-05 半導体集積回路装置およびその製造方法

Country Status (3)

Country Link
JP (1) JP2002368080A (enExample)
TW (1) TWI223434B (enExample)
WO (1) WO2002099872A1 (enExample)

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004075295A1 (ja) * 2003-02-19 2004-09-02 Hitachi, Ltd. 半導体集積回路装置
JP2005223235A (ja) * 2004-02-09 2005-08-18 Sony Corp 半導体装置
JP2005286341A (ja) * 2004-03-30 2005-10-13 Samsung Electronics Co Ltd 低ノイズ及び高性能のlsi素子、レイアウト及びその製造方法
JP2006049903A (ja) * 2004-08-03 2006-02-16 Samsung Electronics Co Ltd 性能が向上されたcmos素子及びその製造方法
JP2006324360A (ja) * 2005-05-17 2006-11-30 Nec Electronics Corp 半導体装置とその製造方法、及び半導体装置の設計プログラム
JP2007012855A (ja) * 2005-06-30 2007-01-18 Matsushita Electric Ind Co Ltd 半導体集積回路、標準セル、標準セルライブラリ、半導体集積回路の設計方法および半導体集積回路の設計装置
JP2007036194A (ja) * 2005-07-26 2007-02-08 Taiwan Semiconductor Manufacturing Co Ltd デバイス性能の不整合低減方法および半導体回路
JP2007221095A (ja) * 2006-01-19 2007-08-30 Matsushita Electric Ind Co Ltd セルおよび半導体装置
US7276769B2 (en) 2003-05-29 2007-10-02 Matsushita Electric Industrial Co., Ltd. Semiconductor integrated circuit device
JP2008085030A (ja) * 2006-09-27 2008-04-10 Matsushita Electric Ind Co Ltd 回路シミュレーション方法及び回路シミュレーション装置
JP2009021482A (ja) * 2007-07-13 2009-01-29 Nec Electronics Corp 半導体集積回路の自動レイアウト装置及びプログラム
JP2009026829A (ja) * 2007-07-17 2009-02-05 Nec Electronics Corp 半導体集積回路の設計方法及びマスクデータ作成プログラム
JP2010021469A (ja) * 2008-07-14 2010-01-28 Nec Electronics Corp 半導体集積回路
JP2012094887A (ja) * 2011-12-19 2012-05-17 Renesas Electronics Corp 半導体装置とその製造方法、及び半導体装置の設計プログラム
US9240408B2 (en) 2012-06-11 2016-01-19 Samsung Electronics Co., Ltd. Integrated circuit device with transistors having different threshold voltages

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0828473B2 (ja) * 1988-09-29 1996-03-21 三菱電機株式会社 半導体装置およびその製造方法
JPH02153574A (ja) * 1989-05-24 1990-06-13 Hitachi Ltd 半導体集積回路装置の製造法
JPH0463437A (ja) * 1990-07-02 1992-02-28 Mitsubishi Electric Corp 半導体集積回路装置
JPH10242420A (ja) * 1997-02-27 1998-09-11 Toshiba Corp 半導体装置およびその製造方法
JP3519579B2 (ja) * 1997-09-09 2004-04-19 株式会社ルネサステクノロジ 半導体装置及びその製造方法
JP3615046B2 (ja) * 1998-03-23 2005-01-26 株式会社東芝 不揮発性半導体記憶装置

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004075295A1 (ja) * 2003-02-19 2004-09-02 Hitachi, Ltd. 半導体集積回路装置
US7276769B2 (en) 2003-05-29 2007-10-02 Matsushita Electric Industrial Co., Ltd. Semiconductor integrated circuit device
JP2005223235A (ja) * 2004-02-09 2005-08-18 Sony Corp 半導体装置
US8816440B2 (en) 2004-03-30 2014-08-26 Samsung Electronics Co., Ltd. Low noise and high performance LSI device
JP2005286341A (ja) * 2004-03-30 2005-10-13 Samsung Electronics Co Ltd 低ノイズ及び高性能のlsi素子、レイアウト及びその製造方法
US9899386B2 (en) 2004-03-30 2018-02-20 Samsung Electronics Co., Ltd. Low noise and high performance LSI device
US9425182B2 (en) 2004-03-30 2016-08-23 Samsung Electronics Co., Ltd. Low noise and high performance LSI device
US9093306B2 (en) 2004-03-30 2015-07-28 Samsung Electronics Co., Ltd. Low noise and high performance LSI device
JP2006049903A (ja) * 2004-08-03 2006-02-16 Samsung Electronics Co Ltd 性能が向上されたcmos素子及びその製造方法
JP2006324360A (ja) * 2005-05-17 2006-11-30 Nec Electronics Corp 半導体装置とその製造方法、及び半導体装置の設計プログラム
JP2007012855A (ja) * 2005-06-30 2007-01-18 Matsushita Electric Ind Co Ltd 半導体集積回路、標準セル、標準セルライブラリ、半導体集積回路の設計方法および半導体集積回路の設計装置
US8261225B2 (en) 2005-06-30 2012-09-04 Panasonic Corporation Semiconductor integrated circuit, standard cell, standard cell library, semiconductor integrated circuit designing method, and semiconductor integrated circuit designing equipment
JP2007036194A (ja) * 2005-07-26 2007-02-08 Taiwan Semiconductor Manufacturing Co Ltd デバイス性能の不整合低減方法および半導体回路
JP2007221095A (ja) * 2006-01-19 2007-08-30 Matsushita Electric Ind Co Ltd セルおよび半導体装置
JP2008085030A (ja) * 2006-09-27 2008-04-10 Matsushita Electric Ind Co Ltd 回路シミュレーション方法及び回路シミュレーション装置
JP2009021482A (ja) * 2007-07-13 2009-01-29 Nec Electronics Corp 半導体集積回路の自動レイアウト装置及びプログラム
JP2009026829A (ja) * 2007-07-17 2009-02-05 Nec Electronics Corp 半導体集積回路の設計方法及びマスクデータ作成プログラム
JP2010021469A (ja) * 2008-07-14 2010-01-28 Nec Electronics Corp 半導体集積回路
JP2012094887A (ja) * 2011-12-19 2012-05-17 Renesas Electronics Corp 半導体装置とその製造方法、及び半導体装置の設計プログラム
US9240408B2 (en) 2012-06-11 2016-01-19 Samsung Electronics Co., Ltd. Integrated circuit device with transistors having different threshold voltages

Also Published As

Publication number Publication date
WO2002099872A1 (en) 2002-12-12
TWI223434B (en) 2004-11-01

Similar Documents

Publication Publication Date Title
EP0749165B1 (en) Thin film transistor in insulated semiconductor substrate and manufacturing method thereof
KR100523310B1 (ko) 반도체 장치
US6855581B2 (en) Method for fabricating a high-voltage high-power integrated circuit device
US20070126034A1 (en) Semiconductor substrate, semiconductor device and process for producing semiconductor substrate
US20060027877A1 (en) Semiconductor device with triple-well region
KR100397096B1 (ko) 반도체 장치 및 그 제조 방법
JP2002368080A (ja) 半導体集積回路装置およびその製造方法
JP5762687B2 (ja) 所望のドーパント濃度を実現するためのイオン注入法
US7166901B2 (en) Semiconductor device
US6307224B1 (en) Double diffused mosfet
JP2001156290A (ja) 半導体装置
KR20070072928A (ko) 반도체 장치 및 그 제조 방법
JP2009004800A (ja) 半導体集積回路装置
JP2010177292A (ja) 半導体装置及び半導体装置の製造方法
JPH10107280A (ja) 半導体集積回路装置およびその製造方法
KR100331844B1 (ko) 씨모스소자
JP2021153163A (ja) 半導体装置の製造方法、および半導体装置
JP2006140539A (ja) 半導体集積回路装置の製造方法
JP4922623B2 (ja) 半導体装置およびその製造方法
JP2001345430A (ja) 半導体集積回路装置およびその製造方法
JP2004047844A (ja) 半導体装置およびその製造方法
KR100318463B1 (ko) 몸체접촉실리콘이중막소자제조방법
US7005712B2 (en) Method for manufacturing a semiconductor device
JP2000058673A (ja) トレンチ分離構造を有する半導体装置
US6753573B2 (en) Semiconductor device having complementary MOS transistor

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20041013

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20041013

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20060215

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20080624

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20080813

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20090324