TW557568B - Semiconductor integrated circuit device and method of manufacturing the same - Google Patents

Semiconductor integrated circuit device and method of manufacturing the same Download PDF

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Publication number
TW557568B
TW557568B TW089111653A TW89111653A TW557568B TW 557568 B TW557568 B TW 557568B TW 089111653 A TW089111653 A TW 089111653A TW 89111653 A TW89111653 A TW 89111653A TW 557568 B TW557568 B TW 557568B
Authority
TW
Taiwan
Prior art keywords
film
silicon film
silicon
manufacturing
heat treatment
Prior art date
Application number
TW089111653A
Other languages
English (en)
Chinese (zh)
Inventor
Shinpei Iijima
Satoshi Yamamoto
Jun Kuroda
Hiroshi Miki
Yoshihisa Fujisaki
Original Assignee
Hitachi Ltd
Hitachi Ulsi System Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Ulsi System Co Ltd filed Critical Hitachi Ltd
Application granted granted Critical
Publication of TW557568B publication Critical patent/TW557568B/zh

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00Resistors, capacitors or inductors
    • H10D1/60Capacitors
    • H10D1/68Capacitors having no potential barriers
    • H10D1/692Electrodes
    • H10D1/711Electrodes having non-planar surfaces, e.g. formed by texturisation
    • H10D1/712Electrodes having non-planar surfaces, e.g. formed by texturisation being rough surfaces, e.g. using hemispherical grains
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/09Manufacture or treatment with simultaneous manufacture of the peripheral circuit region and memory cells
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H10B12/315DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor with the capacitor higher than a bit line

Landscapes

  • Semiconductor Memories (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
TW089111653A 1999-07-06 2000-06-14 Semiconductor integrated circuit device and method of manufacturing the same TW557568B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11192009A JP2001024165A (ja) 1999-07-06 1999-07-06 半導体装置およびその製造方法ならびに半導体製造装置

Publications (1)

Publication Number Publication Date
TW557568B true TW557568B (en) 2003-10-11

Family

ID=16284096

Family Applications (1)

Application Number Title Priority Date Filing Date
TW089111653A TW557568B (en) 1999-07-06 2000-06-14 Semiconductor integrated circuit device and method of manufacturing the same

Country Status (4)

Country Link
US (1) US6632721B1 (enExample)
JP (1) JP2001024165A (enExample)
KR (1) KR20010029868A (enExample)
TW (1) TW557568B (enExample)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003037172A (ja) * 2001-07-23 2003-02-07 Niigata Seimitsu Kk アナログ・デジタル混載集積回路
KR100399940B1 (ko) * 2001-12-29 2003-09-29 주식회사 하이닉스반도체 반도체 메모리 소자의 캐패시터 제조방법
US7189606B2 (en) * 2002-06-05 2007-03-13 Micron Technology, Inc. Method of forming fully-depleted (FD) SOI MOSFET access transistor
KR100520600B1 (ko) * 2003-02-17 2005-10-10 주식회사 하이닉스반도체 반도체소자의 캐패시터 제조방법
KR100681274B1 (ko) * 2004-11-25 2007-02-09 삼성전자주식회사 커패시터 및 그 제조 방법
JP2006324363A (ja) * 2005-05-17 2006-11-30 Elpida Memory Inc キャパシタおよびその製造方法
US8189376B2 (en) * 2008-02-08 2012-05-29 Micron Technology, Inc. Integrated circuit having memory cells including gate material having high work function, and method of manufacturing same
CN102222606B (zh) * 2010-04-14 2014-06-04 中芯国际集成电路制造(上海)有限公司 一种电容的形成方法
US8642440B2 (en) 2011-10-24 2014-02-04 International Business Machines Corporation Capacitor with deep trench ion implantation
EP2809823A1 (en) * 2012-01-30 2014-12-10 First Solar, Inc Method and apparatus for producing a transparent conductive oxide

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11150249A (ja) * 1997-11-16 1999-06-02 Anelva Corp 凹凸状ポリシリコン層の形成方法及びこの方法の実施に使用される基板処理装置並びに半導体メモリデバイス
JPH06314774A (ja) 1993-04-28 1994-11-08 Oki Electric Ind Co Ltd 半導体装置の製造方法
JPH0786434A (ja) 1993-09-17 1995-03-31 Oki Electric Ind Co Ltd 半導体装置の製造方法
KR0168770B1 (ko) * 1994-11-24 1999-01-15 김주용 조대한 입자구조의 폴리실리콘 박막을 갖는 반도체 소자 제조 방법
US5639685A (en) * 1995-10-06 1997-06-17 Micron Technology, Inc. Semiconductor processing method of providing a conductively doped layer of hemispherical grain polysilicon
US6069053A (en) * 1997-02-28 2000-05-30 Micron Technology, Inc. Formation of conductive rugged silicon
US6197653B1 (en) * 1997-03-27 2001-03-06 Texas Instruments Incorporated Capacitor and memory structure and method
US6218260B1 (en) * 1997-04-22 2001-04-17 Samsung Electronics Co., Ltd. Methods of forming integrated circuit capacitors having improved electrode and dielectric layer characteristics and capacitors formed thereby
JPH1140763A (ja) * 1997-07-15 1999-02-12 Nec Corp 半導体装置の製造方法
KR100486215B1 (ko) * 1997-10-22 2006-04-28 삼성전자주식회사 미세한굴곡이형성된하부전극을구비한반도체장치의커패시터제조방법
JP3542704B2 (ja) * 1997-10-24 2004-07-14 シャープ株式会社 半導体メモリ素子
JP2000012783A (ja) * 1998-06-22 2000-01-14 Nippon Asm Kk 半導体素子の製造方法
US5913119A (en) * 1998-06-26 1999-06-15 Vanguard Int Semiconduct Corp Method of selective growth of a hemispherical grain silicon layer on the outer sides of a crown shaped DRAM capacitor structure
US6177696B1 (en) * 1998-08-13 2001-01-23 International Business Machines Corporation Integration scheme enhancing deep trench capacitance in semiconductor integrated circuit devices
JP3242901B2 (ja) * 1999-06-18 2001-12-25 日本エー・エス・エム株式会社 半導体形成方法及び装置

Also Published As

Publication number Publication date
JP2001024165A (ja) 2001-01-26
KR20010029868A (ko) 2001-04-16
US6632721B1 (en) 2003-10-14

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