TW550826B - Non-volatile semiconductor memory device and manufacturing method thereof - Google Patents

Non-volatile semiconductor memory device and manufacturing method thereof Download PDF

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Publication number
TW550826B
TW550826B TW091114153A TW91114153A TW550826B TW 550826 B TW550826 B TW 550826B TW 091114153 A TW091114153 A TW 091114153A TW 91114153 A TW91114153 A TW 91114153A TW 550826 B TW550826 B TW 550826B
Authority
TW
Taiwan
Prior art keywords
diffusion layer
conductive film
impurity diffusion
gate
floating
Prior art date
Application number
TW091114153A
Other languages
English (en)
Chinese (zh)
Inventor
Kiyoteru Kobayashi
Osamu Sakamoto
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Application granted granted Critical
Publication of TW550826B publication Critical patent/TW550826B/zh

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10D64/01326—

Landscapes

  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
TW091114153A 2001-12-19 2002-06-27 Non-volatile semiconductor memory device and manufacturing method thereof TW550826B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001386163A JP2003188290A (ja) 2001-12-19 2001-12-19 不揮発性半導体記憶装置およびその製造方法

Publications (1)

Publication Number Publication Date
TW550826B true TW550826B (en) 2003-09-01

Family

ID=19187911

Family Applications (1)

Application Number Title Priority Date Filing Date
TW091114153A TW550826B (en) 2001-12-19 2002-06-27 Non-volatile semiconductor memory device and manufacturing method thereof

Country Status (4)

Country Link
US (1) US6710395B2 (enExample)
JP (1) JP2003188290A (enExample)
KR (2) KR100523771B1 (enExample)
TW (1) TW550826B (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW544786B (en) * 2002-07-29 2003-08-01 Nanya Technology Corp Floating gate and method therefor
JP2005085903A (ja) 2003-09-05 2005-03-31 Renesas Technology Corp 半導体装置およびその製造方法
JP4912647B2 (ja) * 2005-09-08 2012-04-11 ルネサスエレクトロニクス株式会社 半導体記憶装置およびその製造方法
JP4731262B2 (ja) * 2005-09-22 2011-07-20 ルネサスエレクトロニクス株式会社 不揮発性半導体記憶装置および、不揮発性半導体記憶装置の製造方法
KR100741926B1 (ko) * 2006-07-24 2007-07-23 동부일렉트로닉스 주식회사 폴리실리콘 패턴 형성 방법
JP5183711B2 (ja) * 2010-10-12 2013-04-17 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
KR101037828B1 (ko) * 2011-03-15 2011-05-31 아이리얼 주식회사 좌우 위치조절이 가능한 볼라드

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5021848A (en) * 1990-03-13 1991-06-04 Chiu Te Long Electrically-erasable and electrically-programmable memory storage devices with self aligned tunnel dielectric area and the method of fabricating thereof
JPH07130884A (ja) * 1993-10-29 1995-05-19 Oki Electric Ind Co Ltd 不揮発性半導体メモリの製造方法
KR0150048B1 (ko) * 1994-12-23 1998-10-01 김주용 플래쉬 이이피롬 셀 및 그 제조방법
KR0142601B1 (ko) * 1995-02-28 1998-07-01 김주용 플래쉬 이이피롬 셀의 제조방법
US5830794A (en) * 1996-03-11 1998-11-03 Ricoh Company, Ltd. Method of fabricating semiconductor memory
TW340958B (en) * 1997-02-25 1998-09-21 Winbond Electronics Corp The producing method for self-aligned isolating gate flash memory unit
JP4012341B2 (ja) 1999-07-14 2007-11-21 株式会社ルネサステクノロジ 半導体集積回路装置
JP2001085540A (ja) 1999-09-09 2001-03-30 Hitachi Ltd 半導体集積回路装置およびその製造方法
JP3971873B2 (ja) 1999-09-10 2007-09-05 株式会社ルネサステクノロジ 半導体集積回路装置およびその製造方法
US6642103B2 (en) * 2000-03-08 2003-11-04 Koninklijke Philips Electronics N.V. Semiconductor device and method of manufacturing the same
KR100859081B1 (ko) 2001-08-06 2008-09-17 엔엑스피 비 브이 반도체 디바이스 제조 방법

Also Published As

Publication number Publication date
US20030111685A1 (en) 2003-06-19
JP2003188290A (ja) 2003-07-04
KR20050077503A (ko) 2005-08-02
US6710395B2 (en) 2004-03-23
KR100573328B1 (ko) 2006-04-24
KR20030051160A (ko) 2003-06-25
KR100523771B1 (ko) 2005-10-27

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