TW530358B - Two-metal TAB tape, double-sided CSP tape, BGA tape and method for manufacturing the same - Google Patents

Two-metal TAB tape, double-sided CSP tape, BGA tape and method for manufacturing the same Download PDF

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Publication number
TW530358B
TW530358B TW90122606A TW90122606A TW530358B TW 530358 B TW530358 B TW 530358B TW 90122606 A TW90122606 A TW 90122606A TW 90122606 A TW90122606 A TW 90122606A TW 530358 B TW530358 B TW 530358B
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Taiwan
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double
bga
scope
item
sided
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TW90122606A
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English (en)
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Akira Ichiryu
Tatsuo Kataoka
Hirokazu Kawamura
Katsuhiko Hayashi
Masahito Ishii
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Mitsui Mining & Smelting Co
Suzuki Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4821Flat leads, e.g. lead frames with or without insulating supports
    • H01L21/4839Assembly of a flat lead with an insulating support, e.g. for TAB
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/4985Flexible insulating substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0008Apparatus or processes for manufacturing printed circuits for aligning or positioning of tools relative to the circuit board
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0393Flexible materials
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09009Substrate related
    • H05K2201/09063Holes or slots in insulating substrate not used for electrical connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/15Position of the PCB during processing
    • H05K2203/1545Continuous processing, i.e. involving rolls moving a band-like or solid carrier along a continuous production path
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/15Position of the PCB during processing
    • H05K2203/1572Processing both sides of a PCB by the same process; Providing a similar arrangement of components on both sides; Making interlayer connections from two sides
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/16Inspection; Monitoring; Aligning
    • H05K2203/167Using mechanical means for positioning, alignment or registration, e.g. using rod-in-hole alignment
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0073Masks not provided for in groups H05K3/02 - H05K3/46, e.g. for photomechanical production of patterned surfaces
    • H05K3/0082Masks not provided for in groups H05K3/02 - H05K3/46, e.g. for photomechanical production of patterned surfaces characterised by the exposure method of radiation-sensitive masks
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0097Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4046Through-connections; Vertical interconnect access [VIA] connections using auxiliary conductive elements, e.g. metallic spheres, eyelets, pieces of wire
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/24Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24917Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/249921Web or sheet containing structurally defined element or component
    • Y10T428/249953Composite having voids in a component [e.g., porous, cellular, etc.]
    • Y10T428/249967Inorganic matrix in void-containing component
    • Y10T428/24997Of metal-containing material

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Description

530358 A7 B7 五、發明説明(1 技術領域 本發明係關於雙重金屬T A B及雙面C S P、B G A帶、以 及其製造方法。 背景技術 於表背面具有導體層之配線基板已有各種被使用。具體 上,有在基板上使用可撓性的聚醯亞胺等之TAB (Tape
Automated Bonding)帶、CSP (Chip Size Package) ; BGA (Ball Grid Array)、FPC (Flexible Printed Circuit)、又、使用 玻璃環氧樹脂等之硬質基板即所謂多層基板等。 於如此表背面具有導體層之基板的製造方法,首先於基 板之幅方向兩端部,沿著長度方向而等間隔地以壓機形成 鏈輪孔。又,藉此壓機有時形成貫通孔等。 然後’於基板之表背面藉蝕刻等形成配線層後,於基板 上以冲壓機开成貫通孔,該貫通孔係藉沖壓機充填導體 (inplant),進一步形成精加工鍍層。 以此蝕刻等形成配線層中,帶之搬送係使用鏈輪孔,又 ,充填(植入)於貫通孔之導體亦使用鏈輪孔作為決定位置 之定位圓孔。 但,形成配線層之際,有時搬送所使用之鏈輪孔會產生 若干變形。若使用如此變形之鏈輪孔作為植入時之決定位 置的定位圓孔’成為錠層之決定位置的誤差。〖,鍵輪孔 係因孔形狀為角孔,故,若使用來作為定位圓孔,會產生 若干偏差,與上述同樣地,成為植入之決定位置的誤差。繼 而,如此植入之決定位置的誤差,乃成為在大量生產製品 -4- 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公爱) 530358
(輥-輥製造)的特性造成參差不齊之原因 發明之揭示 即使在大量生產製造 雙重金屬TAB及雙面 因此’本發明之目的在於提供一種 的製造中,特性不會造成參差不齊之 CSP、BGA帶、以及其製造方法。 本發明人等研究結果發現在鏈輪孔間,以沖壓機對貫通 孔充填導體之際,設有—使用來作為定位孔之定位圓孔, 終達成上述目的。 本發月係基於上述見識者,提供一種雙重金屬TAB及雙 CSP、BGA帶’其係具有絕緣性基板與至少在其雙面之配 線層,於幅方向兩端部沿著長度方向而等間隔地形成鏈輪 孔,該基板係具有以沖壓機所形成之貫通孔,於該貫通孔 係以冲壓機充填導體,該導體與該配線層呈電氣連接,其 特徵在於: 於上逑長度方向所形成之鏈輪孔間,設有定位圓孔。 又’本發明係提供一種雙重金屬TAB及雙面CSP、 B G A帶之製造方法,其特徵在於:於絕緣性基板之幅方向 兩端邵,沿著長度方向,而以壓機交互且等間隔地形成 貝通孔及定位圓孔’然後,於該基板之至少雙面設有配 線層或金屬箔後’藉沖壓機形成貫通孔,然後,於該貫 通孔藉沖壓機充填導體,使該導體與該配線層或金屬箔 電氣連接。 圖面之簡單說明 圖1為表示本發明之雙重金屬TAB帶的一例之平面圖。 —-5- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) A7 B7 530358 五、發明説明(3 圖2係表不本發明之雙重金屬T a B帶的製造方法一例之 步驟圖。 1¾] 3 ^/罕丁 ^ ^ '、衣不於貫施例1及比較例1中,測定位置精度之最 大偏差量的方法。 用以實施發明之最佳形態 以下’ 4說明本發明實施之最佳形態。 ’祝明有關本發明之雙重金屬TAB及雙面CSP、 B G A f及其製造方法。本發明如上述般係可廣泛地應用於 使用可撓性聚醯亞胺等之TAB帶、CSP、BGA、FPC、又 使用坡璃環氧樹脂等硬質基板之所謂多層基板等,但, 處就明有關應用於T A B帶、尤其於雙面具有配線層之 所謂雙重金屬TAB帶及其製造方法。 圖1係表示本發明之雙重金屬tab帶的一例之平面圖。 圖1中1為雙重金屬T A B帶、2為絕緣性基板、3為配線 層、4為鏈輪孔、5為定位圓孔。 如圖1所示般,本發明之雙重金屬TAB帶1係於絕緣性 基ft之表面形成配線層3。絕緣性基板2 —般係使用聚醯 亞胺腠,配線層3係藉由蝕刻銅箔等而形成。 ^於雙重金屬TAB帶1之幅方向兩端部沿著長度方向 而等間隔地形成鏈輪孔4。進一 #,在此長度方向所形成 、,輻孔4間,设有定位圓孔5。鏈輪孔4及定位圓孔$係 册l機而形成。此鏈輪孔4為角孔,配線層3形成時使用於 帶:搬送。另夕卜,定位圓孔5係充填導體,使用來作為形 成一通孔$通層時之模具的定位圓孔。此$位圓孔5之徑 m 裝 訂
線 -6 -
=1〜ππηΦ左右’不使用於帶之搬送,故,無磨損、模具崩 :寺义變形。又,此定位圓孔5為圓孔,故,圓柱狀之定 垃銷正好嵌合,不會產生決定位置的偏差等。 又’在本發明之雙重金屬ΤΑΒ帶中,設有以沖壓機所形 成的貫通孔,於此貫通孔藉沖壓機充填導體,此導體虚上 述配線層乃電氣連接。 〃 其次,說明有關本發明之雙重金屬ΤΑΒ的製造方法。圖 2係表示本發明之雙重金屬TAB帶的製造方法一例之步驟 圖。如圖2所不般,於雙面銅積層聚醯亞胺帶,藉壓機而 形成鏈輪孔及定位圓孔,有時係形成貫通孔等。鏈輪孔係 形成角孔,定位圓孔係形成圓孔,圓孔之徑為丨mn^左右。 其後,銅表面前處理(酸洗、脫脂)後,進行光阻塗布, 藉曝光、顯像、蝕刻而於表面形成配線層。其次,同樣地 背面前處理(酸洗、脫脂)後,進行光阻塗布,藉曝光、顯 像、蝕刻而於背面形成配線層。 在塗布光阻劑之兩面積層板,使用曝光機而藉紫外線照 射影像形成表背的圖案時,於曝光機之階段所設有的鍵輪 銷(導引銷)會扣合於帶子之鍵輪孔而搬送帶子。搬送此帶 子之際’有時於鏈輪孔會產生若干變形。又,鏈輪孔之尺 寸一般為 1.981 mm或 1.42 mm。 最後,藉沖壓機形成貫通孔,然後,於該貫通孔藉沖壓 機充填導體(植入),使該導體與該配線層或金屬箔電氣連 接後,為提高導通可靠性,可進行底層鍍鎳之鍍金等之精 加工電鍍,形成製品。 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐)
在”明中,如上述般1通 … 式須如濕式法之去污處理 由沖昼〈万 為使用非常普通之壓機的沖…連接之方法亦 之基板上重疊坪 即’在藉沖壓開孔 於:::極間早化的製造步驟,有關降低成本。 在形成二 壓機充填導體(植入)之際,決定位置係 作為嵌合定位銷。定位圓孔係不使用來 二成寺^子的搬送用導引孔,故不會變形。又 y狀為圓孔,故可與定位銷正好嵌合。 A 發月中,於上述植入,決定位置係依據定位圓孔, 疋乂 =孔係不使用來作為帶子之搬送用導引孔,故步驟中 不2變形,又,因是圓孔,故定位圓銷正好嵌合,可正確 也苻口位置。因此,即使在大量生產製品的製造中,特性 不會參差不齊。 本發明如上述般,可廣泛地應用於一使用可撓性的聚醯 亞胺等的TAB帶、CSP、BGA、FPC、又,使用玻璃環 氧樹脂等硬質基板之所謂多層基板等。、 以下,依據實施例等具體地說明本發明。 [實施例1 ] 使用35 mm幅之雙面貼銅的聚醯亞胺膜(聚醯亞胺層之厚 度50 μ m、銅箔厚表背各18 μ m ;商品名工只〆氺v夕只、 新曰鐵化學公司製),依據圖2所示之雙重金屬T A B帶的製 造步驟,製造如圖1所示之雙重金屬TAB帶。又,在圖2 所示之沖壓步驟中,交互且等間隔地形成鏈輪孔與定位圓 -8 -本紙張尺度適用中國國家標準(CNS) A4規格(210X 297公釐) 530358 A7
孔。再者,於帶子搬送係使用鏈輪孔,於植入之決定位置 係使用定位圓孔。 其結果’電阻之平均值為6 π!Ω/100 μ πιφ孔,標準偏差 0.3 ηιΩ/孔。 、 4 [比較例1 ] 在圖2所示之沖壓步驟中,除只形成鏈輪孔,帶予之搬 送及植入之決定位置的任一者均使用鏈輪孔以外,其餘^ 實施例1同樣的做法而製造雙重金屬τ Α Β帶子。 、锊 其釔果,在4汶之試驗中,各別之電阻平均值為6〜, πιΩ/ΙΟΟμπαφ孔’^準偏差為i〜6 m|Q/孔。 又,在上述實施例1及比較例丨中,依據圖3之方法 孔之中心的位置精度取大偏移量。在圖3中,X為册 ^ 方向,Y為帶子幅寬方向,最大偏敕旦 、、、子進$ 取大偏移I係以χ方向的 來表示。又’測定係對7點進行’其結果表示於表!中。轉 [表 1] ° 最大偏移量
裴 η
線 -9-

Claims (1)

  1. 530358 A B c I 、申請專利範圍 1· -種雙重金屬TAB及雙面csp、BGA帶,其係具有絕緣 陡基板與於其至少雙面之配線層,於幅方向兩端部沿著 長度万向而等間隔地形成鏈輪孔,該基板係具有以沖壓 機所形成之貫通孔,於該貫通孔係藉沖壓機充填導體, 該導體與該配線層乃呈電氣連接著,其特徵在於: 於上述長度方向所形成之鏈輪孔間,設有定位圓孔。 2·根據申請專利範圍第丨項之雙重金屬TAB及雙面CSp、 BGA帶,其中包含金屬層,係由3層以上之多層所構成。 3·根據申請專利範圍第丨或2項之雙重金屬TAB及雙面cSp 、BGA帶,其中上述導體為金屬。 4·根據申請專利範圍第3項之雙重金屬Tab及雙面CSP、 B G A帶,其中上述金屬為鉛、錫、銅、銀、或以此等作 為主成分之合金。 5.根據申請專利範圍第1或2項之雙重金屬tab及雙面CSP 、BGA帶,其中實施底層鍍鎳之鍍金。 6·根據申請專利範圍第3項之雙重金屬tab及雙面CSP、 BGA帶,其中實施底層鍍鎳之鍍金。 7·根據申請專利範圍第4項之雙重金屬TAB及雙面CSP、 BGA帶,其中實施底層鍍鎳之鍍金。 8· —種雙重金屬TAB及雙面CSP、BGA帶之製造方法,其 特徵在於: 於絕緣性基板之幅寬方向兩端部,沿著長度方向, 藉壓機而交互且等間隔地形成鏈輪孔及定位圓孔,然 後’於該基板之至少雙面設有配線層或金屬箔後,藉 11 - 本紙張尺度適用中國國家標準(CNS) A4規格(210 x 297公釐) 裝 訂 530358 A8 B8 C8 _一 —________ D8 六、申請專利範圍 沖壓機形成貫通孔,再者,於該貫通孔藉沖壓機充填 導體,以使該導體與該配線層或金屬箔電氣連接。 9·根據申請專利範圍第8項之雙重金屬TAB及雙面CSP、 BGA帶之製造方法,其中含有金屬層係由3層以上之多 層所構成。 10·根據申請專利範圍第8或9項之雙重金屬T A B及雙面c S P 、BGA帶之製造方法,其中上述導體為金屬。 11·根據申請專利範圍第10項之雙重金屬TAB及雙面CSP、 BGA帶之製造方法,其中上述金屬為鉛、錫、銅、銀、 或以此等作為主成分之合金。 12.根據申請專利範圍第8或9項之雙重金屬tab及雙面CSP 、BGA帶之製造方法,其中上述電氣連接後,進行底層 錄鎳之鍍金。 13·根據申請專利範圍第1 〇項之雙重金屬τ a B及雙面c S P、 BGA帶之製造方法,其中上述電氣連接後,進行底層鍍 錄之鏡金。 14.根據申請專利範圍第1 1項之雙重金屬τ a b及雙面c s p、 BGA帶之製造方法,其中上述電氣連接後,進行底層鍍 錄之鍵金。 -12- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐)
TW90122606A 2000-09-12 2001-09-12 Two-metal TAB tape, double-sided CSP tape, BGA tape and method for manufacturing the same TW530358B (en)

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JP5325684B2 (ja) 2009-07-15 2013-10-23 ルネサスエレクトロニクス株式会社 半導体装置
JP2016058758A (ja) * 2016-01-27 2016-04-21 ルネサスエレクトロニクス株式会社 半導体装置

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EP1235267A1 (en) 2002-08-28
US20020187334A1 (en) 2002-12-12
US6798048B2 (en) 2004-09-28

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