TW461095B - Ramped or stepped gate channel erase for flash memory application - Google Patents

Ramped or stepped gate channel erase for flash memory application Download PDF

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Publication number
TW461095B
TW461095B TW089108495A TW89108495A TW461095B TW 461095 B TW461095 B TW 461095B TW 089108495 A TW089108495 A TW 089108495A TW 89108495 A TW89108495 A TW 89108495A TW 461095 B TW461095 B TW 461095B
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TW
Taiwan
Prior art keywords
voltage
item
well
patent application
scope
Prior art date
Application number
TW089108495A
Other languages
English (en)
Chinese (zh)
Inventor
Ravi S Sunkavalli
Sameer S Haddad
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of TW461095B publication Critical patent/TW461095B/zh

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups

Landscapes

  • Non-Volatile Memory (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Memories (AREA)
TW089108495A 1999-05-06 2000-05-04 Ramped or stepped gate channel erase for flash memory application TW461095B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/307,259 US6188609B1 (en) 1999-05-06 1999-05-06 Ramped or stepped gate channel erase for flash memory application

Publications (1)

Publication Number Publication Date
TW461095B true TW461095B (en) 2001-10-21

Family

ID=23188932

Family Applications (1)

Application Number Title Priority Date Filing Date
TW089108495A TW461095B (en) 1999-05-06 2000-05-04 Ramped or stepped gate channel erase for flash memory application

Country Status (7)

Country Link
US (1) US6188609B1 (enExample)
EP (1) EP1175680B1 (enExample)
JP (1) JP3811760B2 (enExample)
KR (1) KR100578582B1 (enExample)
DE (1) DE60001497T2 (enExample)
TW (1) TW461095B (enExample)
WO (1) WO2000068952A1 (enExample)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7366020B2 (en) * 1999-07-28 2008-04-29 Samsung Electronics Co., Ltd. Flash memory device capable of preventing an overerase of flash memory cells and erase method thereof
KR100308192B1 (ko) 1999-07-28 2001-11-01 윤종용 플래시 메모리 셀들의 과소거를 방지할 수 있는 플래시 메모리장치 및 그것의 소거 방법
US6914827B2 (en) * 1999-07-28 2005-07-05 Samsung Electronics Co., Ltd. Flash memory device capable of preventing an over-erase of flash memory cells and erase method thereof
US6381179B1 (en) * 2000-02-24 2002-04-30 Advanced Micro Devices, Inc. Using a negative gate erase to increase the cycling endurance of a non-volatile memory cell with an oxide-nitride-oxide (ONO) structure
EP1229550B1 (en) * 2001-02-05 2009-09-30 STMicroelectronics S.r.l. Method of erasing a flash memory
US6385093B1 (en) * 2001-03-30 2002-05-07 Advanced Micro Devices, Inc. I/O partitioning system and methodology to reduce band-to-band tunneling current during erase
TW511203B (en) * 2001-04-20 2002-11-21 Macronix Int Co Ltd Erase method of flash memory
CN100481268C (zh) * 2001-06-25 2009-04-22 旺宏电子股份有限公司 一种闪存的抹除方法
KR100456596B1 (ko) * 2002-05-08 2004-11-09 삼성전자주식회사 부유트랩형 비휘발성 기억소자의 소거 방법
US6891752B1 (en) 2002-07-31 2005-05-10 Advanced Micro Devices System and method for erase voltage control during multiple sector erase of a flash memory device
US6628545B1 (en) * 2002-11-26 2003-09-30 Advanced Micro Devices, Inc. Memory circuit for suppressing bit line current leakage
US7073104B1 (en) * 2003-03-10 2006-07-04 Advanced Micro Devices, Inc. Method and system for applying testing voltage signal
TWI247311B (en) * 2004-03-25 2006-01-11 Elite Semiconductor Esmt Circuit and method for preventing nonvolatile memory from over erasure
KR100781041B1 (ko) * 2006-11-06 2007-11-30 주식회사 하이닉스반도체 플래시 메모리 장치 및 그 소거 동작 제어 방법
EP2302635B1 (en) * 2009-09-18 2016-01-13 STMicroelectronics Srl Method for biasing an EEPROM non-volatile memory array and corresponding EEPROM non-volatile memory device
US8345485B2 (en) 2011-02-09 2013-01-01 Freescale Semiconductor, Inc. Erase ramp pulse width control for non-volatile memory
US8937837B2 (en) * 2012-05-08 2015-01-20 Sandisk Technologies Inc. Bit line BL isolation scheme during erase operation for non-volatile storage
US8891308B1 (en) 2013-09-11 2014-11-18 Sandisk Technologies Inc. Dynamic erase voltage step size selection for 3D non-volatile memory
KR102606497B1 (ko) 2016-06-27 2023-11-29 삼성전자주식회사 불휘발성 메모리 장치 및 불휘발성 메모리 장치의 소거 방법
US10559368B1 (en) 2018-08-07 2020-02-11 Sandisk Technologies Llc Non-volatile memory with countermeasures for select gate disturb during program pre-charge

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5642311A (en) * 1995-10-24 1997-06-24 Advanced Micro Devices Overerase correction for flash memory which limits overerase and prevents erase verify errors
US5841165A (en) * 1995-11-21 1998-11-24 Programmable Microelectronics Corporation PMOS flash EEPROM cell with single poly
WO1998010471A1 (en) 1996-09-05 1998-03-12 Macronix International Co., Ltd. Triple well floating gate memory and operating method with isolated channel program, preprogram and erase processes
EP0974147A1 (en) 1997-04-11 2000-01-26 Programmable Silicon Solutions Electrically erasable nonvolatile memory
JP3175665B2 (ja) * 1997-10-24 2001-06-11 日本電気株式会社 不揮発性半導体記憶装置のデータ消去方法
US5970460A (en) * 1997-12-05 1999-10-19 Lernout & Hauspie Speech Products N.V. Speech recognition and editing system
US5978277A (en) * 1998-04-06 1999-11-02 Aplus Flash Technology, Inc. Bias condition and X-decoder circuit of flash memory array

Also Published As

Publication number Publication date
JP3811760B2 (ja) 2006-08-23
WO2000068952A1 (en) 2000-11-16
DE60001497T2 (de) 2003-12-24
KR20020042760A (ko) 2002-06-07
KR100578582B1 (ko) 2006-05-12
EP1175680A1 (en) 2002-01-30
JP2002544643A (ja) 2002-12-24
DE60001497D1 (de) 2003-04-03
US6188609B1 (en) 2001-02-13
EP1175680B1 (en) 2003-02-26

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