DE60001497T2 - Rampenförmige oder stufenweise gate-kanal löschung für flash-speicher - Google Patents
Rampenförmige oder stufenweise gate-kanal löschung für flash-speicherInfo
- Publication number
- DE60001497T2 DE60001497T2 DE60001497T DE60001497T DE60001497T2 DE 60001497 T2 DE60001497 T2 DE 60001497T2 DE 60001497 T DE60001497 T DE 60001497T DE 60001497 T DE60001497 T DE 60001497T DE 60001497 T2 DE60001497 T2 DE 60001497T2
- Authority
- DE
- Germany
- Prior art keywords
- ramp
- shaped
- flash memory
- gate channel
- channel erase
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
- G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/307,259 US6188609B1 (en) | 1999-05-06 | 1999-05-06 | Ramped or stepped gate channel erase for flash memory application |
PCT/US2000/012343 WO2000068952A1 (en) | 1999-05-06 | 2000-05-05 | Ramped or stepped gate channel erase for flash memory application |
Publications (2)
Publication Number | Publication Date |
---|---|
DE60001497D1 DE60001497D1 (de) | 2003-04-03 |
DE60001497T2 true DE60001497T2 (de) | 2003-12-24 |
Family
ID=23188932
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60001497T Expired - Lifetime DE60001497T2 (de) | 1999-05-06 | 2000-05-05 | Rampenförmige oder stufenweise gate-kanal löschung für flash-speicher |
Country Status (7)
Country | Link |
---|---|
US (1) | US6188609B1 (de) |
EP (1) | EP1175680B1 (de) |
JP (1) | JP3811760B2 (de) |
KR (1) | KR100578582B1 (de) |
DE (1) | DE60001497T2 (de) |
TW (1) | TW461095B (de) |
WO (1) | WO2000068952A1 (de) |
Families Citing this family (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100308192B1 (ko) * | 1999-07-28 | 2001-11-01 | 윤종용 | 플래시 메모리 셀들의 과소거를 방지할 수 있는 플래시 메모리장치 및 그것의 소거 방법 |
US6914827B2 (en) * | 1999-07-28 | 2005-07-05 | Samsung Electronics Co., Ltd. | Flash memory device capable of preventing an over-erase of flash memory cells and erase method thereof |
US7366020B2 (en) * | 1999-07-28 | 2008-04-29 | Samsung Electronics Co., Ltd. | Flash memory device capable of preventing an overerase of flash memory cells and erase method thereof |
US6381179B1 (en) * | 2000-02-24 | 2002-04-30 | Advanced Micro Devices, Inc. | Using a negative gate erase to increase the cycling endurance of a non-volatile memory cell with an oxide-nitride-oxide (ONO) structure |
EP1229550B1 (de) * | 2001-02-05 | 2009-09-30 | STMicroelectronics S.r.l. | Löschverfahren für einen Flash-Speicher |
US6385093B1 (en) * | 2001-03-30 | 2002-05-07 | Advanced Micro Devices, Inc. | I/O partitioning system and methodology to reduce band-to-band tunneling current during erase |
TW511203B (en) * | 2001-04-20 | 2002-11-21 | Macronix Int Co Ltd | Erase method of flash memory |
CN100481268C (zh) * | 2001-06-25 | 2009-04-22 | 旺宏电子股份有限公司 | 一种闪存的抹除方法 |
KR100456596B1 (ko) * | 2002-05-08 | 2004-11-09 | 삼성전자주식회사 | 부유트랩형 비휘발성 기억소자의 소거 방법 |
US6891752B1 (en) * | 2002-07-31 | 2005-05-10 | Advanced Micro Devices | System and method for erase voltage control during multiple sector erase of a flash memory device |
US6628545B1 (en) * | 2002-11-26 | 2003-09-30 | Advanced Micro Devices, Inc. | Memory circuit for suppressing bit line current leakage |
US7073104B1 (en) * | 2003-03-10 | 2006-07-04 | Advanced Micro Devices, Inc. | Method and system for applying testing voltage signal |
TWI247311B (en) * | 2004-03-25 | 2006-01-11 | Elite Semiconductor Esmt | Circuit and method for preventing nonvolatile memory from over erasure |
KR100781041B1 (ko) * | 2006-11-06 | 2007-11-30 | 주식회사 하이닉스반도체 | 플래시 메모리 장치 및 그 소거 동작 제어 방법 |
EP2302635B1 (de) * | 2009-09-18 | 2016-01-13 | STMicroelectronics Srl | Verfahren zum Vormagnetisieren einer nichtflüchtigen EEPROM-Speicheranordnung und entsprechende nichtflüchtige EEPROM-Speicheranordnung |
US8345485B2 (en) | 2011-02-09 | 2013-01-01 | Freescale Semiconductor, Inc. | Erase ramp pulse width control for non-volatile memory |
US8937837B2 (en) | 2012-05-08 | 2015-01-20 | Sandisk Technologies Inc. | Bit line BL isolation scheme during erase operation for non-volatile storage |
US8891308B1 (en) | 2013-09-11 | 2014-11-18 | Sandisk Technologies Inc. | Dynamic erase voltage step size selection for 3D non-volatile memory |
KR102606497B1 (ko) | 2016-06-27 | 2023-11-29 | 삼성전자주식회사 | 불휘발성 메모리 장치 및 불휘발성 메모리 장치의 소거 방법 |
US10559368B1 (en) | 2018-08-07 | 2020-02-11 | Sandisk Technologies Llc | Non-volatile memory with countermeasures for select gate disturb during program pre-charge |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5642311A (en) * | 1995-10-24 | 1997-06-24 | Advanced Micro Devices | Overerase correction for flash memory which limits overerase and prevents erase verify errors |
US5841165A (en) * | 1995-11-21 | 1998-11-24 | Programmable Microelectronics Corporation | PMOS flash EEPROM cell with single poly |
WO1998010471A1 (en) | 1996-09-05 | 1998-03-12 | Macronix International Co., Ltd. | Triple well floating gate memory and operating method with isolated channel program, preprogram and erase processes |
CN1252156A (zh) | 1997-04-11 | 2000-05-03 | 硅芯片公司 | 电擦除非易失性存储器 |
JP3175665B2 (ja) * | 1997-10-24 | 2001-06-11 | 日本電気株式会社 | 不揮発性半導体記憶装置のデータ消去方法 |
US5970460A (en) * | 1997-12-05 | 1999-10-19 | Lernout & Hauspie Speech Products N.V. | Speech recognition and editing system |
US5978277A (en) * | 1998-04-06 | 1999-11-02 | Aplus Flash Technology, Inc. | Bias condition and X-decoder circuit of flash memory array |
-
1999
- 1999-05-06 US US09/307,259 patent/US6188609B1/en not_active Expired - Lifetime
-
2000
- 2000-05-04 TW TW089108495A patent/TW461095B/zh not_active IP Right Cessation
- 2000-05-05 KR KR1020017014034A patent/KR100578582B1/ko not_active IP Right Cessation
- 2000-05-05 EP EP00930412A patent/EP1175680B1/de not_active Expired - Lifetime
- 2000-05-05 DE DE60001497T patent/DE60001497T2/de not_active Expired - Lifetime
- 2000-05-05 WO PCT/US2000/012343 patent/WO2000068952A1/en not_active Application Discontinuation
- 2000-05-05 JP JP2000617455A patent/JP3811760B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
KR100578582B1 (ko) | 2006-05-12 |
US6188609B1 (en) | 2001-02-13 |
EP1175680A1 (de) | 2002-01-30 |
WO2000068952A1 (en) | 2000-11-16 |
JP3811760B2 (ja) | 2006-08-23 |
DE60001497D1 (de) | 2003-04-03 |
EP1175680B1 (de) | 2003-02-26 |
TW461095B (en) | 2001-10-21 |
KR20020042760A (ko) | 2002-06-07 |
JP2002544643A (ja) | 2002-12-24 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: SPANSION LLC (N.D.GES.D. STAATES DELAWARE), SU, US |